JPH04168787A - Manufacture of ceramic circuit board - Google Patents
Manufacture of ceramic circuit boardInfo
- Publication number
- JPH04168787A JPH04168787A JP29618190A JP29618190A JPH04168787A JP H04168787 A JPH04168787 A JP H04168787A JP 29618190 A JP29618190 A JP 29618190A JP 29618190 A JP29618190 A JP 29618190A JP H04168787 A JPH04168787 A JP H04168787A
- Authority
- JP
- Japan
- Prior art keywords
- etching
- ceramic
- circuit board
- metal layer
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 78
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000005530 etching Methods 0.000 claims abstract description 59
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims description 58
- 238000000034 method Methods 0.000 claims description 56
- 229910052751 metal Inorganic materials 0.000 claims description 44
- 239000002184 metal Substances 0.000 claims description 44
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 11
- 230000000694 effects Effects 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 abstract description 4
- 238000007598 dipping method Methods 0.000 abstract 1
- 229910052802 copper Inorganic materials 0.000 description 26
- 239000010949 copper Substances 0.000 description 26
- 239000000243 solution Substances 0.000 description 21
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 14
- 239000004020 conductor Substances 0.000 description 11
- 238000005498 polishing Methods 0.000 description 10
- 238000007788 roughening Methods 0.000 description 10
- 239000007864 aqueous solution Substances 0.000 description 8
- 239000007788 liquid Substances 0.000 description 8
- 230000003287 optical effect Effects 0.000 description 8
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 239000013067 intermediate product Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 238000007747 plating Methods 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- 230000002378 acidificating effect Effects 0.000 description 5
- 239000002585 base Substances 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 5
- 239000012808 vapor phase Substances 0.000 description 5
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 239000007921 spray Substances 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 3
- 238000005422 blasting Methods 0.000 description 3
- 229910010293 ceramic material Inorganic materials 0.000 description 3
- 238000010304 firing Methods 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- LCPVQAHEFVXVKT-UHFFFAOYSA-N 2-(2,4-difluorophenoxy)pyridin-3-amine Chemical compound NC1=CC=CN=C1OC1=CC=C(F)C=C1F LCPVQAHEFVXVKT-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000007730 finishing process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- CHQMHPLRPQMAMX-UHFFFAOYSA-L sodium persulfate Substances [Na+].[Na+].[O-]S(=O)(=O)OOS([O-])(=O)=O CHQMHPLRPQMAMX-UHFFFAOYSA-L 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- PCEXQRKSUSSDFT-UHFFFAOYSA-N [Mn].[Mo] Chemical compound [Mn].[Mo] PCEXQRKSUSSDFT-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 229910052878 cordierite Inorganic materials 0.000 description 1
- 229960003280 cupric chloride Drugs 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- JSKIRARMQDRGJZ-UHFFFAOYSA-N dimagnesium dioxido-bis[(1-oxido-3-oxo-2,4,6,8,9-pentaoxa-1,3-disila-5,7-dialuminabicyclo[3.3.1]nonan-7-yl)oxy]silane Chemical compound [Mg++].[Mg++].[O-][Si]([O-])(O[Al]1O[Al]2O[Si](=O)O[Si]([O-])(O1)O2)O[Al]1O[Al]2O[Si](=O)O[Si]([O-])(O1)O2 JSKIRARMQDRGJZ-UHFFFAOYSA-N 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 229910052839 forsterite Inorganic materials 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- HCWCAKKEBCNQJP-UHFFFAOYSA-N magnesium orthosilicate Chemical compound [Mg+2].[Mg+2].[O-][Si]([O-])([O-])[O-] HCWCAKKEBCNQJP-UHFFFAOYSA-N 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000000053 physical method Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910000029 sodium carbonate Inorganic materials 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- -1 steatite Chemical compound 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 229910052845 zircon Inorganic materials 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Non-Insulated Conductors (AREA)
- Manufacturing Of Electric Cables (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】 [産業上の利用分野] この発明は、セラミックス回路板の製法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a ceramic circuit board.
[従来の技術]
無機系の絶縁基板であるセラミックス基板の表面に所定
パターンの回路を形成した成るセラミ。[Prior Art] A ceramic is made by forming a circuit in a predetermined pattern on the surface of a ceramic substrate, which is an inorganic insulating substrate.
クス回路板の製法として、従来、タングステンあるいは
モリブデン−マンガン等の導体ペーストで、たとえばア
ルミナセラミックスの焼成前のグリーンシート上に回路
を描き、このグリーンシートを還元雰囲気中で焼成する
方法、あるいは、Ag/Pd、Ag/Pt、Cuまたは
Au等の金属微粉末をガラスフリット、または有機系の
ビヒクルと混合した導体ペーストを、焼結したセラミッ
クス回板上にスクリーン印刷した後、さらに導体ペース
トがセラミックス基板ニ溶融接合する温度で焼成する方
法が一般に知られている。しかしこれらの方法は、共通
して微細な導電回路の形成が困難であり、特に前者の方
法によると、配線回路の抵抗が大きいために、微細な導
電回路に適せず、後者の方法によると、導体ペース(・
のスクリーン印刷では、100μm以下の微細な導電回
路の形成が困難であるとともにペースト中にはガラス質
が含まれるため、はんだ付着性が劣り、その結果使用時
に故障を起こしやすい等の欠点がある。Conventionally, the conventional methods for producing circuit boards include drawing a circuit on a green sheet of alumina ceramics before firing using a conductor paste such as tungsten or molybdenum-manganese, and firing this green sheet in a reducing atmosphere. A conductive paste made by mixing fine metal powder such as /Pd, Ag/Pt, Cu or Au with a glass frit or an organic vehicle is screen printed on a sintered ceramic circuit board, and then the conductive paste is applied to a ceramic circuit board. A method of firing at a temperature for fusion bonding is generally known. However, these methods have in common that it is difficult to form fine conductive circuits, and in particular, the former method is not suitable for forming fine conductive circuits due to the large resistance of the wiring circuit, and the latter method is difficult to form fine conductive circuits. , conductor pace (・
With screen printing, it is difficult to form fine conductive circuits of 100 μm or less, and the paste contains glass, resulting in poor solder adhesion and, as a result, failures during use.
セラミックス回路板の回路形成には、この他無電解めっ
きによる方法、蒸着、スパッタリング、またはイオンブ
レーティングなどの気相法があり、これらの方法は、前
記の欠点を有していない点で優れているが、導体とセラ
ミックス基板との密着性が不充分である。この密着性を
向上させるために、セラミックス基板を粗化した後にメ
タライズし、いわゆるアンカー効果によって物理的に基
板と導体とを接合する必要があった。Other methods for forming circuits on ceramic circuit boards include electroless plating, vapor deposition, sputtering, and vapor phase methods such as ion blasting, and these methods are superior in that they do not have the above-mentioned drawbacks. However, the adhesion between the conductor and the ceramic substrate is insufficient. In order to improve this adhesion, it was necessary to roughen the ceramic substrate and then metalize it to physically bond the substrate and the conductor using the so-called anchor effect.
このようにセラミックス基板と導体との接合強度乃至密
着力性を高めるために、粗化したセラミックス基板を用
いると、回路形成のためのエツチング処理をした際に、
粗化によって形成された基板の表面の凹部に銅残が生じ
、この銅残により導電回路の短絡、マイグレーション等
の不良が発生する問題があった。このような不良を解消
するために銅残を完全に除去するまでエツチング処理を
引続いて行うと、導電回路が溶出してその線幅が過度に
細くなる問題があった。In this way, if a roughened ceramic substrate is used to increase the bonding strength or adhesion between the ceramic substrate and the conductor, when etching is performed to form a circuit,
There is a problem in that copper residue is generated in the concave portions of the surface of the substrate formed by roughening, and this copper residue causes defects such as short circuits and migration of conductive circuits. In order to eliminate such defects, if the etching process is continued until the copper residue is completely removed, there is a problem in that the conductive circuits are eluted and the line width becomes excessively thin.
[発明が解決しようとする課題]
したがって、この発明は、基板の表面に生しだ銅残を導
電回路の線幅を保った上で除去する新規なセラミックス
回路板の製法を提供することを目的とする。[Problems to be Solved by the Invention] Therefore, an object of the present invention is to provide a novel method for manufacturing a ceramic circuit board in which copper residue formed on the surface of the board is removed while maintaining the line width of the conductive circuit. shall be.
[課題を解決するための手段]
前記の課題を解決するために、この発明に係るセラミッ
クス回路板の製法は、導体金属層が形成されたセラミッ
クス基板に対して、前記導体金属層を所定パターンのエ
ツチングレジスト層で覆った後、エツチング処理して回
路形成を行うセラミックス回路板の製法において、前記
エッチング処理の後にセラミックス基板の表面の凹部に
残った銅残を、エツチング液中で超音波洗浄を行うこと
によって除去することを特徴とするものである。[Means for Solving the Problems] In order to solve the above-mentioned problems, a method for manufacturing a ceramic circuit board according to the present invention includes forming a conductive metal layer in a predetermined pattern on a ceramic substrate on which a conductive metal layer is formed. In a method for manufacturing a ceramic circuit board in which a circuit is formed by etching after being covered with an etching resist layer, copper residue remaining in the recesses on the surface of the ceramic substrate after the etching is cleaned using ultrasonic waves in an etching solution. It is characterized in that it is removed by
以下、この発明を実施するにあたっての材料と工程を中
心に実施例図面を援用しながら順次説明する。Hereinafter, materials and processes for carrying out the present invention will be sequentially explained with reference to the drawings.
(1)セラミックス基板
焼結したセラミックス基板1を用意する。セラミックス
基板の材種は、アルミナ、フォステライト、ステアタイ
ト、ジルコニア、ムライト、コージライト、ジルコン、
チタニア等の酸化物系セラミックス材料を主に用いるが
、炭化物系あるいは窒化物系等、任意のセラミックス材
料が導電回路を形成するための絶縁基板の対象となりう
る。(1) Ceramic substrate A sintered ceramic substrate 1 is prepared. Ceramic substrate materials include alumina, forsterite, steatite, zirconia, mullite, cordierite, zircon,
Although oxide-based ceramic materials such as titania are mainly used, any ceramic material such as carbide-based or nitride-based ceramic materials can be used as the insulating substrate for forming the conductive circuit.
(2)粗化工程 必要に応じて、セラミックス基板1の表面を粗化する。(2) Roughening process If necessary, the surface of the ceramic substrate 1 is roughened.
この粗化によって、後工程で形成される導体金属層2と
セラミックス基板1の表面とのアンカー効果による密着
力を向上させることができる。導体金属層2を前記の気
相法によって形成する場合には、特にこの粗化処理を行
わな(でもよいが、導体金属層2を化学めっき法などに
よって形成する場合は、この粗化処理を行うことが好ま
しい。This roughening can improve the adhesion between the conductive metal layer 2 to be formed in a later step and the surface of the ceramic substrate 1 due to the anchor effect. When the conductive metal layer 2 is formed by the above-mentioned vapor phase method, this roughening treatment is not particularly necessary (although it is okay to do so, when the conductive metal layer 2 is formed by a chemical plating method etc., this roughening treatment is not performed). It is preferable to do so.
粗化処理の方法はセラミックス基板1を、たとえば熱リ
ン酸、溶融アルカリ、弗化水素等の溶液中に浸漬する方
法、あるいは研磨やサンドブラスト−4=
等の物理的な粗化方法があるが、その他の粗化方法も採
用できる。Methods for roughening treatment include, for example, immersing the ceramic substrate 1 in a solution of hot phosphoric acid, molten alkali, hydrogen fluoride, etc., or physical roughening methods such as polishing and sandblasting. Other roughening methods can also be employed.
(3)導体金属層の形成工程
セラミックス基板1の表面の露出部分全体に、導体金属
層2を形成する。導体金属層2としでは、通常の導体回
路の構成材料として用いられる各種の金属材料が用いら
れ、その形成法としては、化学めっき、スパッタリング
、イオンブレーティング等通常の薄膜形成法の中から選
ばれた任意の方法で形成される。(3) Formation process of conductive metal layer The conductive metal layer 2 is formed on the entire exposed portion of the surface of the ceramic substrate 1. For the conductive metal layer 2, various metal materials used as constituent materials for ordinary conductor circuits are used, and the formation method thereof is selected from among ordinary thin film formation methods such as chemical plating, sputtering, and ion blasting. formed by any method.
化学めっきの場合には、通常のセンシクィジングーアク
チヘーション法を用いて、セラミックス基板1の表面に
金属パラジウムを析出させて表面を活性化させる。その
後、化学銅めっき浴等に前記活性化したセラミックス基
板1を浸漬し、銅等の導体金属層2を形成させる。In the case of chemical plating, metal palladium is deposited on the surface of the ceramic substrate 1 to activate the surface using a normal sensitizing-activation method. Thereafter, the activated ceramic substrate 1 is immersed in a chemical copper plating bath or the like to form a conductive metal layer 2 such as copper.
蒸着、スパッタリング、イオンブレーティング等の気相
法あるいはCVD法を用いて導体金属層2を形成するこ
ともできる。気相法を用いる場合は、第1工程でCrま
たはTIの金属層を形成し、その上に第2工程として銅
等の金属層を形成させる方法や、400°C程度に加熱
された粗面化済のセラミックス基板1に前記同様のCr
またはTiの活性化のための金属層及び銅等の導体金属
層2を順次形成する方法を採用することによって、セラ
ミックス基板1と導体金属層2との密着力を増大する。The conductive metal layer 2 can also be formed using a vapor phase method such as evaporation, sputtering, or ion blasting, or a CVD method. When using the vapor phase method, a metal layer of Cr or TI is formed in the first step, and a metal layer of copper or the like is formed thereon in the second step, or a rough surface heated to about 400°C is used. The same Cr as described above is applied to the ceramic substrate 1 which has already been cured.
Alternatively, by adopting a method of sequentially forming a metal layer for activating Ti and a conductive metal layer 2 such as copper, the adhesion between the ceramic substrate 1 and the conductive metal layer 2 can be increased.
(4)導体金属層の厚膜化工程
必要に応じて、前記の導体金属層2の上に電解めっきに
よって銅等の金属で厚膜化する。これは、前記化学めっ
きや気相法では、1〜数μm程度の薄い金属層しか形成
できないので、導体金属層2の厚みを大きくする必要が
ある場合に、この工程は有用である。(4) Step of thickening the conductive metal layer If necessary, the conductive metal layer 2 is thickened with a metal such as copper by electrolytic plating. This process is useful when it is necessary to increase the thickness of the conductive metal layer 2, since the chemical plating or vapor phase method described above can only form a thin metal layer of about 1 to several μm.
(5)エツチングレジスト層の形成工程この工程が終了
した段階の中間製品の断面図で示した第1図のとおり、
この工程では、セラミックス基板1の導体金属層2の上
に、エツチングレジスト層3を形成する。所定の回路パ
ターンにエツチングレジスト層3を形成するには、材料
としては、感光性を有する液状レジスト材料、あるいは
ドライフィルムを用い、これらの材料に応じて例えばス
クリーン印刷等で回路バクーンと同一のエツチングレジ
スト層3が形成される。通常のエツチングレジスト層の
形成法が適用できる。(5) Etching resist layer formation process As shown in Figure 1, which is a cross-sectional view of the intermediate product after this process is completed,
In this step, an etching resist layer 3 is formed on the conductive metal layer 2 of the ceramic substrate 1. In order to form the etching resist layer 3 in a predetermined circuit pattern, a photosensitive liquid resist material or a dry film is used as the material, and depending on these materials, the same etching as the circuit backing is performed by screen printing or the like. A resist layer 3 is formed. A normal etching resist layer formation method can be applied.
(6)エツチングによる導体回路の形成工程エツチング
によって、導電回路4として不要な部分の導体金属層を
除去する。エツチング液としては、塩化第2銅あるいは
塩化第2鉄等のエツチング液をあげることができるが、
その他通常のエツチング液を用いることができる。エツ
チング方法としては、限定されるものではなく、スプレ
ー法のみならずその他種々の方法を用いることができる
。(6) Formation process of conductor circuit by etching The portions of the conductor metal layer that are unnecessary as the conductor circuit 4 are removed by etching. As the etching solution, there may be mentioned an etching solution such as cupric chloride or ferric chloride.
Other common etching solutions can be used. The etching method is not limited, and not only the spray method but also various other methods can be used.
(7)銅銭の除去工程
エツチング処理後、セラミックス基板1の表面の凹部5
に残った銅銭6をエツチング液に浸漬しながら超音波洗
浄を行ってこの銅銭6を除去する。このときのエツチン
グ液としては、前記した導電回路4の形成工程において
用いたエツチング液と同種のエツチング液が用いられ、
これら前記のエツチング液よりもエツチング能力の小さ
い液が好ましい。これは、過度にエツチング効果がでる
と、導電回路4の線幅を細くするからである。エツチン
グ液は前記した液に制限するものではなく、例えば塩酸
等の酸性水溶液及び過硫酸ソーダ、過酸化水素系のエツ
チング液が挙げられる。(7) Copper coin removal process After the etching process, the recesses 5 on the surface of the ceramic substrate 1
The remaining copper coins 6 are removed by ultrasonic cleaning while immersing them in an etching solution. As the etching liquid at this time, the same type of etching liquid as that used in the process of forming the conductive circuit 4 described above is used,
A solution having a lower etching ability than the above-mentioned etching solutions is preferable. This is because if the etching effect occurs excessively, the line width of the conductive circuit 4 becomes thinner. The etching solution is not limited to the above-mentioned solutions, and includes, for example, acidic aqueous solutions such as hydrochloric acid, and etching solutions based on sodium persulfate and hydrogen peroxide.
(8)エツチングレジスト層の除去工程導電回路4上の
エツチングレジスト3を剥離除去する。剥離に用いる液
としては、NaOH,Na2c03等のアルカリ溶液、
その他の通常の剥離液を用いて、エツチングレジスト3
の付いたセラミックス回路板をこれらの剥離液に浸漬し
てもまたは表面にスプレーしても除去することができる
。(8) Etching resist layer removal process The etching resist 3 on the conductive circuit 4 is peeled off and removed. The liquid used for peeling includes alkaline solutions such as NaOH and Na2C03,
Etching resist 3 using other ordinary stripping liquid
Ceramic circuit boards with .
(9)仕上げ工程
エツチングレジスト3が除去されれば、セラミックス回
路板として完成するが、必要に応じて、仕上げ加工とし
て導電回路4の表面の研磨、脱脂、洗浄を行う。研磨量
は、0.1μm〜10μm程度が好ましく、さらには0
.2〜2μmが好ましい。研磨法は前記したように物理
的な方法が一般的である。(9) Finishing process Once the etching resist 3 is removed, the ceramic circuit board is completed. If necessary, the surface of the conductive circuit 4 is polished, degreased, and cleaned as a finishing process. The amount of polishing is preferably about 0.1 μm to 10 μm, more preferably 0.1 μm to 10 μm.
.. 2 to 2 μm is preferable. As described above, the polishing method is generally a physical method.
(作用)
この発明に係るセラミックス回路板の製法によると、導
電回路4とセラミックス基板1との密着力に寄与するセ
ラミックス基板1の表面の凹部5に残る銅銭6をエツチ
ング液で除去するに際して、凹部5に残った銅銭6を超
音波洗浄が有する揺すり出し作用により、エツチングの
能力の小さいエツチング液でも効果的に除去することが
できるので、配線抵抗の小さい銅の如き卑金属の線幅並
びに線間の極細の微細な回路パターンを有する導電回路
4を備え且つ導電回路4とセラミックス基板1との密着
力の高いセラミックス回路板を製造することができるの
である。(Function) According to the method for manufacturing a ceramic circuit board according to the present invention, when the copper coins 6 remaining in the recesses 5 on the surface of the ceramic substrate 1, which contribute to the adhesion between the conductive circuit 4 and the ceramic substrate 1, are removed using an etching solution, the recesses are removed. Due to the shaking action of ultrasonic cleaning, the remaining copper coins 6 can be effectively removed even with an etching solution with low etching ability. It is possible to manufacture a ceramic circuit board that is equipped with a conductive circuit 4 having an extremely fine circuit pattern and has a high adhesion between the conductive circuit 4 and the ceramic substrate 1.
[実施例] 次ぎにこの発明の実施例と比較例をあぜで挙げる。[Example] Next, Examples and Comparative Examples of the present invention will be listed below.
(実施例1)
焼結したセラミックス基板1としてアルミナ96重量%
のアルミナ基板(4/l’14 //×0.635〃)
を用い、このセラミックス基板1を熱燐酸に浸漬して基
板表面を均一に粗化した。この粗化によって、表面粗さ
が最大粗ざ3〜5μmになった。この表面には、10μ
m程度の四部5の存在が観察された。そしてこの粗化処
理した基板1を充分に洗浄乾燥した後、基板1の表面の
全面に化学めっきを施し、厚み10μmの銅層を形成し
て導体金属層2とした。(Example 1) 96% by weight of alumina as the sintered ceramic substrate 1
Alumina substrate (4/l'14 //×0.635〃)
The ceramic substrate 1 was immersed in hot phosphoric acid to uniformly roughen the surface of the substrate. This roughening resulted in a maximum surface roughness of 3 to 5 μm. On this surface, 10μ
The presence of four parts 5 on the order of m was observed. After thoroughly cleaning and drying the roughened substrate 1, chemical plating was applied to the entire surface of the substrate 1 to form a copper layer with a thickness of 10 μm to form a conductive metal layer 2.
次ぎにセラミックス基板1に形成された導体金属層2の
表面を研磨機によって研磨した後、l−ライフィルムを
導体金属層2にラミネートし、この導体金属層2の上に
写真法により回路パターンを形成した。ついでスプレー
を用いたエツチング処理によって、不要な導体金属層を
除去した。その結果、線幅、線間5μmの導電回路4が
得られたこの時点で、導電回路4が形成された中間製品
のセラミックス回路板を光学顕微鏡で観察したところ、
導電回路4を構成する線から逸脱した銅銭6の存在が観
察された。銅銭5を観察したこのセラミックス回路板を
過酸化水素のエツチング液中に浸漬した状態に保持して
超音波洗浄を行った。Next, after polishing the surface of the conductive metal layer 2 formed on the ceramic substrate 1 with a polishing machine, an L-lye film is laminated on the conductive metal layer 2, and a circuit pattern is formed on the conductive metal layer 2 by a photographic method. Formed. Then, unnecessary conductive metal layers were removed by etching using a spray. As a result, a conductive circuit 4 with a line width and a line spacing of 5 μm was obtained. At this point, the intermediate product ceramic circuit board on which the conductive circuit 4 was formed was observed with an optical microscope.
The presence of copper coins 6 deviating from the lines constituting the conductive circuit 4 was observed. The ceramic circuit board on which the copper coin 5 was observed was kept immersed in an etching solution of hydrogen peroxide and subjected to ultrasonic cleaning.
この工程でのエツチング液の浸漬によって、導電回路4
の線幅は、2μm狭くなった。さらにこの後ドライフィ
ルムのレジストを3%NaOH水溶液によって剥離除去
し、酸性の有機性水溶液で脱脂、洗浄を行い、セラミッ
クス回路板を得た。By immersing the etching liquid in this process, the conductive circuit 4
The line width was narrowed by 2 μm. Furthermore, after this, the resist of the dry film was peeled off with a 3% NaOH aqueous solution, and degreased and washed with an acidic organic aqueous solution to obtain a ceramic circuit board.
このようにして得られたセラミックス回路板に対して、
基板1の表面を光学顕微鏡で観察したところ、エツチン
グ液中で超音波洗浄を行う前のセラミックス基板1の凹
部5の銅銭6は、消失して観察されなかった。For the ceramic circuit board obtained in this way,
When the surface of the substrate 1 was observed with an optical microscope, the copper coins 6 in the recesses 5 of the ceramic substrate 1 before ultrasonic cleaning in the etching solution disappeared and were not observed.
(実施例2)
実施例1で用いたセラミックス基板と同一のセラミック
ス基板1を用い、この基板1の両面にスパッタリング法
によって、厚め10μmの銅層を形成して導体金属層2
とし、この導体金属層2の表面を研磨機によって物理的
に研磨した後、感光−11=
性の液状レジストを用いて写真法によりエツチングのた
めの回路パターンを形成した。ついで、スプレーを用い
たエツチング処理によって、不要な導体金属層を除去し
、線幅、線間70μmの導電回路4をセラミックス基板
上に形成した。(Example 2) Using the same ceramic substrate 1 as that used in Example 1, a 10 μm thick copper layer was formed on both sides of the substrate 1 by sputtering to form a conductive metal layer 2.
After physically polishing the surface of the conductive metal layer 2 using a polishing machine, a circuit pattern for etching was formed by photography using a photosensitive liquid resist. Next, unnecessary conductive metal layers were removed by etching using a spray, and a conductive circuit 4 having a line width of 70 μm between lines was formed on the ceramic substrate.
この時点で、導電回路4が形成された中間製品のセラミ
ックス回路板を光学顕微鏡で観察したところ、導電回路
4を構成する線から逸脱した銅銭6の存在が観察された
。銅銭6を観察したこのセラミックス回路板を過硫酸ソ
ーダ(40g/r)と硫酸(20g/42)の混合溶液
中に浸漬すると同時に超音波洗浄を行った。この浸漬に
よって、導電回路4の線幅は、1μm減少した。さらに
この後残ったエツチングレジスト3を3%NaOH水溶
液によって剥離除去し、酸性の有機性水溶液で脱脂、洗
浄を行い、セラミックス回路板を得たこのようにして得
られたセラミックス回路板に対して、基板1の表面を光
学顕微鏡で観察したところ、エッチング液中で超音波洗
浄を行う前のセラミックス基板の凹部5の銅銭6は、消
失して観察されなかった。At this point, when the intermediate product ceramic circuit board on which the conductive circuit 4 was formed was observed with an optical microscope, the presence of copper coins 6 deviating from the lines constituting the conductive circuit 4 was observed. The ceramic circuit board on which the copper coin 6 was observed was immersed in a mixed solution of sodium persulfate (40 g/r) and sulfuric acid (20 g/42), and simultaneously subjected to ultrasonic cleaning. Due to this immersion, the line width of the conductive circuit 4 was reduced by 1 μm. Further, the remaining etching resist 3 was peeled off with a 3% NaOH aqueous solution, and the ceramic circuit board was degreased and washed with an acidic organic aqueous solution. When the surface of the substrate 1 was observed with an optical microscope, the copper coins 6 in the recesses 5 of the ceramic substrate before ultrasonic cleaning in the etching solution disappeared and were not observed.
(実施例3)
焼結したセラミックス基板としてアルミナ99重量%の
アルミナ基板(4//X4//X0.635〃)を用い
、このセラミックス基板1を弗酸に浸漬して基板1の表
面を均一に粗化した。この粗化によって、表面粗さが最
大粗さ1〜2μmになった。そしてこの粗化処理したセ
ラミックス基板】の表面に化学めっきを施した後、電気
めっきを施し、厚み35μmの銅層を形成して導体金属
層2とした。(Example 3) An alumina substrate (4//X4//X0.635〃) containing 99% alumina by weight was used as the sintered ceramic substrate, and the ceramic substrate 1 was immersed in hydrofluoric acid to make the surface of the substrate 1 uniform. It became rough. This roughening resulted in a maximum surface roughness of 1 to 2 μm. The surface of this roughened ceramic substrate was chemically plated and then electroplated to form a 35 μm thick copper layer to form a conductive metal layer 2.
次ぎにセラミックス基板1に形成された導体金属層2の
表面を研磨機によ、って研磨した後、ドライフィルムを
導体金属層2にラミネートし、この導体金属層2の上に
写真法により回路パターンを形成した。ついでスプレー
を用いたエツチング処理によって、不要な導体金属層を
除去した。その結果、線幅、線間5μmの導電回路4が
得られたこの時点で、導電回路4が形成された中間製品
のセラミックス回路板を光学顕微鏡で観察したところ、
導電回路4を構成する線から逸脱した銅基6の存在、観
察された。銅基6を観察したこのセラミックス回路板を
過酸化水素のエツチング液中に浸漬した状態に保持して
超音波洗浄を行った。Next, after polishing the surface of the conductive metal layer 2 formed on the ceramic substrate 1 with a polishing machine, a dry film is laminated onto the conductive metal layer 2, and a circuit is formed on the conductive metal layer 2 by a photographic method. formed a pattern. Then, unnecessary conductive metal layers were removed by etching using a spray. As a result, a conductive circuit 4 with a line width and a line spacing of 5 μm was obtained. At this point, the intermediate product ceramic circuit board on which the conductive circuit 4 was formed was observed with an optical microscope.
The presence of copper bases 6 deviating from the lines constituting the conductive circuit 4 was observed. This ceramic circuit board, on which the copper substrate 6 was observed, was kept immersed in an etching solution of hydrogen peroxide and subjected to ultrasonic cleaning.
この工程でのエツチング液の浸漬によって、導電回路4
の線幅は、2μm狭くなった。さらにこの後ドライフィ
ルムのエツチングレジスト3を3%N a OH水溶液
によって剥離除去し、酸性の有機性水溶液で脱脂、洗浄
を行い、セラミックス回路1反を得た。By immersing the etching liquid in this process, the conductive circuit 4
The line width was narrowed by 2 μm. Thereafter, the etching resist 3 on the dry film was peeled off with a 3% NaOH aqueous solution, and degreased and washed with an acidic organic aqueous solution to obtain one ceramic circuit.
このようにして得られたセラミックス回路板に対して、
セラミックス基Fji1の表面を光学顕微鏡で観察した
ところ、エツチング液中で超音波洗浄を行う前のセラミ
ックス基板1の凹部5の銅基6は、消失して観察されな
かった。For the ceramic circuit board obtained in this way,
When the surface of the ceramic base Fji1 was observed using an optical microscope, it was found that the copper base 6 in the recess 5 of the ceramic substrate 1 before ultrasonic cleaning in the etching solution had disappeared and was not observed.
(実施例4)
焼結した窒化アルミ基板(4tt X 4 // ×0
、 635〃)をセラミックス基板1として用い、導
体金属層2となる銅層をスパンタリング法で厚め10μ
mに形成した。この導体金属層2に研磨を施す工程から
最終の脱脂、洗浄の工程は、実施例1と同一の条件で行
った。(Example 4) Sintered aluminum nitride substrate (4tt
, 635〃) as the ceramic substrate 1, and the copper layer that will become the conductive metal layer 2 is made 10μ thick by sputtering method.
It was formed into m. The process of polishing the conductive metal layer 2 to the final degreasing and cleaning process were performed under the same conditions as in Example 1.
エツチング処理によって、不要な導体金属層を除去する
ことによって形成された導電回路4を有する中間製品の
セラミックス回路板を光学顕微鏡で観察したところ、導
電回路4を構成する線から逸脱した銅基6の存在が観察
された。そして酸性の有機性水溶液で脱脂、洗浄を行っ
たセラミックス回路板を同様にして光学顕微鏡で観察し
たところ、エツチング液中で超音波洗浄を行う前のセラ
ミックス基板1の凹部5の銅基6は、消失して観察され
なかった。When an intermediate product ceramic circuit board having a conductive circuit 4 formed by removing unnecessary conductive metal layers through an etching process was observed with an optical microscope, it was found that the copper substrate 6 deviated from the lines constituting the conductive circuit 4. presence was observed. When a ceramic circuit board that had been degreased and cleaned with an acidic organic aqueous solution was similarly observed under an optical microscope, it was found that the copper base 6 in the recess 5 of the ceramic substrate 1 before ultrasonic cleaning in the etching solution was Disappeared and was not observed.
[発明の効果]、。[Effect of the invention],.
この発明に係るセラミックス回路板の製法によると、セ
ラミックス基板の表面の例えば凹部に残った銅基をエッ
チング液で除去するに際して、超音波洗浄が有する揺す
り出し作用によりエツチングの能力の小さいエツチング
液でも効果的に除去することができるので、線幅並びに
線間を保った極細の微細な回路パターンを有する導体回
路を備えたセラミックス回路板を製造することができる
のである。According to the method for manufacturing a ceramic circuit board according to the present invention, when removing copper bases remaining in, for example, recesses on the surface of a ceramic substrate with an etching solution, even an etching solution with low etching ability is effective due to the shaking action of ultrasonic cleaning. Therefore, it is possible to manufacture a ceramic circuit board with a conductor circuit having an extremely fine circuit pattern with the same line width and line spacing maintained.
第1図、第2図は、この発明の実施例に係り、第1図は
、セラミックス基板の表面に形成された導体金属層とこ
の導体金属層を回路パターンに合わせて覆うレジストか
ら成るエツチング処理前のセラミックス回路板の中間製
品の拡大した要部断面図であり、第2図は、セラミック
ス基板の表面の凹部に残った銅基を有するセラミックス
回路板の中間製品の拡大した要部断面図である。
■・・・・・・・・・・・・セラミックス基板2・・・
・・・・・・・・・導体金属層3・・・・・・・・・・
・・エツチングレジスト4・・・・・・・・・・・・導
電回路
5・・・・・・・・・・・・凹部
6・・・・・・・・・・・・銅残1 and 2 relate to an embodiment of the present invention, and FIG. 1 shows an etching process consisting of a conductive metal layer formed on the surface of a ceramic substrate and a resist covering this conductive metal layer in accordance with a circuit pattern. FIG. 2 is an enlarged cross-sectional view of the main parts of the previous intermediate product of the ceramic circuit board, and FIG. be. ■・・・・・・・・・ Ceramic substrate 2...
......Conductor metal layer 3...
...Etching resist 4...Conductive circuit 5...Concavity 6...Copper residue
Claims (2)
て、前記導体金属層を所定パターンのエッチングレジス
ト層で覆った後、エッチング処理して回路形成を行うセ
ラミックス回路板の製法において、前記エッチング処理
の後にセラミックス基板の表面の凹部に残った銅残を、
エッチング液中で超音波洗浄を行うことによって除去す
ることを特徴とするセラミックス回路板の製法。(1) In a method for manufacturing a ceramic circuit board, in which a ceramic circuit board on which a conductive metal layer is formed is covered with an etching resist layer having a predetermined pattern, and then subjected to an etching process to form a circuit, the etching process is performed. Remove the copper residue remaining in the recesses on the surface of the ceramic substrate after
A method for manufacturing a ceramic circuit board, characterized in that the removal is performed by ultrasonic cleaning in an etching solution.
凹部にアンカー効果をもって接合された請求項1記載の
セラミックス回路板の製法。(2) The method for manufacturing a ceramic circuit board according to claim 1, wherein the conductive metal layer is bonded to the recessed portion of the surface of the ceramic substrate with an anchor effect.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29618190A JPH04168787A (en) | 1990-10-31 | 1990-10-31 | Manufacture of ceramic circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29618190A JPH04168787A (en) | 1990-10-31 | 1990-10-31 | Manufacture of ceramic circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04168787A true JPH04168787A (en) | 1992-06-16 |
Family
ID=17830216
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29618190A Pending JPH04168787A (en) | 1990-10-31 | 1990-10-31 | Manufacture of ceramic circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04168787A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013055264A (en) * | 2011-09-05 | 2013-03-21 | Toshiba Corp | Manufacturing method of ceramic copper circuit board |
-
1990
- 1990-10-31 JP JP29618190A patent/JPH04168787A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013055264A (en) * | 2011-09-05 | 2013-03-21 | Toshiba Corp | Manufacturing method of ceramic copper circuit board |
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