JPH04167596A - Multilayer wiring board - Google Patents
Multilayer wiring boardInfo
- Publication number
- JPH04167596A JPH04167596A JP29602590A JP29602590A JPH04167596A JP H04167596 A JPH04167596 A JP H04167596A JP 29602590 A JP29602590 A JP 29602590A JP 29602590 A JP29602590 A JP 29602590A JP H04167596 A JPH04167596 A JP H04167596A
- Authority
- JP
- Japan
- Prior art keywords
- conductor wiring
- benzocyclobutene resin
- wiring
- insulator
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims abstract description 33
- 239000012212 insulator Substances 0.000 claims abstract description 33
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims abstract description 25
- 239000011347 resin Substances 0.000 claims abstract description 24
- 229920005989 resin Polymers 0.000 claims abstract description 24
- 239000011229 interlayer Substances 0.000 claims description 22
- 230000003647 oxidation Effects 0.000 abstract description 7
- 238000007254 oxidation reaction Methods 0.000 abstract description 7
- 230000007797 corrosion Effects 0.000 abstract description 6
- 238000005260 corrosion Methods 0.000 abstract description 6
- 238000005530 etching Methods 0.000 abstract description 4
- 230000006866 deterioration Effects 0.000 abstract description 3
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 2
- 238000000034 method Methods 0.000 abstract 1
- 229920001721 polyimide Polymers 0.000 description 15
- 239000010410 layer Substances 0.000 description 14
- 239000009719 polyimide resin Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 5
- 239000000758 substrate Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000007774 longterm Effects 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000006297 dehydration reaction Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は集積度の高いLSI実装用基板に関して、微細
かつ高多層配線ができ、高密度実装が可能な多層配線基
板に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a highly integrated LSI mounting board, and relates to a multilayer wiring board that allows fine and highly multilayered wiring and enables high density mounting.
(従来の技術)
従来、この種の多層配線基板は、配線抵抗の低いCuを
主成分とする導体配線と、ポリイミド樹脂からなる導体
配線の層間絶縁体から構成されていた。(Prior Art) Conventionally, this type of multilayer wiring board has been composed of conductive wiring mainly composed of Cu having low wiring resistance and an interlayer insulator of the conductive wiring made of polyimide resin.
第3図に従来技術による多層配線基板の構成図を示す。FIG. 3 shows a configuration diagram of a multilayer wiring board according to the prior art.
基板31の表面に導体層32が設けられる。この導体層
32はCr/Pd/Cu、あるいはCr/Cu/Cr膜
などの複数層構成を有している。そして全表面に感光性
を有したポリイミド樹脂層間絶縁膜33をコーティング
し、光によりピアホール34が形成される。この上にさ
らに導体配線層35が形成される。A conductor layer 32 is provided on the surface of the substrate 31. This conductor layer 32 has a multilayer structure such as Cr/Pd/Cu or Cr/Cu/Cr film. Then, the entire surface is coated with a photosensitive polyimide resin interlayer insulating film 33, and a pier hole 34 is formed by light. A conductive wiring layer 35 is further formed on this.
(発明が解決しようとする課題)
上述した従来の多層配線基板は、層間絶縁体に用いてい
るポリイミド樹脂の硬化温度が高く、また硬化中におい
て脱水反応があり、さらには硬化膜の吸水性が大きいの
で、配線抵抗の低いCuを主成分とする導体配線を用い
た場合、Cu配線の酸化、腐食などを引き起こす欠点が
ある。(Problems to be Solved by the Invention) In the conventional multilayer wiring board described above, the curing temperature of the polyimide resin used for the interlayer insulator is high, and there is a dehydration reaction during curing, and furthermore, the water absorption of the cured film is low. Since it is large, when a conductor wiring mainly composed of Cu, which has low wiring resistance, is used, there is a drawback that it causes oxidation, corrosion, etc. of the Cu wiring.
さらには層間絶縁体にポリイミドを用いているため、C
uイオンがポリイミド樹脂絶縁体中に拡散してしまい。Furthermore, since polyimide is used for the interlayer insulator, C
U ions diffuse into the polyimide resin insulator.
このためイオンのマイグレーションを引き起こし、絶縁
性が著しく低下するという欠点もある。This also has the disadvantage of causing ion migration and significantly lowering the insulation properties.
このため層間絶縁体にポリイミド樹脂を用いた従来の多
層配線基板では、Cuを主成分とする導体配線を用いる
にあたり、長期信頼性に欠くという問題点がある。For this reason, conventional multilayer wiring boards using polyimide resin as interlayer insulators have a problem in that they lack long-term reliability when using conductor wiring whose main component is Cu.
一方エレクトロニクス機器の高性能、高機能化の要求に
対し、高速伝送に対応した材料が必要となる。高速伝送
では特性インピーダンスを整合させ、かつ信号の伝播遅
延時間の短縮が要求されている。信号伝播遅延時間Tは
次式で示される。On the other hand, in response to demands for higher performance and higher functionality in electronic equipment, materials that can support high-speed transmission are needed. High-speed transmission requires matching of characteristic impedance and reduction of signal propagation delay time. The signal propagation delay time T is expressed by the following equation.
T−K・−
(ただし、C:光速、ε:層間絶縁体の誘電率、K:定
数)すなわち層間絶縁体の誘電率が低いほど信号伝播遅
延時間は短縮され、高速化が実現される。T-K.- (C: speed of light, ε: dielectric constant of interlayer insulator, K: constant) That is, the lower the dielectric constant of the interlayer insulator, the shorter the signal propagation delay time and the higher the speed.
上述した従来の多層配線基板は、層間絶縁体に用いてい
るポリイミド樹脂の誘電率が3.5程度となっており、
信号伝播遅延時間が長くなるという欠点がある。In the conventional multilayer wiring board described above, the dielectric constant of the polyimide resin used for the interlayer insulator is approximately 3.5.
The disadvantage is that the signal propagation delay time becomes longer.
なお誘電率は、ASTM D150の測定法において、
10Hzの周波数での値を用いる。Note that the dielectric constant is determined by the ASTM D150 measurement method.
The value at a frequency of 10 Hz is used.
(課題を解決するための手段)
前述したように、配線抵抗の低いCuを主成分とした導
体配線を用いるにあたり、ポリイミド樹脂を層間絶縁膜
として用いた場合、諸問題が発生している。これらの問
題を解決するため鋭意工夫を行なった。(Means for Solving the Problems) As described above, various problems occur when polyimide resin is used as an interlayer insulating film when using conductor wiring mainly composed of Cu, which has low wiring resistance. We worked hard to solve these problems.
その結果、本発明の多層配線基板は、配線抵抗の低いC
uを主成分とする導体配線とベンゾシクロブテン樹脂か
らなる層間絶縁体を有する構成、あるいは導体配線と導
体配線の層間絶縁体との層間にベンゾシクロブテン樹脂
を介した構成となっている。As a result, the multilayer wiring board of the present invention has low wiring resistance.
The structure has a conductor wiring whose main component is u and an interlayer insulator made of benzocyclobutene resin, or a structure in which benzocyclobutene resin is interposed between the conductor wiring and the interlayer insulator of the conductor wiring.
(作用)
このベンゾシクロブテン樹脂は200°C1もしくはそ
れ以下で硬化させることができ、また硬化膜は耐湿性に
も優れている。このためCu導体配線層上に、直接ベン
ゾシクロブテン樹脂を形成し、ベンゾシクロブテン樹脂
層間絶縁体を構成することにより、Cu配線の酸化、腐
食を防ぐことができる。(Function) This benzocyclobutene resin can be cured at 200°C or lower, and the cured film also has excellent moisture resistance. Therefore, by forming benzocyclobutene resin directly on the Cu conductor wiring layer to form a benzocyclobutene resin interlayer insulator, oxidation and corrosion of the Cu wiring can be prevented.
またはまず低温で膜が形成可能なベンゾシクロブテン樹
脂で導体配線を介して、そのあとにポリイミド樹脂絶縁
体などを形成することにより導体配線の酸化を防ぐこと
ができる。またポリイミド樹脂絶縁体中へのCuイオン
拡散を防ぎ、イオンのマイグレーションによる絶縁性の
低下も防ぐことができる。Alternatively, oxidation of the conductor wiring can be prevented by first forming the conductor wiring using benzocyclobutene resin that can form a film at low temperatures, and then forming a polyimide resin insulator or the like. Further, it is possible to prevent Cu ions from diffusing into the polyimide resin insulator, and to prevent deterioration in insulation properties due to ion migration.
さらには硬化したベンゾシクロブテン樹脂は耐湿性にも
優れていることから、長期的な導体配線の酸化、腐食を
防ぐことができる。Furthermore, since the cured benzocyclobutene resin has excellent moisture resistance, it can prevent long-term oxidation and corrosion of conductor wiring.
一方、ベンゾシクロブテン樹脂の誘電率は2.6と従来
のポリイミドよりも低く、これを層間絶縁体として用い
ることにより、信号伝播遅延時間を短縮することができ
る。On the other hand, the dielectric constant of benzocyclobutene resin is 2.6, which is lower than that of conventional polyimide, and by using it as an interlayer insulator, signal propagation delay time can be shortened.
(実施例) 次に本発明について図面を参照して説明する。(Example) Next, the present invention will be explained with reference to the drawings.
第1図は層間絶縁体にベンゾシクロブテン樹脂を有する
本発明の一実施例の構成図である。FIG. 1 is a structural diagram of an embodiment of the present invention having benzocyclobutene resin as an interlayer insulator.
、シリコン、サファイア、あるいはアルミナなどを主成
分とするセラミックなどからなる基板11の表面に、C
uを主成分とする導体配線層12が設けられる。, C on the surface of the substrate 11 made of silicon, sapphire, or ceramic whose main component is alumina.
A conductor wiring layer 12 containing u as a main component is provided.
そして全表面にベンゾシクロブテン樹脂絶縁体13をコ
ーティングしたのち、この表面にフォトレジストでパタ
ーン形成させ、ベンゾシクロブテンをエツチングするこ
とにより、ピアホール14を得ることができる。エツチ
ングにはプラズマエツチャーを用いることができ、ガス
はCFと0 ある4 2ゝ
いはSF6と02混合ガスが適当である。After coating the entire surface with a benzocyclobutene resin insulator 13, a pattern is formed on this surface with photoresist, and the benzocyclobutene is etched to obtain the pier holes 14. A plasma etcher can be used for etching, and a suitable gas is a mixed gas of CF and 042 or SF6 and 02.
ピアホール形成後、導体配線層15は、全表面にCuス
パッタ膜を形成しエツチングして得るか、あるいは全表
面にCrスパッタ膜を形成したのち、Cuスパッタ膜あ
るいはめっきCu箔を形成することにより得ることがで
きる。After forming the peer hole, the conductor wiring layer 15 can be obtained by forming a Cu sputtered film on the entire surface and etching it, or by forming a Cr sputtered film on the entire surface and then forming a Cu sputtered film or a plated Cu foil. be able to.
第2図は導体配線と導体配線の層間絶縁体との層間にベ
ンゾシクロブテン樹脂を介した構成を含む、本発明の一
実施例の構成図である。FIG. 2 is a configuration diagram of an embodiment of the present invention including a configuration in which benzocyclobutene resin is interposed between the conductor wiring and the interlayer insulator of the conductor wiring.
シリコン、サファイア、あるいはアルミナなどを主成分
とするセラミックなどからなる基板21の表面に、導体
配線層22が設けられる。この導体配線層22は複数個
からなり、最下層にはCrあるいはTiスパッタ膜を用
いることができ、上層にはCu。A conductor wiring layer 22 is provided on the surface of a substrate 21 made of silicon, sapphire, or ceramic whose main component is alumina. This conductive wiring layer 22 is made up of a plurality of layers, and a sputtered film of Cr or Ti can be used as the bottom layer, and Cu as the upper layer.
Au、 Alなとを用いることができる。Au, Al, etc. can be used.
そして全表面にベンゾシクロブテン樹脂絶縁体23をコ
ーティングしたのち硬化させ、その上にさらにポリイミ
ド樹脂絶縁体24をコーティングする。Then, the entire surface is coated with a benzocyclobutene resin insulator 23 and then cured, and a polyimide resin insulator 24 is further coated thereon.
この絶縁体24のポリイミドは感光性を有し、光でパタ
ーン形成ができる。パターン形成したポリイミド樹脂絶
縁体24自体をそのままマスクとして用いて、ベンゾシ
クロブテン樹脂絶縁体23をエツチングすることができ
、これによりピアホール25を容易に形成することがで
きる。エツチングにはプラズマエツチャーを用いること
ができ、ガスはCF4と02、あるいはSF6と02混
合ガスが適当である。The polyimide of this insulator 24 has photosensitivity and can be patterned with light. The patterned polyimide resin insulator 24 itself can be used as a mask to etch the benzocyclobutene resin insulator 23, thereby making it possible to easily form the pier holes 25. A plasma etcher can be used for etching, and a suitable gas is CF4 and 02, or a mixed gas of SF6 and 02.
導体配線層26は複数個から構成され、ピアホール形成
後、全表面にCr、あるいはTiスパッタ膜を形成した
のち、Cu、 Au、 Al膜などを形成することによ
り得ることができる。The conductive wiring layer 26 is composed of a plurality of layers, and can be obtained by forming a Cr or Ti sputtered film on the entire surface after forming a peer hole, and then forming a Cu, Au, Al film, etc.
(発明の効果)
以上説明したように、本発明の多層配線基板は、導体配
線の層間絶縁体にベンゾシクロブテン樹脂を有するか、
あるいは導体配線と導体配線の層間絶縁体との層間にベ
ンゾシクロブテン樹脂を介した構成を有することにより
、Cu導体配線の酸化、腐食を防ぎ、またCuイオンの
マイグレーションによる絶縁性の低下を防ぐことができ
る効果がある。(Effects of the Invention) As explained above, the multilayer wiring board of the present invention has benzocyclobutene resin in the interlayer insulator of the conductor wiring, or
Alternatively, by having a structure in which benzocyclobutene resin is interposed between the conductor wiring and the interlayer insulator of the conductor wiring, oxidation and corrosion of the Cu conductor wiring can be prevented, and a decrease in insulation properties due to migration of Cu ions can be prevented. It has the effect of
これにより配線抵抗の低いCuを主成分とする導体配線
を有した微細かつ高多層配線を形成することができ、高
密度実装が可能な多層配線基板を提供することができる
。As a result, it is possible to form fine and highly multilayer wiring having conductor wiring mainly composed of Cu having low wiring resistance, and to provide a multilayer wiring board that can be mounted at high density.
またベンゾシクロブテン樹脂は誘電率が2.6と低く、
これを層間絶縁体として用いることにより、信号伝播遅
延時間が短縮されるという効果もある。In addition, benzocyclobutene resin has a low dielectric constant of 2.6,
Using this as an interlayer insulator also has the effect of shortening signal propagation delay time.
第1図は層間絶縁体にベンゾシクロブテン樹脂を有する
本発明の一実施例の構成図である。
第2図は導体配線と導体配線の層間絶縁体との層間に、
ベンゾシクロブテン樹脂を介した構成を有する本発明の
一実施例の構成図である。
第3図は従来技術による多層配線基板の構成図である。
図において、11.21.31・・・基板、12.15
.22.26.32゜35・・・導体配線層、13.2
3・・・ベンゾシクロブテン樹脂絶縁体、14.25.
34・・・ピアホール、24.33・・・ポリイミド樹
脂絶縁体である。FIG. 1 is a structural diagram of an embodiment of the present invention having benzocyclobutene resin as an interlayer insulator. Figure 2 shows that between the conductor wiring and the interlayer insulator of the conductor wiring,
FIG. 1 is a configuration diagram of an embodiment of the present invention having a configuration using benzocyclobutene resin. FIG. 3 is a block diagram of a multilayer wiring board according to the prior art. In the figure, 11.21.31... substrate, 12.15
.. 22.26.32°35... Conductor wiring layer, 13.2
3...benzocyclobutene resin insulator, 14.25.
34... Pier hole, 24.33... Polyimide resin insulator.
Claims (2)
ロブテン樹脂を導体配線の層間絶縁体に用いることを特
徴とする多層配線基板。(1) A multilayer wiring board characterized in that it has conductor wiring mainly composed of Cu and uses benzocyclobutene resin as an interlayer insulator of the conductor wiring.
ンゾシクロブテン樹脂を介した構造を含むことを特徴と
する多層配線基板。(2) A multilayer wiring board characterized by including a structure with benzocyclobutene resin interposed between the conductor wiring and the interlayer insulator of the conductor wiring.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29602590A JPH0719973B2 (en) | 1990-10-31 | 1990-10-31 | Multilayer wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29602590A JPH0719973B2 (en) | 1990-10-31 | 1990-10-31 | Multilayer wiring board |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8112558A Division JP2917909B2 (en) | 1996-05-07 | 1996-05-07 | Method for manufacturing multilayer wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04167596A true JPH04167596A (en) | 1992-06-15 |
JPH0719973B2 JPH0719973B2 (en) | 1995-03-06 |
Family
ID=17828143
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29602590A Expired - Fee Related JPH0719973B2 (en) | 1990-10-31 | 1990-10-31 | Multilayer wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0719973B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07161867A (en) * | 1993-12-10 | 1995-06-23 | Nec Corp | Semiconductor package |
JP2000003037A (en) * | 1999-01-11 | 2000-01-07 | Nec Corp | Wiring structure and its production |
US6140225A (en) * | 1997-06-27 | 2000-10-31 | Nec Corporation | Method of manufacturing semiconductor device having multilayer wiring |
US6392297B2 (en) | 1996-03-29 | 2002-05-21 | Tokin Corporation | Electronic circuit element of conductor/insulator stacked type using high machinability substrate and benzocyclobutene as insulator |
JP2011124568A (en) * | 1995-06-06 | 2011-06-23 | Lg Display Co Ltd | Liquid crystal display |
JP2011129575A (en) * | 2009-12-15 | 2011-06-30 | Tdk Corp | Electronic component |
-
1990
- 1990-10-31 JP JP29602590A patent/JPH0719973B2/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07161867A (en) * | 1993-12-10 | 1995-06-23 | Nec Corp | Semiconductor package |
US5483101A (en) * | 1993-12-10 | 1996-01-09 | Nec Corporation | Multilayer printed circuit board |
JP2011124568A (en) * | 1995-06-06 | 2011-06-23 | Lg Display Co Ltd | Liquid crystal display |
US6392297B2 (en) | 1996-03-29 | 2002-05-21 | Tokin Corporation | Electronic circuit element of conductor/insulator stacked type using high machinability substrate and benzocyclobutene as insulator |
US6140225A (en) * | 1997-06-27 | 2000-10-31 | Nec Corporation | Method of manufacturing semiconductor device having multilayer wiring |
JP2000003037A (en) * | 1999-01-11 | 2000-01-07 | Nec Corp | Wiring structure and its production |
JP2011129575A (en) * | 2009-12-15 | 2011-06-30 | Tdk Corp | Electronic component |
Also Published As
Publication number | Publication date |
---|---|
JPH0719973B2 (en) | 1995-03-06 |
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