JPH0416501Y2 - - Google Patents

Description

[Detailed explanation of the invention] [Purpose of the invention] (Field of industrial application) This invention is based on PLL (Phase Lock Loop)
The present invention relates to an electronic tuning device using a synthesizer, and particularly to an electronic tuning device that allows easy adjustment of the oscillation frequency of a reference frequency generator that generates a reference frequency to be input to a PLL.

(Prior Art) In this type of electronic tuning device, the oscillation frequency 0 of a local oscillation circuit (hereinafter referred to as OSC), the reception frequency r, and the intermediate frequency i have the following relationship.

0=r±i Then, in order to lock the frequency so that the oscillation frequency 0 of the above OSC becomes the value of the above formula,
A PLL synthesizer is provided.

Here, this type of PLL operates by inputting a reference frequency from a reference frequency generator such as a crystal oscillator, but if the reference frequency is input out of sync, accurate tuning cannot be achieved. Furthermore, if the output of the crystal oscillator is used to display a clock, the displayed time will be incorrect.

For this reason, in the manufacturing process of radio receivers and the like, a process of adjusting the oscillation frequency of the reference frequency generator has traditionally been essential.

Here, in the conventional adjustment of the reference frequency, the output of the local oscillator when a predetermined frequency is received is input into an external counter, the output frequency of the local oscillator is displayed on this counter, and this display value is set to a predetermined value. The capacitance of the variable capacitor of the oscillation circuit connected to the crystal oscillator was adjusted using a screwdriver so that the value was within the range.

(Problems to be Solved by the Invention) The counter display described above digitally displays the frequency in Hz units, and the frequency is displayed in about seven digits. To adjust the capacitance of the variable capacitor, the driver must be adjusted so that, for example, the lower two digits of the seven-digit value fall within a predetermined value.

Although such adjustment work was extremely complicated,
Until now, no improvements have been proposed to simplify these operations.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems and to provide an electronic tuning device that allows easy adjustment of the oscillation frequency of a reference frequency generator.

[Structure of the invention] (Means for solving the problem) The invention includes a tuned circuit, a local oscillator that outputs an oscillation frequency to be frequency-mixed with the received frequency from the tuned circuit, and a PLL circuit that locks the oscillation frequency of the local oscillator to a frequency that is an integer multiple or a fraction of the difference or sum of the receiving frequency and the intermediate frequency; a reference frequency generator that generates a reference frequency; an intermediate frequency counter that counts an intermediate frequency from the frequency mixer based on a reference frequency from the reference frequency generator; and adjustment of the reference frequency. In the mode, the control means is provided for comparing the count output when a reference signal is input to the intermediate frequency counter and the corresponding expected value, and calculating and outputting the comparison difference.

(Function) The intermediate frequency counter is originally used to determine whether or not the electronic tuning device is correctly tuned to the reception frequency that is automatically tuned at predetermined frequency intervals during the Seek mode.

In the present invention, this intermediate frequency counter is also used as a counter for adjusting the oscillation frequency of the reference frequency generator.

That is, in the reference frequency adjustment mode, a reference signal is externally input to the intermediate frequency counter. This reference signal is counted in the intermediate frequency counter based on a frequency whose source is the same as the reference frequency to the PLL circuit.

Here, assuming that the reference frequency is set to a correct value, the expected value when counting the reference signal can be determined in advance.
Then, the control section compares this expected value with the count value of the reference signal to find out how much the reference frequency deviates from the predetermined value.

In the present invention, the deviation of this reference frequency is calculated by the intermediate frequency counter and control section built into the electronic tuning device, so it can be detected by the device itself without relying on an external counter as in the past. Since the frequency counter itself is originally built into the electronic tuning device of the digital tuning system, the function of the existing member can also be used for adjusting the reference frequency.

Various methods can be considered for how to reflect this calculated frequency shift data in the reference frequency adjustment. For example, this frequency deviation data can be displayed on the display section of the electronic tuning device, and an operator can adjust the trimmer capacitor or the like provided in the oscillation circuit of the reference frequency generator by looking at the displayed value.

Alternatively, the reference frequency may be automatically adjusted by providing a reactance variable section that varies the reactance of the oscillation circuit of the reference frequency generator and varying the reactance based on the frequency deviation data output from the control section. can. In this case, the frequency deviation data is stored in a storage section, and each time power is turned on to the control section, reference frequency oscillator, and variable reactance section, the frequency deviation data is read out from the storage section and the variable reactance section is activated. Settings can also be controlled.

(Example) Hereinafter, the present invention will be specifically explained with reference to the illustrated example.

FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.

The electronic tuning device shown in the figure is a tuning device for a multi-band radio receiver that can receive AM, FM, etc., but since the configuration of the tuning section for each band is almost the same, the FM tuning section will be explained here. I will explain about it.

In the figure, 1 is an antenna, 2 is an ANT tuning circuit, 3 is an RF amplifier, 4 is an RF tuning circuit, 5 is a frequency mixer, and 6 is an IF amplifier.

A voltage-controlled local oscillator (hereinafter also referred to as VCO) 7 outputs the local oscillation frequency mixed by the mixer 5, and the oscillation frequency of this VCO 7 is, for example, the sum of the reception frequency and the intermediate frequency. A PLL circuit 8 that locks to the frequency is provided,
The output of this PLL circuit 8 is applied to a varactor (not shown) of the VCO 7. Note that the voltage applied to the varactors built in the ANT tuning circuit 2 and the RF tuning circuit 4 is the same as that of the PLL circuit 8.
Alternatively, as proposed in Japanese Patent Application No. 62-47156 by the present applicant, a varactor applied voltage calculated by the control unit 12, which will be described later, may be used.

The PLL 8 includes a programmable counter 8A,
It is composed of a frequency divider 8B, a phase comparator 8C, and a low pass filter (hereinafter abbreviated as LPF) 8D. The frequency divider 8B divides the reference frequency from the crystal oscillator 9, which is a reference frequency generator, and outputs this frequency divided output to the phase comparator 8C, as well as an IF counter 11 whose details will be described later.
and is also output to the control section 12.
Thus, the output of frequency divider 8B is used as the system clock for this electronic tuning device.

Further, a reactance variable section 10 is connected to the crystal oscillator 9, and this reactance variable section 1
0, the oscillation frequency of the crystal oscillator 9 can be adjusted by varying the reactance of the oscillation circuit under the control of the control section 12.

The IF counter (abbreviation for intermediate frequency counter) 11 is normally used when seeking the reception frequency, and inputs the intermediate frequency output from the frequency mixer 5, for example, as an input pulse, and calculates the frequency by dividing the frequency. The intermediate frequency is counted using the divided output from the device 8B as a gate pulse. In the present invention, the counter is also used for adjusting the oscillation frequency of the reference frequency generator 9, so that in this adjustment mode, a reference signal can be input from the outside instead of the intermediate frequency.

The control section 12 is responsible for controlling this electronic tuning device, and is designed to receive the frequency-divided output of the frequency-divided supply 8B as a system clock. In addition to the programmable counter 8A and the IF counter 11, this control unit 12 includes a ROM
(Read-only memory) 13, RAM (Random Access Memory) 14, display section 15, operation keys 16, and EEPROM 17 as a storage section are connected.

When a channel selection command is received by pressing a preset switch, using Seek mode, etc., the control unit 12 controls the display data of the selected received frequency, the
The programmable counter 8A of the PLL circuit 8
The hex value for the ROM 13 is calculated on the RAM 14 based on the data stored in advance in the ROM 13, and the reception operation is set and controlled.
62-47156, the above ANT,
The voltage applied to each varactor of the RF tuning circuits 2 and 4 is calculated respectively.

Furthermore, the control section 12 executes the following control in the Seek mode. That is, a hex value corresponding to the reception frequency is set in the programmable counter 8A for each predetermined frequency. At this time, after setting the hex value, the intermediate frequency outputted through the frequency mixer 5 is
The intermediate frequency count value is input to the IF counter 11, and the count value of this intermediate frequency is input to the control unit 12.
The control unit 12 determines whether or not the intermediate frequency is within a predetermined range. If it is within the range, reception tuning is being performed correctly, but if it is outside the range, tuning is incorrect. Since this is appropriate, a new hex value is reset in the programmable counter 8A to control the synchronization during Seek.

Furthermore, the control section 12 is adapted to control the adjustment of the oscillation frequency of the reference frequency generator 9 as a characteristic control of the present invention.

That is, as mentioned above, in the adjustment mode, a reference signal is inputted from the outside to the intermediate frequency counter 11, and the IF counter 11 uses the divided output of the frequency divider 8B as a gate pulse, and uses this divided output as a gate pulse. The pulses of the reference signal input while the frequency output is High are counted. Here, the control unit 12 stores an expected value that is the result of counting the reference signal when the reference frequency is a correct value. Then, the control unit 12 compares the count value actually counted from the reference signal using the frequency-divided output, which is a value unique to the set, with the expected value, and calculates the reactance variable value from the comparison difference. . Furthermore, in this embodiment, the control section 12 controls the storage of the comparison difference output in the EEPROM 17, and in the subsequent reception mode, reads out the reactance variable value and controls the reactance variable section 10. , the oscillation frequency adjustment of the reference frequency generator 9 is automatically executed.

Next, the configuration of the reactance variable section 10 controlled by the control section 12 will be explained.

FIG. 2 is a circuit diagram showing an example of the configuration of the reactance variable section 10. In the figure, the reference frequency oscillation circuit connects capacitors C5 and C6 of a predetermined capacity, one end of which is grounded, to both ends of a crystal oscillation element 9A, and the outputs from both ends of the crystal oscillation element 9A are used as the oscillation output of the oscillation circuit. . The reactance variable section 10 includes first to fourth capacitors C1 connected in parallel to one end of the crystal oscillation element 9A.
-C4 are provided, and control terminals P1-P4 are connected to the other end side of each capacitor via switching elements S1-S4. It is assumed that the capacitance of each of the capacitors is C1=1P C2=2P C3=3P C4=4P, and that the control terminal P4 is selectively connected before the oscillation frequency is adjusted.

The operation of the electronic tuning device configured as above will be explained.

First, the oscillation frequency adjustment mode of the reference frequency generator 9, which is a characteristic operation of the device of this embodiment, will be explained.

This adjustment mode is determined by the control unit 12 by, for example, randomly operating operation keys on an operation panel provided on the electronic tuning device. Thereafter, a reference signal of, for example, about 10 MHz is input to the IF counter 11 from outside the electronic tuning device.

Therefore, in this adjustment mode, the IF counter 11 counts the reference signal.

Here, the IF counter 11 executes counting by using the reference signal as an input pulse and the frequency division output of the frequency divider 8B as a gate pulse.

As a result, the IF counter 11 counts the pulses of the reference signal input while the frequency-divided output is High, as shown in FIG. Here, FIG. 3A shows a case where the oscillation frequency of the crystal oscillator 9 is appropriate, FIG. 3B shows a case where the oscillation frequency is high, and FIG. 3C shows a case where the oscillation frequency is low. ing.

If the count value in A in the same figure is the expected value, then B in the same figure
It can be seen that the count value in the case of C is lower than the expected value, and the count value in the case of C in the figure is higher than the expected value.

The value counted by the IF counter 11 as described above is input to the control section 12. Then, the control unit 12 compares this count value with the expected value and calculates the comparison difference.

This comparison difference may be output as is and displayed on the display section 15 provided in the radio receiver, and while viewing this, the reactance of the oscillation circuit can be adjusted using a screwdriver, such as the capacitance of the trimmer capacitor. However, in the present embodiment, the device of this embodiment goes further and automates the adjustment work of the oscillation frequency under the control of the control section 12.

That is, the control section 12 controls the reactance variable section 10 so that the comparison difference output approaches zero.
The reactance of the reactance is variably controlled.

Here, the reactance variable section 10 has a second
As shown in the figure, it is provided with control terminals P1 to P4 from which four types of capacitance values can be arbitrarily selected. Moreover, the capacitors C1 to C4 are connected to the crystal oscillator 9.
Since it is connected in parallel to A, 0P to 15P can be controlled by selecting the control terminals P1 to P4.
It is possible to select from 16 different capacity values.

Therefore, when the count value is larger than the expected value, the control section 12 selects the control terminal so that the reference frequency is increased, that is, the capacitance in the reactance variable section 10 is decreased. As mentioned above, before adjusting the oscillation frequency, control terminal P4 is selected, and in this state, the capacitance is 8P, so control is performed so that a smaller capacitance value, that is, 7P or less, is selected. Just select the terminal.

Conversely, if the count value is smaller than the expected value, the reference frequency is lowered, that is,
The control terminal may be selected so that the capacitance in the reactance variable section 10 becomes high.

The reference frequency adjustment mode mentioned above is: It only needs to be performed once during the manufacturing process of the radio receiver. Therefore, the reactance variable value calculated as described above is stored by the control section 12 in the EEPROM 17, which is a storage section of the electronic tuning device. Then, each time the power is turned on to the control section 12, reference frequency oscillator 9, and variable reactance section 10 (in the case of a car radio, each of the above sections is backed up to the battery, so in this case, the step of connecting to the battery is (Applicable), the control section 12 reads out the reactance variable value from the EEPROM 17, and controls the reactance variable section 10 based on this reactance variable value so that it can always oscillate an appropriate reference frequency.

After adjusting the reference frequency in the adjustment mode as described above, the reception operation is performed in the normal reception mode in the same manner as before.

Here, as described above, the IF counter 11 is used in the automatic tuning mode of the reception frequency, that is, in the Seek mode.

In this Seek mode, the frequency mixer 5
Input the intermediate frequency from IF counter 11,
The intermediate frequency pulses input while the frequency division output is High are counted. Then, the control unit 12 determines whether the count value of the intermediate frequency is within a predetermined range, and if it is outside the predetermined range, the control unit 12 controls the programmable counter 8A of the PLL circuit 8. The hex value is changed and set, and control is performed so that proper tuning is performed.

In this way, in the device of this embodiment, in the reference frequency adjustment mode, the oscillation frequency can be automatically adjusted by the members within the electronic tuning device simply by inputting the reference signal from the outside. The burden on workers can be significantly reduced.

Moreover, since the counter for executing the above adjustment operation also serves as the IF counter 11 that is originally provided in the conventional digital tuning system, the size of the device increases when executing the above operation. Not at all.

Note that the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention.

As described above, various methods can be considered for how the frequency shift data calculated by the control section 12 is reflected in the reference frequency adjustment. For example, instead of automatically correcting the oscillation frequency in the device itself as in the previous embodiment, this frequency deviation data is displayed on the display section 15 of the electronic tuning device, and the operator looks at the displayed value. A trimmer capacitor or the like provided in the oscillation circuit of the reference frequency generator may be adjusted. In this case, it is preferable to display not only the absolute value of the frequency shift data but also a sign indicating whether it is larger or smaller than the expected value. Even in such a configuration,
Compared to the conventional electronic tuning device mentioned above,
There is no need to connect the output of VCO7 to an external counter, and the reference frequency can be adjusted based on the frequency deviation data, so compared to the conventional electronic tuning device described above, the work load is significantly reduced. can be reduced to .

As in the embodiment, the reference frequency generator 9
A reactance variable section 10 for varying the reactance of the oscillation circuit is provided, and even when the reference frequency is automatically adjusted by varying the reactance based on the frequency shift data output from the control section, the The reactance variable section 10 can also adopt various other configurations.

FIG. 4 shows a modification of the reactance variable section 10. In the figure, a variable capacitance diode C _V is connected to one end of the crystal oscillator 9A, and a voltage is applied to the variable capacitance diode C _V. A digital-to-analog converter (hereinafter referred to as
A 10A (also called a D/A converter) is provided, and this D/A converter
The digital input terminals to the A converter 10A are the control terminals P1 to P4. The capacitance of the variable capacitance diode C _V decreases as the applied voltage increases, and conversely, the capacitance increases as the applied voltage decreases. Therefore, by selecting the control terminal, the capacitance of the variable capacitance diode C _V can be varied, and as a result, the reference frequency generator 9
It becomes possible to automatically adjust the oscillation frequency at

Note that the reactance variable section 10 is not necessarily limited to electrically varying the capacitance value, but may be configured to have a predetermined capacitance value by cutting unnecessary electrical circuits using a laser or the like.

Furthermore, the electronic tuning device according to the present invention is not necessarily applicable to AM and FM tuning sections;
The present invention can be similarly applied to devices with other bands such as short waves and long waves, and can also be applied to a tuning device for a television receiver.

[Effects of the Invention] As explained above, according to the electronic tuning device of the present invention, the reference frequency generated by the reference frequency generator can be adjusted by a simple operation or automatically.

Therefore, it is possible to provide an electronic tuning device that can always perform accurate tuning at a low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a device according to an embodiment of the present invention.
Fig. 2 is a circuit diagram showing an example of the configuration of the reactance variable section, Fig. 3 A, B, and C are explanatory diagrams for explaining counting in the IF counter, respectively, and Fig. 4 shows a modified example of the reactance variable section. FIG. 2, 4... Tuning circuit, 5... Frequency mixer, 8
... PLL circuit, 9 ... Local oscillator, 9 ... Reference frequency generator, 10 ... Reactance variable section, 1
1...Intermediate frequency counter, 12...Control unit, 1
7... Memory section.

Claims (1)

[Claims for Utility Model Registration] (1) A tuning circuit, a local oscillator that outputs an oscillation frequency to be mixed with the reception frequency from the tuning circuit, and a frequency mixer that mixes the reception frequency and the oscillation frequency. , a PLL circuit that locks the oscillation frequency of the local oscillator to a frequency that is an integral multiple or a fraction of the difference or sum of the reception frequency and the intermediate frequency, and a reference frequency generator that generates a reference frequency that is input to the PLL circuit. an intermediate frequency counter that counts the intermediate frequency from the frequency mixer based on a reference frequency from the reference frequency generator; a control means for calculating and outputting comparison data obtained by comparing the counter output when the signal is inputted with a pre-stored expected value; An electronic tuning device comprising: a reference frequency adjustment means for variably controlling the reference frequency generated by the reference frequency generator. (2) The comparison data output from the control means is the difference between the counter output when a reference signal is input to the intermediate frequency counter and the corresponding expected value, and the reference frequency adjustment The means has a display section for displaying the comparison data inputted from the control means, and reactance changing means for manually changing the reactance of the reference frequency generator so that the comparison data approaches zero. An electronic tuning device according to claim 1, characterized in that it is a utility model. (3) The reference frequency adjusting means has a reactance variable section for changing and setting the reactance of the reference frequency generator based on the comparison data input from the control means, and the reactance is outputted from the control means. The reactance is calculated based on the difference between the counter output when a reference signal is input to the intermediate frequency counter and an expected value corresponding thereto, so that this difference approaches zero. The electronic tuning device according to claim 1, wherein the electronic tuning device is a control signal for controlling a variable part. (4) The reference frequency adjustment means includes a reactance variable section for changing and setting the reactance of the reference frequency generator based on the comparison data input from the control means, and a reactance variable section for storing the comparison data and the control means. a storage section that supplies the comparison data to the reactance variable section each time the power is turned on, and the comparison data output from the control means inputs a reference signal to the intermediate frequency counter. The control signal for controlling the reactance variable section is calculated based on the difference between the counter output and the corresponding expected value when the reactance variable part approaches zero. An electronic tuning device according to claim 1 of the utility model registration claim.