JPH04158568A - Input protection circuit for semiconductor device - Google Patents

Abstract

PURPOSE:To realize a high reliability, a high static voltage resistance, and a high responsibility and prevent expansion of a pattern area by laying out protection devices in which a clamp diode is integrated with a parasitic resistor having a parasitic diode in parallel between a high potential side and a low potential side of an electric source. CONSTITUTION:An input protection circuit comprises a parasitic counter-positive power source diode-integrated type p type diffusion resistor 23, a parasitic counter positive diode-integrated type n type diffusion resistor 24 which are laid out in parallel respectively on a thin film resistor 22. It is possible to reduce a resistant value of the thin film resistor by setting that the ratio between a resistant value of the thin film resistor and a serial resistant value of a clamp diode be smaller. Furthermore, this construction makes it possible to reduce the whole serial resistors of the protection circuit by connecting the diffusion resistors 23 and 24 in parallel and embody a pattern increase prevention based on high speed response and device cut down and lower the voltage to the internal circuit to a satisfactory extent.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to improvements in input protection circuits for semiconductor devices.

[Prior Art and Problems] Conventionally, in semiconductor devices such as ICs and LSIs, input protection circuits have been used to protect internal circuits from excessive inputs applied due to static electricity or the like.

Such an input protection circuit is an important device for ensuring reliability of the device, and various proposals have been made.

Recently, it has become common to use input protection resistors and protection diodes formed of polycrystalline silicon layers. As a specific example of an input protection circuit using such a polycrystalline silicon resistor and a protection diode, the one shown in FIG. 2 is known (Japanese Unexamined Patent Publication Nos. 53-78879). This input protection circuit includes a thin film resistor 2 made of polycrystalline silicon whose one end is connected to an input pad 1, and diodes 3 and 4 for clamping the positive power supply and the negative power supply connected to the other end of the thin film resistor 2. It consists of With this configuration, the internal circuit can be protected by allowing a very suppressed current to flow through the thin film resistor 2.

By the way, it has been found that the input protection circuit shown in FIG. 2 is not suitable as a protection circuit for internal circuits of state-of-the-art miniaturized devices such as miniaturized CMOS and bipolar CMOS. That is, according to the test method specified in the EIAJ standard, a voltage of 200 to 300 V)ff degree is
When applied to the input cover through a resistor of Ω, the voltage must be stepped down so that a voltage of 10 Ω or less is applied to the input side of the internal circuit after passing through the protection circuit. Therefore, although no voltage is applied to the clamping diode, the thin film resistor 2 must absorb all the electrostatic energy of several μJ, so the thin film resistor 2 may become large or the thin film resistor itself may be destroyed. This poses a problem in that the protective function cannot be exerted.

Therefore, in order to solve the above problems, an input protection circuit as shown in FIG. 3 has been proposed. This circuit is constructed by adding a p-type diffused resistor, a positive power supply diode parasitic to the diffused resistor, an n-type diffused resistor, and a negative power supply diode parasitic to the diffused resistor to the circuit shown in FIG. This is an increase. As a result, the pattern of the input protection circuit on the chip becomes larger, and the more pads that require input protection, the larger the area occupied by the input protection element becomes.

The present invention has been made in view of the above circumstances, and reduces the energy sharing by thin film resistors, and provides a protection element that integrates a clamping diode and a parasitic resistor with a parasitic diode on the high potential side and low potential side of the power supply. It is an object of the present invention to provide an input protection circuit for a semiconductor device that has high reliability, high electrostatic withstand voltage, and high-speed response, and can prevent pattern area expansion by arranging them in parallel.

[Means for Solving the Problems] The present invention includes a thin film resistor directly connected to an input pad, and a parasitic positive power supply clamping diode provided between the other end of the thin film resistor and the high potential side of the power supply. and a second series resistor having a parasitic anti-negative power clamping diode provided between the other end of the thin film resistor and a low potential side of a power supply. This is an input protection circuit.

[Function] According to the present invention, the energy sharing by the thin film resistor is reduced, and a protection element that integrates a clamping diode and a parasitic resistor with a parasitic diode is arranged in parallel on the high potential side and the low potential side of the power supply. As a result, it has high reliability, high electrostatic voltage resistance, and high-speed response, and can prevent the area of the 5 patterns from increasing.

Embodiment C An embodiment of the present invention will be described below with reference to FIG.

The input protection circuit according to the present invention includes a thin film resistor 22 connected to an input pad 21, a parasitic positive power supply diode type integrated p-type diffused resistor 23, which is placed in parallel with the thin film resistor 22, respectively. It consists of a parasitic anti-negative diode integrated type n-type diffused resistor 24.

The parasitic positive power supply diode type integrated p-type diffused resistor 23
is a positive power supply p-type clamp diode 25 with an integrated diffused resistor on the input side, a clamp diode parasitic resistance 26 connected to this clamp diode 25, and this parasitic resistance 26.
It is composed of a parasitic power supply diode 27 connected to the parasitic power source diode 27 and an n-type diffused resistor 28. The parasitic anti-negative diode integrated n-type diffused resistor 24 includes a diffused resistance integrated anti-negative power supply clamp diode 29 on the input side, and a clamp diode parasitic resistance 30 connected to the clamp diode 29.
Parasitic negative power supply diode 3 connected to this parasitic resistance 30
1 and an n-type diffused resistor 32.

The thin film resistor 23 is made of p-type or n-type polycrystalline silicon having a sheet resistance of 30 to 100 Ω/hole, and has a resistance width of 15
30 μm, film thickness 0.35 to 0.5 μm, and the resistance value is set in the range of 300 to 1000 Ω. The clamp diodes 25 and 29 each have an area of 100 to 400 μm.
It was set as 2. The n-type diffused resistor 28. The resistance value of the n-type diffused resistor 32 is set in the range of 100 to 300Ω.1 The resistance value of the parasitic resistor 26 (or 30) is set in the range of 20 to 50Ω.
The voltage that has been resistance-divided by the parasitic resistor 28 (or 30) of 9) is further divided and applied to the internal circuit.

Note that for the purpose of high-speed operation, the resistance value and resistance area of the thin film resistor 22 should be increased (or, if this is not desired, the ratio of the parasitic resistance of the clamp diode connected to this should be made as small as possible to lower the voltage applied to the thin film resistor 22, Thermal energy of thin film resistor 22 is reduced.

The cross-sectional shape of the n-type diffused resistor 23 is as shown in FIG. 41 in the figure is a p-type substrate. This board 41
an n-type buried layer 42; an n-type epitaxial layer 4;
A 3.degree. n-type collector diffusion layer 44 is formed, and a base layer 46 of an NPN transistor is formed in an island region surrounded by a field oxide film 45 in the epitaxial layer 43. P-
chM OS Transistor source (or drain)
A region 47 is formed. A source (or drain) region 48 of an N-ch MOs transistor is formed on the surface of the collector diffusion layer 44. Further, the substrate 4
1 includes a p-type buried layer 49. p-type well layer 50. p
A type isolation layer 5j is formed. The field oxide film 45 and the source (or train) region 4
An oxide film 52 is formed on a portion of 7. On the source (or drain) region 47.48, there is a wiring 53.
or is formed.

Further, the cross-sectional shape of the n-type diffused resistor 24 is as shown in FIG. Here, the same members as those in FIG. 4 are given the same reference numerals, and the description thereof will be omitted. Further, 54 in the figure is a base layer of a PNP transistor formed in the epitaxial layer 43, and 55 is a p-type collector diffusion layer.

Thus, the input protection circuit according to the above embodiment has parasitic anti-positive power supply diode-integrated n-type diffused resistors 23 . It consists of a parasitic positive power source integrated n-type diffused resistor 24, and a thin film resistor 22.
The resistance value of the thin film resistor can be made small by setting the ratio of the series resistance value of the clamp diode with the resistance value of The resistance can also be reduced, high-speed response, and prevention of pattern increase due to the reduction of elements can be realized, and the voltage applied to the internal circuit can be sufficiently reduced.

[Effects of the Invention] As detailed above, according to the present invention, the energy sharing by the thin film resistor is reduced, and a protection element that integrates a clamping diode and a parasitic resistor with a parasitic diode is connected to the high potential side and the low potential side of the power supply. High reliability and high static voltage resistance are achieved by placing them in parallel on the potential side.

It is possible to provide an input protection circuit for a semiconductor device that has high-speed response and can prevent pattern area expansion.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of an input protection circuit according to an embodiment of the present invention, FIGS. 2 and 3 are explanatory diagrams of conventional input protection circuits, and FIG. 4 is a detailed diagram of the first element in FIG. 1. The cross-sectional view, FIG. 5, is a detailed cross-sectional view of the second element of FIG. 21... Input pad, 22... Thin film resistor, 23...
・N-type diffused resistance, 24...n-type diffused resistance, 25.29
... Clamp diode, 26.30 Clamp diode parasitic resistance, 27... Parasitic vs. negative power supply diode,
31: Parasitic positive power supply diode, 28: N-type diffused resistor, 3o: N-type diffused resistor. Applicant's agent Patent attorney Atsushi Tsuboi

Claims (3)

[Claims] (1) A thin film resistor directly connected to the input pad, a first series resistor having a parasitic positive power supply clamping diode provided between the other end of the thin film resistor and the high potential side of the power supply, and the thin film resistor. 1. An input protection circuit for a semiconductor device, comprising: a second series resistor having a parasitic anti-negative power supply clamping diode provided between the other end and a low potential side of a power supply. (2) The input protection circuit for a semiconductor device according to claim 1, wherein the first and second series resistors are connected in parallel as a symmetrical circuit between the other end of the thin film resistor and an internal circuit. (3) The first and second series resistors are composed of a p-type diffused resistor and a positive power supply diode parasitic to the diffused resistor, and an n-type diffused resistor and a negative power supply diode parasitic to the diffused resistor. 2. The input protection circuit for a semiconductor device according to claim 1, further comprising a diode.