JPH04157836A - Timing regenerating circuit - Google Patents

Abstract

PURPOSE:To improve the detection accuracy of an optimum phase and to improve the communication reliability by calculating an evaluation function for timing regeneration by using the main cursor value and precursor value of a decision feedback type line equalizer. CONSTITUTION:The decision feedback type line equalizer(DFC) 14 has a tap coefficient for precursor equalization and C-1 and C0 are outputted as estimated values of a precursor h-1 and a main cursor h0 in response to the input of a received signal sampled value outputted by an analog/digital converter 13. An evaluation function part 15 calculates the evaluation function for sample timing control by using the tap coefficient C-1 for precursor equalization and tap coefficient C0 for main cursor equalization which are outputted by the decision feedback type equalizer 14 and the output signal of a PLL circuit 12 is controlled according to the arithmetic result. Consequently, the detection accuracy of the optimum phase is improved.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a timing recovery circuit that detects the optimum phase of a received signal during bidirectional communication by a data transceiver having an echo canceller and a received signal determiner in digital subscriber line transmission. Using a decision feedback line equalizer with tap coefficients for cursor equalization, the precursor h,
, and set that value and the main cursor's tfu
The purpose is to calculate the evaluation function of the impulse response using the constant value ho and perform timing reproduction with the optimal phase.
In a timing recovery circuit that is built into a data transceiver for digital subscriber line transmission and extracts the optimal phase of a received signal, the received signal whose waveform distortion on the transmission line has been shaped by a line equalizer is converted into a P L Lu path. An analog/digital converter samples and converts it into a digital signal in accordance with a sample timing control signal outputted by the converter, and a received signal sample value outputted from the analog/digital converter is inputted, and tap coefficients for precursor equalization are input. a decision feedback line equalizer with a precursor equalization tap coefficient C−+ in the decision feedback line equalizer;
and a main cursor equalization tap coefficient co, an evaluation function unit that calculates an evaluation function for the sample timing control and controls the output signal of the P L Lu path according to the calculation result. The system is configured to include the following.

[Industrial application field]

The present invention relates to a digital communication system, and more particularly to a timing recovery circuit for detecting the optimal phase of a received signal during bidirectional communication by a data transceiver having an echo canceller and a received signal determiner in digital subscriber line transmission.

(Prior Art) When transmitting a signal using, for example, a baseband transmission method on a cable transmission path, as the data transfer rate increases or the transmission distance increases, the waveform gradually becomes smoother due to attenuation in the high frequency region. The impulse response of the channel becomes smoother.Especially in baseband transmission, interference from preceding and succeeding pulses caused by waveform distortion, that is, code amount interference, becomes an important problem.Such code amount interference and noise A filter for compensating for the deterioration of the transmission system due to the above is generally called an equalization layer.

FIG. 9 is an example of an impulse response of a cable transmission line.

All communication systems are causal, and when time t is negative, the impulse response h (t) is O, and the impulse response is the 9th
The result is as shown in Figure (a), but by moving the time axis on the receiving side as shown in Figure (b), the peak occurrence time of the impulse response' is set to 1.
=0 is often set.

In general, time-series human input aOral for each fixed period for a certain system,
. . . for an, the output at time n is given by convolution using the impulse response sequences ho, h+, . . . hn of the system as shown in the following equation.

If this is represented in a block diagram using Z transformation, it will be as shown in FIG.

FIG. 11 is an example of a non-recursive equalization layer (transversal filter) for compensating for deterioration in the transmission system.

In this equalization layer, tap coefficients Co, CI, . . . are used instead of the impulse response sequences ha, 11+, . . . in the block diagram of FIG. In such an equalization layer, the function of block Z-1 corresponds to a shift register for realizing a one-cycle delay of the input signal sequence.

FIG. 12 is an example of digital subscriber line transmission between a station and a terminal. In the figure, the timing regeneration operation on the station 1 side (master side) is performed by the PL on the terminal 2 side (slave side).
Since the L circuit 3 is used to transmit data periodically at the reference timing 4 on the master side, the data is transmitted without considering the frequency error, and only the phase offset due to the delay of the line or the circuit itself is considered.

FIG. 13 shows a conventional example of a timing recovery circuit that detects the peak value of a received signal from a digital subscriber line transmission line and generates a recovered clock with an optimum phase. In the figure, the received signal is passed through a line equalization layer 5 that performs waveform shaping of the received signal, etc. to a sample value detection and data symbol identification circuit 6.
is input.

The sample value detection circuit detects the sample value expressed in the convolution format as in equation (1), and the decode symbol identification circuit detects the symbol value a of the received signal. ,al,
...Identify the value of a. These sample values and data symbols are input to the evaluation function calculation circuit 7, and this circuit outputs an estimated value of the peak value ho of the impulse response.
be done.

When the peak value of 11° of the impulse response is correctly detected, the reproduced clock is output with the optimum phase as shown in FIG. In addition, when the peak value of the impulse response is correctly detected in Fig. 14, the value of the impulse response one cycle before is called the precursor h-+, and the value h1 of the impulse response one cycle later is called the boss 1-cursor. Ideally, these values would be zero.

In FIG. 13, the estimated value h0 of the peak value of the impulse response as the output of the evaluation function calculation circuit 7 and a preset threshold value h oLh smaller than 1 are compared by the comparator 8, and the result is shown in FIG. When the estimated value is larger than the threshold value, the regenerative clock control circuit 9 controls the regenerated clock so that the phase thereof advances, and when the estimated value is smaller than the dark value, the phase of the regenerated clock is retarded. be exposed. Adjust the dark value to the optimal phase (
By approaching the peak value l at 0), the phase of the reproduced clock is controlled to approach the optimum phase.

[Problem to be Solved by the Invention] In the peak detection type timing regeneration circuit explained in FIG. Since this interference cannot be removed by a line equalizer, there is a problem in that it causes a judgment error in the data symbol identification circuit.

In addition, as a conventional timing reproduction method, the position of the precursor h-+ is detected on the assumption that it becomes O,
There is also a precursor type in which the peak position of the impulse response is set one cycle later, but in this case, there is a problem that a phase error occurs when the precursor does not reach O. Furthermore, when there are a plurality of points that serve as O as precursors, there is a problem in that the reproduction phase may not be uniquely determined.

Furthermore, if the received signal is superimposed with large noise or a wraparound signal (near-end echo) of the signal from the receiving side, detection accuracy may be affected by detecting only either the main cursor or the precursor cursor. Another problem was that it was difficult to reproduce at the optimum timing due to the problem of.

The present invention estimates the value of the precursor 11-1 using a decision feedback line equalizer with tap coefficients for precursor equalization, and uses that value and the estimated value h0 of the main cursor to calculate the impulse response. The purpose is to calculate the evaluation function and perform timing recovery with the optimal phase.

[Means to solve the problem]

FIG. 1 is a block diagram of the principle of the present invention. This figure is a principle block diagram of a timing recovery circuit incorporated in a data transceiver in digital subscriber line transmission for extracting the optimum phase of a received signal.

In Figure 1, an analog/digital converter (ADC)
) 13 samples the received signal whose waveform distortion on the transmission line has been shaped by the line equalizer 11 in accordance with the sample timing control signal output from the PLL circuit 12, and converts it into a digital signal. Decision feedback line equalizer (DF
C) 14 has a tap coefficient for precursor equalization, and C) is used as the estimated value of the precursor h-+ and the main cursor ho for the input of the received signal sample value output by the analog/digital converter 13. -1 and Co are output.

The evaluation function unit 15 calculates an evaluation function for sample timing control using the precursor equalization tap coefficient C−+ and the main cursor equalization tap coefficient Co output from the decision feedback line equalizer 14. , the output signal of the PLL circuit 12 is controlled according to the calculation result.

[For production]

In the present invention, when a far-end signal as a received signal sent from the communication partner side is superimposed with large noise or a wrap-around signal as a near-end echo, a preprocessor is used to make the value of the evaluation function more accurate. The optimum phase of the received signal is detected using the cursor (not only ah-+ but also the main cursor value).

In the decision feedback type line equalizer 14 having tap coefficients for precursor equalization, the estimated value of the main cursor h0 is used as the main cursor equalization tap coefficient C8, and the precursor h
The accuracy of detecting the optimum phase can be improved by adding the precursor equalization tap coefficient C-+ to the -+ estimated value and setting the evaluation function to, for example, Co-1 cm+l.

That is, for example, the main cursor h in FIG.

11 When precursor h-+ is O, if the phase shifts in the advancing direction and their values become 0.9°-〇 and 1, respectively, then the errors of the precursor and main cursor themselves are 0.9°-〇 and 1, respectively. 1, but -N=, the difference between the above evaluation functions is 0.2. For this reason, for example, when noise of a magnitude of 0.1 is superimposed, it is difficult to detect the optimal phase using only the main cursor or precursor, but the method of the present invention easily detects the optimal phase. will be done.

〔Example〕

FIG. 2 is an explanatory diagram of the evaluation function setting method in the present invention. In the figure, when the optimum phase is detected, the main cursor equalization tap coefficient CO becomes 1, and the precursor equalization tap coefficients C, , l become O.

Evaluation function 2 is z−co −1c, tl −−−−−(2)
Assuming that the detection timing is shifted to the phase advance side, the main cursor equalization tap coefficient COI is 0.
．． 9. Pre-cursor equalization tap coefficient C-11 is -0,
If it becomes 1, the value of the evaluation function will be 0.8, which is 0.2 smaller than the value of the evaluation function at the optimum phase.

On the other hand, assuming that the detection timing is shifted to the side where the phase is delayed, the tap coefficient CO2 for main cursor equalization becomes 0.9, and the tap coefficient C-12 for pre-cursor equalization becomes +
Even if it becomes 0.1, the value of the evaluation function will be 0.2 smaller than the value at the optimal phase.

Therefore, as mentioned above, the main cursor equalization tap coefficient C
(The detection accuracy of the optimum phase is improved compared to using a difference of 0.1 between only + or precursor equalization tap coefficients C and -1.

In addition, as an evaluation function, the above-mentioned formula (2) is further generalized, and using a positive real value α and a real value β larger than 1, Z=αC0−βIc−tl ...(3) It is also possible to define it as follows.

Furthermore, if the calculation of the evaluation function is repeated many times during timing playback as described later, the evaluation function can be changed to Z=E (αC
, -βl C-+ l ) (4). Here, E is defined as an expected value, for example, by the average value of N calculation results, and as a result, equation (4) becomes the following equation.

Here, Co'+C-l' is Co and C-t at +i at each evaluation function calculation time after the calculation start time (k).

FIG. 3 is a basic configuration block diagram of a decision feedback type line equalizer used for timing recovery. In the figure, the current value of the periodically transmitted code is an, the transmitted code value 1 to N cycles ago is a n-1" a n-N, the transmitted code value one cycle later is a-+, and the impulse The response string is ho, h+-h
N, when the precursor is h-t, due to code amount interference, X, == h-ta, +ho an-1-hl an
FIG. 2 is a block diagram of a decision feedback line equalizer with tap coefficients for precursor equalization that receives received signal sample values represented by −+ + . . . +hHan−N.

In FIG. 3, the decision feedback line equalizer includes a received symbol determiner 20. A first subtracter 21 that takes the difference between the output and the input of the received symbol determiner 20, and uses the current residual error as the output of the first subtractor 21 as an intermediate value for estimating the residual error of one cycle before. The delay device 22 receives the output of the delay device 22 from the output of the symbol discriminator 20 and the tap coefficient C-1 for precursor equalization.
A second subtracter 24 that subtracts the output of the multiplier 23 that multiplies the output of the second subtracter 24 and the received symbol determiner 2
0 is used to update the other tap coefficients C1 to CM corresponding to the impulse response sequences h1 to h8, respectively, and the precursor equalization tap coefficient C-1, and echo replica C1an-1+Cz an-2 -Hi...+CN
an-N and a tap coefficient updating unit 25 that outputs the tap coefficient C-1 for precursor equalization, and a third unit that takes the difference between the above-mentioned received signal sample value and the echo replica as the output of the tap coefficient updating unit 25. The output of the third subtracter 26 is input to the received symbol determiner 20.

Note that the tap coefficient updating unit 25 also updates the tap coefficient Co for main cursor equalization, and outputs the value for timing reproduction as described later.

In the decision feedback type line equalizer of FIG. 3, in order to correctly determine the symbol value a1 of the current received code, the received signal sample value Xn must be determined. It is necessary to determine the received data symbol by setting all terms other than a1 to 0.

However, the term including the precursor h-1 is determined by the transmitted code value one period later,
It is impossible to estimate this.

Therefore, as will be described later, in order to correspond to the fact that the current determined received symbol is delayed by one period, the received symbol determination value is set to one period earlier, and similarly, the received symbol determiner 20
The current residual error, which is the difference between the output and input of
The tap coefficients are updated using the intermediate value for estimating the residual error of one cycle earlier in response to the delay of one cycle, and the estimated value of the tap coefficient C-+ for precursor equalization.

In FIG. 3, when the residual error becomes O, the impulse response sequence h1 to ht+ matches the tap coefficients C+ to CN, so the input to the received symbol determiner 20 is set in advance to the value of C0 as 1. C-+ as a reply depending on what you do
a −+ + a n, and the intermediate value for residual error estimation is the output of the received symbol determiner 20, that is, the determination result is set as ar, and C−1a n−a n−+ a n−
1", and a n-1a n-l'" (approximate value) as a result of subtraction by the second subtractor 24 mentioned above is finally taken as the residual error difference, and this residual error approaches 0. The tap coefficient is 0.

C-+ and C+ to CN are updated.

Then, when the residual error ideally becomes 0, the tap coefficient C-+ matches the precursor h,,1, and the input beam to the symbol value judger becomes in the form, ,1a-1+all, and h-+ is 0, or, for example, if the precursor h-+ can be set to O in the calculation of the impulse response evaluation function, the input to the symbol value determiner completely matches the current transmitted code value an. I will do it.

FIG. 4 is a block diagram of an embodiment of a decision feedback type line equalizer with tap coefficients for precursor equalization. In this figure, elements that are substantially the same as those in FIG. 3 are given the same numbers.

In FIG. 4, the difference between the outputs a, l of the received symbol determiner 20 and the input TMI No. is taken by a subtracter 21,
This is delayed by T by the delay device 22, resulting in an intermediate value ERII for estimating the residual error one cycle before.

From this value, the product of the output of the determiner 20 and the precursor equalization tap coefficient C by the multiplier 23 is calculated by the subtracter 2.
4 to obtain a residual error ERR-1, and this residual error is used to update the tap coefficients.

Furthermore, the output an of the determiner 20 is a T delay device 27a.

. . , 27n are sequentially inputted to l, . . . , symbol values an-1+ . . , CM, and these multiplication results are added by an adder 29, and the addition result is output to a subtracter 26 as an echo replica. The subtracter 26 then calculates the received signal sample value X. Adder 2 from
The output result of 9 is subtracted, and the determiner 20 and the subtracter 21
is input.

This results in the received signal sample value X. The impulse response strings , , +, h+ to hN are respectively tap coefficients C.
-++C+ ~CN and -. For example, when h-+ is 00, the input to the determiner 20 is only hoa, and each time hO is set to 1, the determiner 20 outputs the correct received symbol value. .

In addition, in Figure 4, the main cursor equalization tap coefficient 00 +
The double signal is input to the determiner 20 in order to create a slice level for determining the received symbol. When Co is assumed to be +1, ±2 is used as the slice level of the determiner 20.

FIG. 5 is a flowchart 1 of an embodiment of tap coefficient updating processing in a feedback type line equalizer that determines tap coefficients for precursor equalization. The operation of the embodiment of the present invention will be explained in more detail with reference to FIGS. 4 and 5.

In step (S)44 in FIG. 5, first, each tap coefficient C-↓, Co-CN and each symbol judgment value are set to 0 as initial value settings, and an intermediate value ERRo for residual error estimation, which will be described later, is set to, for example, a certain level. Set to a large value. After that, the symbol value is shifted in S45, and the DFE is performed in 846.
The echo replica YRF, , is calculated. This is to obtain the addition result by the adder 29, as explained in FIG.

In S47, the output signal of the subtracter 26 shown in FIG. 4 is calculated. That is, the difference between the current received sample value Xn and the echo replica YRFll determined in step 346 is determined as the register value T M I No .

Then, in 348, the received symbol value is determined by the determiner 20. Here the forward symbol value is earthworks.

There are four types of +3, slice level (Sl)
For example, +2. Received symbol value determination is performed by using O, -2.

Thereafter, residual error calculation is performed in S49. That is, the current residual error register value ERR.

is set as the residual error ERR−+ from one cycle ago, the subtracter 21 calculates a new current residual error ERRO as the difference between TMI No. and the output of the determiner 20, and the delay unit 22 calculates the residual error ERR−+ from L cycles ago. The subtracter 24 subtracts the result of multiplication of the tap coefficient C-I for precursor equalization and the output of the determiner 20 by the multiplier 23 from the error ERR, . . . to obtain the final residual error value ER.
R, is required. And this residual error E RR-+
An update of (N+2) tap coefficients is performed at 350 using .

The precursor equalization tap coefficients C, , I are delayed by one period by the delay device 38. The delay result is added to the adder 41
As a result, the product of the output of the determiner 20 and the residual error ERR-+ by the multiplier 39 is multiplied by, for example, a small negative constant α of the coefficient unit 40, and the result is added to obtain the update result of C-+. Here, +1 to k of C-3 to the power within the block of 850 represents the number of times the tap coefficients are updated. In addition, in FIG. 5, C-+, Co ~ CN, YR
Fn, an, etc. are all functions of the tap coefficient update number (time) k, and should be displayed as, for example, C-, k, but for the sake of simplicity, k is mostly omitted.

Other tap coefficients are updated in the same manner.

For example, the tap coefficient 01 is delayed by one period by the delay device 38a, and the adder 41a multiplies the output of the determiner 20 by a n-2 and ERR, which is the result of delaying the output by two periods by the delay devices 27a and 42a. A new tap coefficient multiplier is obtained by adding the product obtained by the multiplier 39a to the product multiplied by α by the coefficient multiplier 40a. The updating of the tap coefficient C8 is also done in exactly the same way.

In FIG. 5, when the tap coefficient update process ends in S50, a convergence determination is performed in 351. In the convergence determination, for example, when the value of the residual error ERR-+ becomes smaller than a predetermined dark value, it is determined that it has converged, and if it does not become smaller than the threshold value, the value at the time when the tap coefficient update process is performed in S52. The value is set to +1, and the processing from S45 is repeated.

FIG. 6 is an explanatory diagram of tap coefficient updating based on a received impulse response waveform. In the figure, an impulse response that has a peak value at time A includes a precursor of the impulse response shown by a broken line that has a peak value one cycle later, that is, at time B.

In the present invention, when the decision feedback line equalizer converges, the impulse response sequence h-,,h,~118 becomes the tap coefficient C
,,C, ~CN is utilized.

First, at time B, the echo replica YRF0 of the decision feedback line equalizer is calculated backward, and then at time I3, TM I N
Calculate o. Then, at time B, the received symbol value is determined based on the TM I No that includes the precursor h, , and the product of the received symbol value and the precursor equalization tap coefficient C-1 is calculated as It is subtracted from 1, the value is set as a new ERR-+ value, and the tap coefficient is updated using this value.

FIG. 7 shows an embodiment of a timing retemplation circuit using a decision feedback line equalizer with tap coefficients for precursor equalization according to the present invention. In the same figure, an automatic +114:i word IEI adjustment circuit (AC; The receiver 55 shapes the waveform of the distorted received signal on the transmission path. An analog/digital converter (ADC) 56 converts the line equalizer 55 using the sample timing control signal output from the PLL circuit 59.
, and converts the received signal into a digital signal. The decision feedback line type device (DFE) 57 with tap coefficients for precursor equalization is exactly the same as that shown in FIG. The evaluation function section 58 uses the tap coefficient C-+ for precursor equalization output from the DFE 57 and the tap coefficient 00 for main cursor equalization to change the sample timing control signal output from the PLL 59 according to equation (3). Calculate the evaluation function of

In the embodiment shown in FIG. 7, the main cursor equalization tap coefficient 00 is input to the evaluation function unit 58 and at the same time is input to the automatic gain control circuit (AGC) 54. This is A
It is used to control the output level of GC54. As mentioned above, the value of Co directly corresponds to the current received symbol value a7, and by using this as the gain control signal, the power calculation of the received signal is no longer necessary, and the AG
The configuration of C54 can be simplified.

FIG. 8 is an example flowchart 1 of timing regeneration processing.
It is. In the figure, steps 360 to S67 are almost the same as steps S44 to S50 in FIG. , the difference is that in S62, the received signal sample value by the analog/digital converter 56 in FIG. There is.

As in FIG. 5, after the tap coefficients are updated in S67, it is determined in 368 whether the number of tap coefficient updates k is greater than a certain constant value a. The value of a varies depending on the case, but is approximately several hundred to several thousand times. If it is determined in 368 that k is smaller than a, it is determined in S69 whether or not k is greater than the sum of a(!:b. Here, since k is naturally smaller than this sum, the time is determined in S70. The value of is incremented,
The processing from S6■ is repeated.

When the tap coefficient update number k becomes equal to or more than a in S68, 37
1, the evaluation function Zn is calculated. This operation is 369
until k becomes greater than or equal to the sum of a and b, that is, b times, S6
The process is repeated from 1, and the evaluation function calculation results b times are averaged in S71. b is about 1 to 120 times.

If k becomes greater than or equal to the sum of a and b in S69, evaluation function 2. is compared with the previous value (in the first case, the initial value), and in S73, the sampling phase Z7 of the analog/digital converter 56 is controlled in the direction of increasing. In this phase control direction, the timing is the optimal phase, and when the precursor is 0, Z.

This is done by taking the maximum value of 1.

After the sampling phase is controlled in step 373, step S7
At step 4, convergence determination is performed in the same manner as at 351 in FIG. If the convergence condition is not satisfied, the value of time is incremented in S75, and the processing from S61 is repeated.

(Effects of the Invention) As described above in detail, according to the present invention, the main incursor value of the judgment Mf line equalizer and the precursor (“
By calculating the evaluation function for timing recovery using both However, it is likely to contribute significantly to the improvement of communications reliability.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is an explanatory diagram of the evaluation function setting method in the present invention, Fig. 3 is a block diagram showing the basic configuration of a flower vase such as a decision feedback type line, etc. The figure does not show the configuration of an embodiment of a judgment 911-type line equalizer with coefficients for precursor equalization and other uses. 1・
, FIG. 6 is an explanatory diagram of tap coefficient update processing using a received impulse response waveform, FIG. 7 is a block diagram showing the configuration of an embodiment of a timing recovery circuit, FIG. 8 is a flowchart of an embodiment of timing recovery processing, and FIG. 9 10 is a diagram showing an example of an impulse response of a transmission line.
The figure shows an example of a block diagram display by Z-transforming the output signal, Figure 11 shows an example of a non-recursive equalizer, and Figure 12 shows an example of digital subscriber line transmission between a station and a terminal. FIG. 13 is a diagram showing a conventional example of a timing recovery circuit. FIG. 14 is a diagram showing the relationship between impulse response and recovered clock. FIG. 15 is a diagram showing the phase control of the recovered clock in the conventional example of FIG. 13. It is a figure explaining a method. 1... Station (master) side, 2... Terminal (slave) side, 3... PLL circuit. 4... Reference timing, 11... Line equalizer, 12... PLT, circuit, 13... Analog/digital converter (△DC), 14... Decision feedback type line equalizer ( DFC), 15...
-Evaluation function unit, 20...Received symbol determiner, 25...Tap coefficient update unit.

Claims (1)

[Claims] 1) In a timing recovery circuit that is incorporated in a data transceiver in digital subscriber line transmission and extracts the optimum phase of a received signal, a line equalizer (11) eliminates waveform distortion on the transmission path. PL the received signal shaped by
an analog/digital converter (13) that samples in accordance with the sample timing control signal output from the L circuit (12) and converts it into a digital signal; and a received signal sample value output from the analog/digital converter (13). a decision feedback line equalizer (14) inputted with tap coefficients for precursor equalization; a tap coefficient C_-_1 for precursor equalization in the decision feedback line equalizer (14); an evaluation function section (inputting the value of the tap coefficient C_0 for main cursor equalization, calculating an evaluation function for the sample timing control, and controlling the output signal of the PLL circuit (12) according to the calculation result; 15) A timing regeneration circuit comprising: 2) Absolute values of the main cursor equalization tap coefficient C_0 and the pre-cursor equalization tap coefficient |C as the evaluation function
2. The timing recovery circuit according to claim 1, wherein a difference C_0-|C_-_1| is used. 3) The evaluation function is the product of the main cursor equalization tap coefficient C_0 and a positive integer α, and the product of the absolute value |C_−_1| of the precursor equalization tap coefficient and a real number β of 1 or more. The timing recovery circuit according to claim 1, characterized in that the difference αC_0−β|C_−_1| is used. 4) The decision feedback line equalizer with the tap coefficients for precursor equalization calculates the current value of the periodically transmitted code by a
_n, the transmission code values from 1 to N cycles ago are each a_n_-
_1 to a_n_-_N, the transmission code value after one cycle is a_-
When the _1 impulse response sequence is h_0, h_1 to h_N and the precursor is h_-_1, X due to intersymbol interference
_n=h_-_1a_-_1+h_0a_n+h_1a
A decision feedback line equalizer that receives a received signal sample value represented by _n_-_1+...+h_Na_n_-_N, and the decision feedback line equalizer is a received symbol determiner that determines a current transmitted code value. and a first subtracter that takes the difference between the output and the input of the received symbol determiner, and the current residual error as the output of the first subtractor is used as an intermediate value for estimating the residual error one cycle before. a delay device for subtracting the product of the output of the received symbol determiner and the precursor equalization tap coefficient C_−_1 from the intermediate value for estimating the residual error one cycle before as the output of the delay device; equalization tap coefficients C_1 to C_N and main cursor equalization taps corresponding to the impulse response sequences h_1 to h_N, respectively, using the outputs of the second subtracter and the received symbol determiner; Update the coefficient C_0 and the tap coefficient C_-_1 for precursor equalization, echo replica ▲ formula,
A tap coefficient update section that outputs a chemical formula, table, etc. ▼ and a tap coefficient C_-_1 for precursor equalization, and a difference between the received signal sample value and the echo replica output by the tap coefficient update section. A decision feedback line with tap coefficient for precursor equalization according to claim 1, further comprising a third subtracter, and an output of the third subtracter is input to the received symbol decider. Maker. 5) Initialize all tap coefficients, received symbol decision values, residual errors, and evaluation functions of the decision feedback line equalizer, and update all tap coefficients of the decision feedback line equalizer,
The current residual error, which is the difference between the output and input of the decider in the decision feedback line equalizer, is used as the intermediate value for estimating the residual error one cycle before, and the precursor equalization tap coefficient C_ is calculated from the intermediate value. -_1 and the output of the received symbol discriminator is subtracted a number of times in the direction of reducing the residual error, and after updating the tap coefficients a number of times, the evaluation function is calculated b' times, average the calculation results b times, compare the evaluation function average value with the previous evaluation function average value, control the sampling phase of the analog/digital converter in a direction to increase the evaluation function value, and reduce the residual error. 2. The timing recovery method according to claim 1, wherein it is determined whether or not is smaller than a predetermined threshold value, and when larger than the threshold value, the processing after updating the tap coefficient is repeated.