JPH04155944A - Ceramic package with heat sink - Google Patents
Ceramic package with heat sinkInfo
- Publication number
- JPH04155944A JPH04155944A JP2281339A JP28133990A JPH04155944A JP H04155944 A JPH04155944 A JP H04155944A JP 2281339 A JP2281339 A JP 2281339A JP 28133990 A JP28133990 A JP 28133990A JP H04155944 A JPH04155944 A JP H04155944A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- chip
- heat
- fins
- center
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 43
- 239000000758 substrate Substances 0.000 claims description 18
- 230000000694 effects Effects 0.000 abstract description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052782 aluminium Inorganic materials 0.000 abstract description 5
- 230000010354 integration Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 230000017525 heat dissipation Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 238000001816 cooling Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はICチップやLSIチップなどのチップを搭載
するヒートシンク付セラミックパッケージに関するもの
である。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a ceramic package with a heat sink that mounts a chip such as an IC chip or an LSI chip.
高度な半導体素子技術は、論理素子から理解されるよう
に、ゲート当りのスピード、電力積が逐次減少している
と共に、微細加工技術の発達により、ゲート当りの占有
面積も次第に減少している。In advanced semiconductor device technology, as understood from logic elements, the speed and power product per gate are gradually decreasing, and the area occupied by each gate is also gradually decreasing due to the development of microfabrication technology.
このため、半導体チップは高速化ならびに高集積化され
る傾向にある。一方、この半導体チップを保護し、信頼
性を向上させるパッケージは、半導体チップのボンディ
ング技術などを考慮して実装の領域へと発展してきてい
る。これに伴い、近年のコンピュータ装置などにおいて
は、装置の処理性能や信頼性の向上などのためにLSI
化された半導体素子や高密度で、且つ小型化されたLS
Iチップ搭載用の各種セラミックパッケージが次第に取
り入れられるようになってきた。For this reason, semiconductor chips tend to be faster and more highly integrated. On the other hand, packages that protect semiconductor chips and improve their reliability are being developed into the field of packaging, taking into consideration semiconductor chip bonding technology. Along with this, in recent years computer equipment, etc., have been using LSI to improve the processing performance and reliability of the equipment.
Advanced semiconductor devices and high-density and miniaturized LS
Various ceramic packages for mounting I-chips are gradually being adopted.
ところで、このように素子の高集積化の度合が大きくな
ると、半導体チップの消費電力も増大することになる。However, as the degree of integration of elements increases, the power consumption of the semiconductor chip also increases.
そのため、消費電力の大きなLSIチップはプラスチッ
クに比べ熱伝導率の大きいセラミックなどのパッケージ
に搭載し、さらにボードのみによる放熱では当然LSI
チップの冷却に対して限界がある。Therefore, LSI chips with high power consumption are mounted in packages made of ceramic or other materials that have higher thermal conductivity than plastic, and if heat is dissipated only by the board, it is natural that LSI chips
There are limits to chip cooling.
そこで、前述の高速で、かつ高集積化されたLSIチッ
プを搭載する従来のセラミックパッケージにおいては、
LSIチップからの放熱に対し冷却の観点から、放熱効
率の高いアルミニウムや銅の材料からなるヒートシンク
を、セラミックパッケージの上面に、熱伝導性の優れた
半田や接着剤により一体的に固着させ放熱させるように
している。Therefore, in the conventional ceramic package that mounts the aforementioned high-speed and highly integrated LSI chip,
From the perspective of cooling the heat dissipated from the LSI chip, a heat sink made of highly heat dissipating materials such as aluminum or copper is integrally fixed to the top surface of the ceramic package using solder or adhesive with excellent thermal conductivity to dissipate heat. That's what I do.
第3図は従来のヒートシンク付セラミックパッケージの
一例の斜視図である。FIG. 3 is a perspective view of an example of a conventional ceramic package with a heat sink.
図において、11はセラミック基板、15はビン、16
はキャップ、17はヒートシンクである。In the figure, 11 is a ceramic substrate, 15 is a bottle, and 16
is a cap, and 17 is a heat sink.
第4図に、その断面図を示す。FIG. 4 shows a sectional view thereof.
図において、セラミック基板11の上にはチップ固着剤
を用いてチップ12が搭載されている。チップ12と、
セラミック基板ll上の接続パッド13とは、配線部材
14によって結線されている。セラミック基板11の下
側には複数個のピン15が付けられている。セラミック
基板11の上面にはチップ12を覆うようにキャップ1
6が接着されており、中の気密を保っている。キャップ
16の上面には、ヒートシンク17がヒートシンク固着
剤によって接着されている。ヒートシンク17は、中央
に支柱があり、支柱上にフィンが複数材いている構造を
とる。現在、このような構造のヒートシンク付セラミッ
クパッケージが製作されている。In the figure, a chip 12 is mounted on a ceramic substrate 11 using a chip adhesive. Chip 12 and
The connection pad 13 on the ceramic substrate 11 is connected by a wiring member 14. A plurality of pins 15 are attached to the lower side of the ceramic substrate 11. A cap 1 is placed on the top surface of the ceramic substrate 11 to cover the chip 12.
6 is glued to keep the inside airtight. A heat sink 17 is adhered to the upper surface of the cap 16 with a heat sink adhesive. The heat sink 17 has a structure in which a support is provided at the center and a plurality of fins are provided on the support. Currently, ceramic packages with heat sinks having such a structure are being manufactured.
しかしながら、上述のような構造のヒートシンク付セラ
ミックパッケージでは、ヒートシンクの放熱効率があま
りよくなく、十分な冷却効果が得られないという欠点が
ある。これにより、チップそのものの温度上昇によりデ
バイスの動作速度が低下するなどの問題が生ずる。However, the ceramic package with a heat sink having the above-described structure has the disadvantage that the heat sink does not have very good heat dissipation efficiency, and a sufficient cooling effect cannot be obtained. This causes problems such as a decrease in the operating speed of the device due to an increase in the temperature of the chip itself.
本発明の目的は、発熱量の大きな高集積化LSIチップ
を搭載しても放熱効果が十分であるような信頼性の高い
ヒートシンク付セラミックパッケージを提供することに
ある。An object of the present invention is to provide a highly reliable ceramic package with a heat sink that has a sufficient heat dissipation effect even when a highly integrated LSI chip that generates a large amount of heat is mounted.
上記目的を達成するため、本発明によるヒートシンク付
セラミックパッケージにおいては、セラミック基板と、
チップと、キャップと、ヒートシンクとを有するヒート
シンク付セラミックパッケージであって、
セラミック基板は、チップを搭載するものであり、
チップは、セラミック基板に接着されたものであり、
キャップは、チップを覆ってセラミック基板に接着され
たものであり、
ヒートシンクは、キャップの上面に設立されたものであ
り、支柱とフィンとを有し、
支柱は、フィンを支えるものであり、
フィンは、支柱を中心として該支柱に上下多段に並設さ
れ、各フィンの厚みは、中央よりも周辺部が薄くなって
いるものである。In order to achieve the above object, a ceramic package with a heat sink according to the present invention includes a ceramic substrate,
A ceramic package with a heat sink that includes a chip, a cap, and a heat sink, wherein the ceramic substrate mounts the chip, the chip is bonded to the ceramic substrate, and the cap covers the chip. The heat sink is attached to the ceramic substrate, and the heat sink is installed on the top surface of the cap and has a support and a fin.The support supports the fin, and the fin supports the support around the support. The fins are arranged vertically on the support column in multiple stages, and each fin is thinner at the periphery than at the center.
超LSIのように素子の高集積化の度合が大きくなると
、半導体チップの消費電力が増大し、そのため、消費電
力の大きなLSIチップはプラスチックに比べ熱伝導率
の大きいセラミックなどのパッケージに搭載する必要が
ある。さらにLSIチップからの放熱に対する冷却の観
点から、放熱効率の高いアルミニウムや銅の材料からな
るヒートシンクを、LSIチップの固着面と対向する反
対側の表面に、熱伝導性の優れた半田や接着剤により一
体的に固着させ放熱させるようにしている。ヒートシン
クの形状は様々であるが、強制空冷時の風の方向依存性
のなさとヒートシンク単独での放熱効率の高さとから数
個のフィンを支柱で接続している構造のものが用いられ
る。As the degree of integration of elements increases, as in VLSIs, the power consumption of semiconductor chips increases, and therefore LSI chips that consume large amounts of power must be mounted in packages made of materials such as ceramics, which have higher thermal conductivity than plastic. There is. Furthermore, from the perspective of cooling the heat dissipated from the LSI chip, a heat sink made of aluminum or copper material with high heat dissipation efficiency is placed on the surface opposite to the fixed surface of the LSI chip using solder or adhesive with excellent thermal conductivity. This allows them to be fixed together and to dissipate heat. Although there are various shapes of heat sinks, those with a structure in which several fins are connected by struts are used because of the lack of dependence on the wind direction during forced air cooling and the high heat dissipation efficiency of the heat sink alone.
本発明のヒートシンク付セラミックパッケージでは、ヒ
ートシンクの構造が、中央よりも周辺にいくに従ってテ
ーパ状に薄くなっている水平型フィンが複数個取り付け
られた支柱が中央にある構造であるため、発熱部から上
方のフィンまで到達するエネルギ量が多くなり、放熱効
率は大きくなる。この構造により、上述のように高放熱
性で高信頼性のヒートシンク付セラミックパッケージが
実現可能となる。In the ceramic package with a heat sink of the present invention, the structure of the heat sink is such that there is a support in the center on which a plurality of horizontal fins are attached, which taper to become thinner toward the periphery than the center. The amount of energy reaching the upper fins increases, and the heat dissipation efficiency increases. With this structure, it is possible to realize a ceramic package with a heat sink that has high heat dissipation and high reliability as described above.
[実施例]
次に、本発明の実施例について図面を参照して説明する
。[Example] Next, an example of the present invention will be described with reference to the drawings.
第1図は、本発明のヒートシンク付セラミックパッケー
ジの一例の斜視図、第2図は、同断面図である。FIG. 1 is a perspective view of an example of a ceramic package with a heat sink according to the present invention, and FIG. 2 is a sectional view thereof.
図において、1は平板状に形成されたアルミナのセラミ
ック基板であり、その上にはチップ固着剤を用いてチッ
プ2が搭載されている。5は前記チップ2をボードに接
続するための複数個のビンであり、このビン5は前記セ
ラミック基板1の下面周縁部に立設されたものである。In the figure, reference numeral 1 denotes an alumina ceramic substrate formed into a flat plate, on which a chip 2 is mounted using a chip fixing agent. Reference numeral 5 denotes a plurality of vials for connecting the chip 2 to the board, and the vials 5 are erected on the peripheral edge of the lower surface of the ceramic substrate 1.
セラミック基板1の中央の穴の周辺部には、ビン5とチ
ップ2とを接続する接続パッド3が設けられており、こ
の接続パッド3と前記ビン5とはセラミック基板1の表
面あるいは内層を通じて電気的に接続されている。チッ
プ2の端子部はワイヤなどの配線部材4で、ビン5に接
続された接続パッド3に接続されている。セラミック基
板1の上面は、チップ2を覆うように低融点ガラス等の
接着剤によりキャップ6が接着されており、中の気密を
保っている。キャップ6の上面には、アルミニウムのヒ
ートシンク7がヒートシンク固着剤によって接着されて
いる。このヒートシンク7は、中央に支柱8があり、支
柱8上に多数のフィン9が上下多段に並んだ構造をして
おり、しかもフィン9の厚さは中央よりも周辺部の方が
薄くなっている構造をしている。A connection pad 3 for connecting the via 5 and the chip 2 is provided around the hole in the center of the ceramic substrate 1, and the connection pad 3 and the via 5 are electrically connected through the surface or inner layer of the ceramic substrate 1. connected. The terminal portion of the chip 2 is connected to a connection pad 3 connected to a vial 5 by a wiring member 4 such as a wire. A cap 6 is bonded to the top surface of the ceramic substrate 1 with an adhesive such as low melting point glass so as to cover the chip 2, thereby keeping the inside airtight. An aluminum heat sink 7 is bonded to the top surface of the cap 6 with a heat sink adhesive. This heat sink 7 has a structure in which there is a support 8 in the center, and a large number of fins 9 are arranged on the support 8 in multiple vertical stages, and the thickness of the fins 9 is thinner at the periphery than at the center. It has a structure that
本発明による中央の支柱上のフィンの断面積が中央より
も周辺の方が薄くなっている構造のヒートシンクを有す
るパッケージと、従来のフィンの断面積がすべて等しい
構造のヒートシンクのパッケージの熱抵抗を実験で比較
した。本発明のパッケージでは、風速5 m / sの
とき熱抵抗は2.0に/Wであった。これに対して従来
のパッケージでは、風速5m/sのとき熱抵抗は2.2
に/Wであった。以上より、フィンの断面積がすべて等
しい構造のヒートシンクが搭載されているパッケージよ
りも、フィンの厚さが中央部よりも周辺部の方が薄くな
っている構造のヒートシンクが搭載されているパッケー
ジの方が、熱抵抗が小さくなることがわかったなお、上
記実施例においては、ヒートシング材料としてはアルミ
ニウムの場合の例を説明してきたが、これに限らず熱伝
導率の良い材料であれば本発明の効果を十分に満足でき
ることは明らかである。また、水平フィンの形状につい
ても、実施例では円形のフィンで説明したが、正方形、
長方形等の任意の形状でも同様の効果が得られるのは明
らかである。Thermal resistance of a package with a heat sink structure in which the cross-sectional area of the fins on the central pillar according to the present invention is thinner at the periphery than in the center, and a conventional heat sink package with a structure in which all the cross-sectional areas of the fins are the same. Comparison was made in an experiment. In the package of the present invention, the thermal resistance was 2.0/W at a wind speed of 5 m/s. On the other hand, in the conventional package, the thermal resistance is 2.2 at a wind speed of 5 m/s.
It was /W. From the above, it can be concluded that a package equipped with a heat sink whose fins are thinner at the periphery than the center is better than a package equipped with a heat sink whose fins have the same cross-sectional area. In addition, in the above example, an example was explained in which aluminum was used as the heat sink material, but the present invention is not limited to this, and any material with good thermal conductivity can be used. It is clear that the effects of the invention can be fully satisfied. Also, regarding the shape of the horizontal fins, although circular fins were explained in the examples, square,
It is obvious that similar effects can be obtained with any shape such as a rectangle.
〔発明の効果]
以上説明したように、本発明によれば、通電した時の発
熱によるチップ及びセラミックパッケージの温度上昇を
抑えることが可能となるため、高速動作で高信頼性のセ
ラミックパッケージを提供することが可能という効果が
得られる。[Effects of the Invention] As explained above, according to the present invention, it is possible to suppress the temperature rise of the chip and the ceramic package due to heat generation when electricity is applied, thereby providing a high-speed operation and highly reliable ceramic package. The effect is that it is possible to
第1図は本発明の一実施例を示すヒートシンク付セラミ
ックパッケージの斜視図、第2図は本発明の一実施例を
示すヒートシンク付セラミックパッケージの断面図、第
3図は従来のヒートシンク。 付セラミックパッケー
ジの一例の斜視図、第4図は従来のヒートシンク付セラ
ミックパッケージの一例の断面図である。
1・・・セラミック基板 2・・・チップ3・・・接
続パッド 4・・・配線部材5・・・ビン
6・・・キャップ7・・・ヒートシンク
8・・・支柱9・・・フィンFIG. 1 is a perspective view of a ceramic package with a heat sink showing an embodiment of the present invention, FIG. 2 is a sectional view of a ceramic package with a heat sink showing an embodiment of the present invention, and FIG. 3 is a conventional heat sink. FIG. 4 is a perspective view of an example of a conventional ceramic package with a heat sink, and FIG. 4 is a sectional view of an example of a conventional ceramic package with a heat sink. 1... Ceramic board 2... Chip 3... Connection pad 4... Wiring member 5... Bin
6...Cap 7...Heat sink
8... Support 9... Fin
Claims (1)
トシンクとを有するヒートシンク付セラミックパッケー
ジであって、 セラミック基板は、チップを搭載するものであり、 チップは、セラミック基板に接着されたものであり、 キャップは、チップを覆ってセラミック基板に接着され
たものであり、 ヒートシンクは、キャップの上面に設立されたものであ
り、支柱とフィンとを有し、 支柱は、フィンを支えるものであり、 フィンは、支柱を中心として該支柱に上下多段に並設さ
れ、各フィンの厚みは、中央よりも周辺部が薄くなって
いるものであることを特徴とするヒートシンク付セラミ
ックパッケージ。(1) A ceramic package with a heat sink that includes a ceramic substrate, a chip, a cap, and a heat sink, where the ceramic substrate is mounted with a chip, and the chip is bonded to the ceramic substrate. The cap covers the chip and is bonded to the ceramic substrate. The heat sink is installed on the top surface of the cap and has a support and a fin. The support supports the fin. A ceramic package with a heat sink, characterized in that the fins are arranged vertically in multiple stages around a pillar, and each fin is thinner at the periphery than at the center.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2281339A JPH04155944A (en) | 1990-10-19 | 1990-10-19 | Ceramic package with heat sink |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2281339A JPH04155944A (en) | 1990-10-19 | 1990-10-19 | Ceramic package with heat sink |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04155944A true JPH04155944A (en) | 1992-05-28 |
Family
ID=17637731
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2281339A Pending JPH04155944A (en) | 1990-10-19 | 1990-10-19 | Ceramic package with heat sink |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04155944A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100382118B1 (en) * | 2000-10-18 | 2003-05-01 | 한국생산기술연구원 | Radiator |
-
1990
- 1990-10-19 JP JP2281339A patent/JPH04155944A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100382118B1 (en) * | 2000-10-18 | 2003-05-01 | 한국생산기술연구원 | Radiator |
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