JPH02291154A - Ceramic package provided with heat sink - Google Patents
Ceramic package provided with heat sinkInfo
- Publication number
- JPH02291154A JPH02291154A JP1111458A JP11145889A JPH02291154A JP H02291154 A JPH02291154 A JP H02291154A JP 1111458 A JP1111458 A JP 1111458A JP 11145889 A JP11145889 A JP 11145889A JP H02291154 A JPH02291154 A JP H02291154A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- heat
- chip
- diameter
- sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 36
- 239000000758 substrate Substances 0.000 claims description 14
- 239000000463 material Substances 0.000 abstract description 7
- 230000000694 effects Effects 0.000 abstract description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052782 aluminium Inorganic materials 0.000 abstract description 5
- 230000017525 heat dissipation Effects 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 238000001816 cooling Methods 0.000 description 6
- 230000003247 decreasing effect Effects 0.000 description 4
- 239000003795 chemical substances by application Substances 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業」一の利用分野〕
本発明はＩＣチップやＩ．．．Ｓ Ｉチップなどのチッ
プを搭載するヒー１〜シンク付セラミックパッケージに
関するものである。[Detailed Description of the Invention] [Field of Application in Industry] The present invention is applicable to IC chips and I.C. ．． ．． The present invention relates to a ceramic package with a heat sink that mounts a chip such as an SI chip.
高度な半導体素了技術は理論素子から理解されるように
、ゲー１一当りのスピード、電力積が逐次減少しており
、また、微細加工技術の発達により、ケー１〜当りの占
有面積も次第に減少している。このため、半導体チップ
は高速化並びに１！１１集積化される傾向にある。一方
、この半導体チップを保護し、信頼性を向」ユさせるバ
ソケージは半導体チップのボンディング技術などを考慮
して実装の領域へと発展してきている。これに伴い、近
イＩ′のコンピュータ装置などにおいては、装置の処理
性能や信頼性の向−１二などのためにＬＳＴ化された半
導体素子や高密度で且つ小型化されたＬＳＩチノブ柘載
川の各種セラミックパソケーシが次第に取り入れられる
ようになってきた。As can be understood from theoretical elements in advanced semiconductor fabrication technology, the speed and power product per unit are gradually decreasing, and with the development of microfabrication technology, the area occupied by each unit is gradually decreasing. is decreasing. For this reason, there is a tendency for semiconductor chips to become faster and more integrated at 1:11. On the other hand, the bath cage, which protects semiconductor chips and improves their reliability, is being developed into the field of packaging by taking into consideration semiconductor chip bonding technology. Along with this, recent computer equipment, etc., has been using LST semiconductor elements and high-density and miniaturized LSI chips in order to improve the processing performance and reliability of the equipment. Various types of ceramic pasokakeshi from rivers are gradually being adopted.
ところで、このように素子の高集積化の度合か大きくな
ると、半導体チップの消費電力も増大することになる。By the way, as the degree of integration of elements increases, the power consumption of the semiconductor chip also increases.
そのため、消費電力の大きなＬＳＩチップはプラスチッ
クに比へ熱伝導率が大きいセラミックなどのバッケーシ
に搭載し、さらにボードのみによる放熱ては当然ＬＳＴ
チノブの冷却に文、｝して限界かある。Therefore, LSI chips that consume large amounts of power are mounted on backcases made of ceramic or other materials that have higher thermal conductivity than plastics, and of course LST
There is a limit to the cooling of Chinobu.
そこで、前述の高速でかつ高集積化されたＬＳＩチップ
を搭載する従来のセラミックパッケージにおいては、Ｌ
ＳＩチップからの放熱に対し冷却の観点から、放熱効率
の高いアルミニウムや銅の材料からなるヒートシンクを
、ＬＳＩチップの固着面と対向する反対側の表面に、熱
伝導性の優れた半田や接着剤により一体的に固着させて
放熱させるようにしている。Therefore, in the conventional ceramic package mounted with the aforementioned high-speed and highly integrated LSI chip,
From the perspective of cooling the heat dissipated from the SI chip, a heat sink made of aluminum or copper with high heat dissipation efficiency is placed on the surface opposite to the surface to which the LSI chip is fixed, using solder or adhesive with excellent thermal conductivity. They are fixed together to dissipate heat.
第３図に従来のヒートシンク付セラミックパッケージの
一例の断面図を示す。FIG. 3 shows a cross-sectional view of an example of a conventional ceramic package with a heat sink.
図において、１はセラミック基板、２はセラミック基板
１に接着されたチップ保持板である。チップ保持板２の
下面にはチップ固着剤７を用いてチップ６が搭載されて
いる。チップ６は、セラミック基板１上の接続パッド８
と配線部材９とによって結線されている。セラミック基
板１の下側には複数個のピン５が付けられている。チッ
プ保持板２の」二面には、ヒー１ヘシンク４がヒー１〜
シンク固着剤３によって接着されている。In the figure, 1 is a ceramic substrate, and 2 is a chip holding plate bonded to the ceramic substrate 1. A chip 6 is mounted on the lower surface of the chip holding plate 2 using a chip fixing agent 7. Chip 6 connects to connection pads 8 on ceramic substrate 1
and a wiring member 9. A plurality of pins 5 are attached to the lower side of the ceramic substrate 1. On the second side of the chip holding plate 2, the sink 4 for the heat 1 is connected to the heat 1 to
It is adhered with a sink adhesive 3.
第４図に従来のヒートシンク付セラミックパツケージの
一例の斜視図を示す。ヒー１〜シンク４は、図示のよう
に任意の方向の風に対応させるため、同し大きさ、形状
の円柱形ピンを多数並へた構造となっている。現在、こ
のような構造のヒートシンク付セラミックパッケージが
製作されている。FIG. 4 shows a perspective view of an example of a conventional ceramic package with a heat sink. As shown in the figure, each of the heaters 1 to sinks 4 has a structure in which a large number of cylindrical pins of the same size and shape are arranged in order to accommodate wind in any direction. Currently, ceramic packages with heat sinks having such a structure are being manufactured.
上述のような構造のヒートシンク付セラミックパッケー
ジでは、ヒーＩ〜シンタの放熱効率が場所によって変化
せず全体にわたりほぼ均−どなる。In the ceramic package with a heat sink having the above-described structure, the heat dissipation efficiency of heat I to sinter does not vary depending on the location and is almost uniform throughout.
しかしながら、実際の放熱状況はチノブに近いヒートシ
ンタ中央からほとんどの熱が逃げている。However, in the actual heat dissipation situation, most of the heat escapes from the center of the heat sinter near the chinobu.
従って、ヒー１〜シンク単体としての放熱効率はよいか
、パッケージ全体を考えた場合の放熱効率は悪くなり、
十分な冷却効果が得られないという欠点を有していた。Therefore, is the heat dissipation efficiency as a single heat sink unit good?The heat dissipation efficiency is poor when considering the entire package.
This had the disadvantage that a sufficient cooling effect could not be obtained.
これにより、チップそのものの温度上昇によりデバイス
の動作速度が低下するなどの問題が生ずる。This causes problems such as a decrease in the operating speed of the device due to an increase in the temperature of the chip itself.
本発明の目的は発熱量の大きな高集積化ＬＳ ：ｒチッ
プを搭載しても放熱効果が十分であるような信頼性の高
いヒートシンク付セラミックパッケージを提供すること
にある。An object of the present invention is to provide a highly reliable ceramic package with a heat sink that has a sufficient heat dissipation effect even when a highly integrated LS:r chip that generates a large amount of heat is mounted.
上記目的を達成するため、本発明によるヒートシンク付
セラミックパッケージにおいては中央部に穴を有するセ
ラミック基板と、該セラミック基板上に穴をふさぐよう
に接着されたチップ保持板と、多数のピンを有し、チッ
プ保持板上に接着されたヒートシンクと、該チップ保持
板の裏面に接着したチップとからなり、前記ヒートシン
クの各ピンの直径を中央部位から周辺にかけて順次変化
させ、中央部位のものを最大径、外周部位のものを最小
径としたものである。In order to achieve the above object, the ceramic package with a heat sink according to the present invention includes a ceramic substrate having a hole in the center, a chip holding plate bonded to the ceramic substrate so as to cover the hole, and a large number of pins. , consists of a heat sink glued on a chip holding plate and a chip glued on the back side of the chip holding plate, and the diameter of each pin of the heat sink is changed sequentially from the center to the periphery, and the diameter of the pin in the center is the maximum diameter. , the outer circumferential portion has the smallest diameter.
超ＬＳＩのように素子の高集積化の度合が大きくなると
、半導体チップの消費電力が増大し、そのため、消費電
力が大きなＬＳＩチップはプラスチックに比べ熱伝導率
の大きいセラミノクなどのパッケージに搭載する必要が
ある。さらにＬＳＩチップからの放熱に対する冷却の観
点から、放熱効率の高いアルミニウムや銅の材料からな
るヒートシンクを、ＬＳＩチップの固着面と対向する反
対側の表面に、熱伝導性に優れた半田や接着剤により一
体的に固着させ放熱させるようにしている。ヒー１〜シ
ンクの形状は様々であるが、強制空冷時の風の方向依存
性のなさとヒー１−シンク単独での放熱効率の高さから
従来のように小さなピンを多数並へた構造（ピンフィン
型）のものを用いたときには、チップで発生した熱のほ
とんどがそのままヒー）〜シンク中央付近のみからしか
逃げず、したがって、パッケーシ全体としての熱抵抗が
高くなるが、本発明においては各ビンの断而積がヒート
シンク中央部で大きく、ヒー１〜シンク周辺部にかけて
小さくなるような構造のヒー１ヘシンクであるために、
ヒー１〜シンク中央部のフィン隙間が狭くなっており、
強制空冷時の空気の流速が速くなる。同時に、ピン断面
積が大きいためにピン先端までの熱伝導も良くなってい
る。従って、ヒー１−シンク中央部での放熱効率が高く
なり、パッケージ全体としての熱抵抗は低下する。この
構造により、」一述のように高放熱に１で高信頼性のヒ
ー１〜シンク付セラミックパッケージが実現可能となる
。As the degree of integration of elements increases, such as in VLSIs, the power consumption of semiconductor chips increases. Therefore, LSI chips with high power consumption need to be mounted in packages such as Ceraminok, which has higher thermal conductivity than plastic. There is. Furthermore, from the perspective of cooling the heat dissipated from the LSI chip, a heat sink made of aluminum or copper material with high heat dissipation efficiency is attached to the surface opposite to the fixed surface of the LSI chip using solder or adhesive with excellent thermal conductivity. This allows them to be fixed together and to dissipate heat. There are various shapes of Hea 1 to sink, but because of the lack of dependence on wind direction during forced air cooling and the high heat dissipation efficiency of Hea 1 to sink alone, the conventional structure with many small pins arranged ( When a pin fin type) is used, most of the heat generated in the chip escapes only from the center of the sink, resulting in a high thermal resistance of the package as a whole.However, in the present invention, each bottle Since the heat sink has a structure in which the ultimate product of is large at the center of the heat sink and decreases from heat 1 to the periphery of the sink,
The fin gap between Heat 1 and the center of the sink is narrow.
Air flow speed during forced air cooling increases. At the same time, the large cross-sectional area of the pin improves heat conduction to the tip of the pin. Therefore, the heat dissipation efficiency at the center of the heat sink increases, and the thermal resistance of the package as a whole decreases. With this structure, it is possible to realize a highly reliable ceramic package with heat dissipation and heat sink as described above.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示すヒートシンク付セラミ
ックパッケージの断面図である。FIG. 1 is a sectional view of a ceramic package with a heat sink showing an embodiment of the present invention.
同図において、１は中央に穴を有する平板状に形成され
たアルミナのセラミック基板である。２はＣｕ／１１か
らなるチップ保持板であり、セラミック基板１の穴を塞
ぐようにその」二面に接着されている。チップ保持抜２
の上面にはアルミニウムのヒートシンク４がエポキシ樹
脂接着剤であるヒー１〜シンク固着剤３で接着されてい
る。チップ保持板２の下面のチップ搭載面には、Ａｕ−
Ｓｉ等のチップ固着剤７を用いてチップ６が搭載されて
いる。５は前記チップ６をボードに接続するためのピン
で、このピン５は前記セラミック基板１の下面周縁部に
立設されている。セラミック基板１の中央の穴の周辺部
にはピン５とチソプ６とを接続する接続パソト８が設け
られており、この接続パッド８と前記ピン５とはセラミ
ック基板１の表面あるいは内層を通じて電気的に接続さ
れている。ＬＳＩチップ６の端子部はワイヤなどの配線
部材９で、ピン５に接続された接続パノト８に接続され
ている。In the figure, reference numeral 1 denotes an alumina ceramic substrate formed into a flat plate having a hole in the center. A chip holding plate 2 made of Cu/11 is bonded to two surfaces of the ceramic substrate 1 so as to close the hole. Tip retainer 2
An aluminum heat sink 4 is bonded to the upper surface of the housing with heat 1 to sink adhesive 3, which are epoxy resin adhesives. The chip mounting surface on the lower surface of the chip holding plate 2 is made of Au-
A chip 6 is mounted using a chip fixing agent 7 such as Si. Reference numeral 5 denotes a pin for connecting the chip 6 to the board, and this pin 5 is provided upright on the periphery of the lower surface of the ceramic substrate 1. A connection pad 8 for connecting the pin 5 and the pad 6 is provided around the hole in the center of the ceramic substrate 1, and the connection pad 8 and the pin 5 are electrically connected through the surface or inner layer of the ceramic substrate 1. It is connected to the. The terminal portion of the LSI chip 6 is connected to a connecting panel 8 connected to the pin 5 by a wiring member 9 such as a wire.
第２図に本発明の一実施例を示すヒー１−シンク付セラ
ミックパッケージの斜視図を示す。FIG. 2 shows a perspective view of a ceramic package with a heat-sink according to an embodiment of the present invention.
本発明において、ヒー１〜シンク４は円柱状のビンを多
数並べた構造をとり、各々のピンの断面積はその設置部
位によって各々異なり、例えばヒートシンク中央部でφ
２ｌＩＩｎ、ヒー１−シンク最外周ではφ１．２■とし
、これらの中間では直径を徐々に変化させ、中央から外
周辺にかけて順次減少させている。In the present invention, the heat sinks 1 to 4 have a structure in which a large number of cylindrical bottles are lined up, and the cross-sectional area of each pin differs depending on the location where it is installed.
2lIIn, and φ1.2■ at the outermost periphery of the heat 1-sink, and the diameter is gradually changed in the middle of these, decreasing sequentially from the center to the outer periphery.
実施例において、断面積が中央部位で大きく周辺部位で
は小さいピンをもつ本発明によるビンフィン型のヒーｌ
−シンクとすへてのビンの断面積か同じである従来のビ
ンフィン型のヒー１〜シンクの熱抵抗を実験で比較した
。中央部でφ２ｎｗｎ、周辺部ではφ１．２ｍでこの中
間では徐々に直径が変化するビンからなる本発明のパッ
ケージでは、風速５ｍ／ｓのとき熱抵抗は２．ＯＫ／Ｗ
であった。これに対してピンの直径がすべて１． ６ｍ
ｍであるヒートシンクからなるバッケーシでは、風速５
ｍ／ｓのとき熱抵抗は２． ２Ｋ／Ｉｔ’であった。以
上より、断面積がすべて等しいピンからなるヒートシン
クが搭載されているバンケーシよりも、ヒー１〜シンク
中央で断面積が大きくヒー１ヘシンク周辺部になるに従
って断面積が小さくなるようなヒートシンクが搭載され
ている本発明によるパッケージの方が，熱抵抗が小さく
なることがわかった。In an embodiment, a pin-fin type heel according to the present invention having a pin having a large cross-sectional area in the central part and a small pin in the peripheral part is used.
- Thermal resistance of conventional bottle fin type heat 1 to sink, in which the cross-sectional area of the sink and the sink bottle are the same, was compared in an experiment. In the package of the present invention, which consists of a bottle with a diameter of 2nwn in the center and 1.2m in the periphery, the diameter gradually changes in the middle, the thermal resistance is 2.0m when the wind speed is 5m/s. OK/W
Met. On the other hand, all pin diameters are 1. 6m
In a bag case consisting of a heat sink of m, the wind speed is 5
The thermal resistance is 2. m/s. It was 2K/It'. From the above, compared to a van case equipped with a heat sink consisting of pins with the same cross-sectional area, a heat sink with a larger cross-sectional area from Hee 1 to the center of the sink and a smaller cross-sectional area toward the periphery of the sink from Hee 1 is installed. It was found that the package according to the present invention, which has a lower thermal resistance, has a lower thermal resistance.
なお、上記実施例においては、ヒートシンク４を樹脂剤
を用いてセラミック基板１に接合した例について説明し
たが、本発明はこれに限定されるものではなく、例えば
ろう付けにより溶着してもよいのは勿論である。また、
ヒートシンク材料としてはアルミニウムに限らず熱伝導
率の良い材料であれば本発明の効果を十分に満足できる
ことは明らかである。In addition, in the above embodiment, an example was explained in which the heat sink 4 was bonded to the ceramic substrate 1 using a resin material, but the present invention is not limited to this, and the heat sink 4 may be welded by brazing, for example. Of course. Also,
It is clear that the heat sink material is not limited to aluminum, but any material with good thermal conductivity can fully achieve the effects of the present invention.
以−１−説明したように、本発明によれば、通電時の発
熱によるチップ及びセラミックパッケーシの温度上昇を
抑えることが可能となるため、高速動作で高信頼性のセ
ラミックパッケージを提供できる効果を有する。As described below, according to the present invention, it is possible to suppress the temperature rise of the chip and the ceramic package due to heat generation during energization, and therefore it is possible to provide a high-speed operation and highly reliable ceramic package. has.
第１図は本発明の一実施例を示すヒートシンク付セラミ
ックパッケーシの断面図、第２図は本発明の一実施例を
示すヒートシンク付セラミノクパッケージの斜視図、第
３図は従来のヒー１〜シンク付セラミックパノケーシの
一例の断面図、第４図は従来のヒートシンク付セラミッ
クパッケージの−例の斜視図である。
１ セラミノク基板 ２ チップ保持板３ −ヒー
１〜シンク固着剤 ４ ヒートシンク５ ピン
６ チップ
７・・チップ固着剤 ８ 接続パン１−９ 配線
部材
特許出願人 １」本電気株式会社Fig. 1 is a sectional view of a ceramic package with a heat sink showing an embodiment of the present invention, Fig. 2 is a perspective view of a ceramic package with a heat sink showing an embodiment of the invention, and Fig. 3 is a conventional heat sink. 4 is a sectional view of an example of a ceramic pan case with a sink, and FIG. 4 is a perspective view of an example of a conventional ceramic package with a heat sink. 1 Ceraminoku board 2 Chip holding plate 3 - Heat 1 ~ Sink adhesive 4 Heat sink 5 Pin
6 Chip 7...Chip fixing agent 8 Connection pan 1-9 Wiring member patent applicant 1" Hondenki Co., Ltd.
Claims (1)
ック基板上に穴をふさぐように接着されたチップ保持板
と、多数のピンを有し、チップ保持板上に接着されたヒ
ートシンクと、該チップ保持板の裏面に接着したチップ
とからなり、前記ヒートシンクの各ピンの直径を中央部
位から周辺にかけて順次変化させ、中央部位のものを最
大径、外周部位のものを最小径としたことを特徴とする
ヒートシンク付セラミックパッケージ。(1) A ceramic substrate having a hole in the center, a chip holding plate glued onto the ceramic substrate so as to cover the hole, a heat sink having a large number of pins and glued onto the chip holding plate, The heat sink consists of a chip adhered to the back surface of a chip holding plate, and the diameter of each pin of the heat sink is changed sequentially from the center to the periphery, with the maximum diameter at the center and the minimum diameter at the outer periphery. Ceramic package with heat sink.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1111458A JPH02291154A (en) | 1989-04-28 | 1989-04-28 | Ceramic package provided with heat sink |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1111458A JPH02291154A (en) | 1989-04-28 | 1989-04-28 | Ceramic package provided with heat sink |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02291154A true JPH02291154A (en) | 1990-11-30 |
Family
ID=14561745
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1111458A Pending JPH02291154A (en) | 1989-04-28 | 1989-04-28 | Ceramic package provided with heat sink |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02291154A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10242357A (en) * | 1997-02-26 | 1998-09-11 | Pfu Ltd | Heat sink device |
| JP2012060002A (en) * | 2010-09-10 | 2012-03-22 | Mitsubishi Electric Corp | Structure for cooling semiconductor element |
| WO2021131175A1 (en) * | 2019-12-26 | 2021-07-01 | 株式会社明電舎 | Cooling structure and heatsink |
| WO2023017649A1 (en) * | 2021-08-11 | 2023-02-16 | ソニーセミコンダクタソリューションズ株式会社 | Semiconductor device package and heat dissipating lead frame |
-
1989
- 1989-04-28 JP JP1111458A patent/JPH02291154A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10242357A (en) * | 1997-02-26 | 1998-09-11 | Pfu Ltd | Heat sink device |
| JP2012060002A (en) * | 2010-09-10 | 2012-03-22 | Mitsubishi Electric Corp | Structure for cooling semiconductor element |
| CN102403288A (en) * | 2010-09-10 | 2012-04-04 | 三菱电机株式会社 | Cooling structure for semiconductor element |
| WO2021131175A1 (en) * | 2019-12-26 | 2021-07-01 | 株式会社明電舎 | Cooling structure and heatsink |
| JP2021103758A (en) * | 2019-12-26 | 2021-07-15 | 株式会社明電舎 | Cooling structure and heat sink |
| CN115004362A (en) * | 2019-12-26 | 2022-09-02 | 株式会社明电舍 | Cooling structure and radiator |
| WO2023017649A1 (en) * | 2021-08-11 | 2023-02-16 | ソニーセミコンダクタソリューションズ株式会社 | Semiconductor device package and heat dissipating lead frame |
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