JPH0415417B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a speed detection device using a resolver.

Speed detection using a resolver involves how to obtain a time differential signal dθ/dt with respect to the phase θ from the phase modulation signal sin(ωt+θ) from the resolver, and various methods have been used in the past. .
For example, the resolver output signal is synchronously rectified with an excitation signal to find the phase, and this is differentiated to obtain the speed signal dθ/dt, or both the excitation signal and output signal of the resolver are converted into rectangular waves, differentiated, and the rise timing or There is a method using digital processing, such as finding the falling timing, counting the deviation between the excitation signal and the output signal at these timings using clock pulses, and obtaining the phase θ. However, in both of these synchronous rectification methods and digital processing methods, the circuit configurations are complicated, and especially in the case of the latter digital processing method, many components are required due to digitization.

In view of the above, this invention uses an analog processing method,
A speed detection device using a resolver, which eliminates the need for complex circuits such as synchronous rectifier circuits and consists of simple circuits that combine OP amplifiers such as comparison amplifier circuits, integration/differentiation circuits, and hold circuits, FETs, resistors, and capacitors. The purpose is to generate a sawtooth waveform in synchronization with the resolver excitation signal, sample and hold this at the zero cross point of the phase modulation signal of the resolver output to determine the phase, differentiate this sample and hold waveform, and calculate the It is characterized in that the speed signal is obtained by removing phase changes from 2π or vice versa from 2π to 0.

The present invention will be specifically explained below using examples shown in the drawings. FIG. 1 is a configuration diagram of the resolver, FIG. 2 is a block diagram of a speed detection device using the resolver, and FIG. 3 is a time chart for explaining the operation.

As shown in Figure 1, the resolver is located on the stator side.
It is composed of phase excitation windings 1 and 2 and a one-phase output winding 3 on the rotor side. Excitation windings 1 and 2 are each
It is excited by two-phase sinusoidal signals sinωt and cosωt with a phase difference of 90°, and therefore an output signal sin(ωt+θ) phase-modulated at the rotation angle θ is output to the output winding 3 and taken out via the rotary transformer 4. . Of course, the rotation angle θ of the output winding changes with time, and if the speed of the motor of the detected object is ω _M , it can be expressed as ω _M t, and the resolver output signal is sin(ω +
ω _M )t. In other words, speed detection using a resolver is performed using the phase modulation output signal sin (ωt + θ).
Regarding how to extract the time differential signal dθ/dt of the phase θ (i.e., the motor speed ω _M of the detected object), as described above, the present invention outputs a sawtooth waveform synchronized with the excitation signal. The present invention provides a so-called sample-and-hold method in which a sample-and-hold waveform is obtained by performing a sample-and-hold at the zero-crossing point of , and the velocity signal ω _M is detected by differentiating the sample-and-hold waveform.

In the block diagram of Fig. 2, 5 and 6 are circuits that generate sawtooth wave signals in synchronization with the resolver excitation signals sinωt and cosωt, and 7 is the resolver output signal.
A waveform shaping circuit that converts sin(ωt+θ) into a rectangular wave,
8 and 9 are circuits that sample and hold the previous two sawtooth wave signals at the rising and falling timings of the rectangular wave signal, 10 and 11 are filter circuits that shape the sample and hold waveforms, and 12 and 13 are waveform shaping circuits. A differentiation circuit that differentiates the subsequent sample-and-hold waveform, and 14 a switching circuit that alternately switches between the two obtained differential waveforms and removes the phase change signal from 2π to 0 that occurs every rotation (electrical angle) of the resolver output winding. , is.

The time chart in FIG. 3 is the input/output waveform of each circuit in the block diagram in FIG. 2. From the top, the sine waveforms of the resolver excitation signal sinωt, cosωt, A, B
(approximated by a triangular wave), phase modulation signal sin (ωt + θ) or sin (ωt + ω _M t) of the resolver output signal, C (also approximated by a triangular wave), rectangular wave signal D after waveform shaping of the phase modulation signal, resolver excitation signal Synchronous sawtooth wave signals E and F, waveforms G and H obtained by sampling and holding these two sawtooth wave signals E and F at the rising and falling timings of the rectangular wave signal D, these sample and hold waveforms G, Filter output waveforms I and J that have been shaped such as ripple removal of H, waveform K of phase time differential signal dθ/dt (velocity signal ω _M ) obtained by differentiating sample and hold waveforms I and J after this filter, L, per revolution of resolver output (electrical angle)
In order to remove the phase change (from 2π to 0), the above 2
3 represents a speed signal waveform M obtained by alternately switching two differential waveform signals K and L.

That is, the present invention includes the sawtooth waveform generating circuit 5,
6, resolver excitation signals sinωt, cosωt, A,
Sawtooth wave signals E and F are formed in synchronization with signal B, and signals sin (ωt+θ) and C, which are phase modulated according to the rotation angle θ and output from the resolver, are converted into a rectangular wave D by a waveform shaping circuit 7. Furthermore, using two sample and hold circuits 8 and 9, sample and hold the previous sawtooth wave signals E and F at the rising and falling timings of this rectangular wave D to obtain sample and hold waveforms G and H,
Waveforms I and J from which ripples and the like have been removed from the sample-and-hold waveforms G and H through filter circuits 10 and 11 are differentiated by differentiating circuits 12 and 13 to obtain phase differential signals K and L, and these two phase differential signals Considering that K and L also include a phase change signal (from 2π to 0) for each revolution (electrical angle) of the resolver output, a switching circuit 14 is inserted to alternately switch these two phase differential signals K and L. The output is switched to obtain a linear speed signal.

In the above explanation, the phase θ of the phase modulation signal sin(ωt + θ) of the resolver output was described as rotating in the direction that increases with time, but of course if the rotation is in the opposite direction, the phase θ decreases with time and the sample The slope of the hold waveform is reversed, and the obtained differential signal has a negative value. That is, with this method, the detected speed signal indicates not only the rotational speed but also the direction of rotation.

As described above, the present invention samples and holds a sawtooth waveform synchronized with the resolver excitation signal at the zero crossing point of the phase modulation signal of the resolver output, differentiates the obtained sample and hold waveform, and It is obtained as a speed signal by removing phase changes, and the detection speed is about 0 to 150Hz, compared to the normal excitation frequency of 3KHz to 6KHz, making it possible to detect speed with extremely high precision.The detection method also uses sample and hold. Compared to the synchronous rectification method, the waveform ripple before differentiation is small and filter processing is easy.The most important feature is that it uses a comparison amplifier circuit that combines an OP amplifier, FET, resistor, capacitor, etc. This means that a circuit with a simple configuration such as a differential circuit is sufficient, and the configuration is significantly simplified compared to conventional circuits of this type.

In addition, the above embodiment includes two sawtooth wave generation circuits, a sample hold circuit, a filter circuit, and two differentiating circuits, and each rotation (electrical angle) of the resolver output is
In order to remove phase change signals from 2π to 0 or from 0 to 2π, two differential signals from a differential circuit are alternately switched to obtain a linear speed signal. It is also possible to consider methods such as outputting only one signal, using a sampling circuit to remove the phase change signal, or using a separate filter.

[Brief explanation of drawings]

As for the drawings, FIG. 1 is a configuration diagram of the resolver, FIG. 2 is a block diagram of the embodiment, and FIG. 3 is a time chart for explaining the operation. 1, 2... Resolver excitation winding, 3... Resolver output winding, 5, 6... Sawtooth wave signal generation circuit, 7
... Waveform shaping circuit, 8, 9 ... Sample hold circuit, 10, 11 ... Filter circuit, 12, 1
3...Differential circuit, 14...Switching circuit.

Claims (1)

[Claims] 1. In a resolver consisting of a 1, 2-phase excitation winding and a 1-phase output winding, two sawtooth wave signal generation circuits and outputs that generate a sawtooth waveform in synchronization with the excitation signal of the 2-phase excitation winding. a waveform shaping circuit that converts a phase modulation signal according to the rotation angle from the winding into a rectangular wave; two sample and hold circuits that sample and hold the two sawtooth wave signals at the rise and fall timings of the rectangular wave signal; Two filter circuits remove ripples from the sample-and-hold waveform, two differentiating circuits differentiate the sample-and-hold waveform after shaping by the filter circuit, and these two differential waveforms are alternately switched to 2π of the sample-and-hold waveform.
1. A speed detection device using a resolver, comprising a switching circuit for removing a jump waveform when a phase changes from 0 to 2π or from 0 to 2π.