JPH04145828A - Preventing system for malfunction of power supply protective circuit - Google Patents

Preventing system for malfunction of power supply protective circuit

Info

Publication number
JPH04145828A
JPH04145828A JP2267972A JP26797290A JPH04145828A JP H04145828 A JPH04145828 A JP H04145828A JP 2267972 A JP2267972 A JP 2267972A JP 26797290 A JP26797290 A JP 26797290A JP H04145828 A JPH04145828 A JP H04145828A
Authority
JP
Japan
Prior art keywords
power supply
supply device
circuit
internal power
internal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2267972A
Other languages
Japanese (ja)
Inventor
Hiroyuki Mase
間瀬 広行
Masaharu Tosa
土佐 正治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2267972A priority Critical patent/JPH04145828A/en
Publication of JPH04145828A publication Critical patent/JPH04145828A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent malfunctions of a power supply protective circuit by protecting the power supply protective circuit from receiving an abnormality detecting signal in a transient period of time even when the signal is issued before a DC power supply voltage applied from an external power supply apparatus reaches a predetermined value. CONSTITUTION:An apparatus 5 uses the power supplied from an external power supply apparatus 1 and received once by an internal power supply 2. A protective means 6, when it is supplied with power from the external power supply 1, starts operation and monitors the output of the internal power supply 2, and when the protective means 6 judges the output to be abnormal, the protective means 6 stops the internal power supply 2 to receive power. A reset means 7, when power supply from the external power supply 1 starts, starts operation and keeps stopping the internal power supply 2 of the protective means 6 to receive power until a predetermined period of time passes to protect the internal power supply 2 from erroneously stopping receiving power supply.

Description

【発明の詳細な説明】 〔概要〕 装置内部に設けた内部電源装置の保護回路が誤動作する
ことを防止する電源保護回路の誤動作防止方式に関し、 保護回路が誤動作しないようにすることを目的とし、 外部電源装置から供給される電源を一旦内部電源装置で
受電した後使用する装置において、該外部電源装置から
電源を供給された時動作を開始し、該内部電源装置の出
力を監視して異常と判定した時、該内部電源装置の受電
を停止させる保護手段と、該外部電源装置から電源を供
給された時動作を開始して、所定の時間該保護手段の動
作を禁止するリセット手段とを設け、前記外部電源装置
から電源の供給が開始された時点から、該所定の時間が
経過するまでは、該保護手段の前記内部電源装置に対す
る受電停止動作を阻止する構成とする。
[Detailed Description of the Invention] [Summary] Regarding a malfunction prevention method for a power supply protection circuit that prevents a malfunction of a protection circuit of an internal power supply device provided inside a device, the present invention aims to prevent the protection circuit from malfunctioning. After the internal power supply receives power from an external power supply, the device starts operating when power is supplied from the external power supply, monitors the output of the internal power supply, and detects abnormalities. and a reset means that starts operation when power is supplied from the external power supply and prohibits the operation of the protection means for a predetermined period of time. The protection device is configured to prevent the protection unit from stopping power reception from the internal power supply device until the predetermined time period elapses from the time when power supply from the external power supply device is started.

〔産業上の利用分野〕[Industrial application field]

本発明は、外部電源装置から電源を供給されて動作する
装置に係り、特に該装置内部に設けた内部電源装置の保
護回路が誤動作することを防止する電源保護回路の誤動
作防止方式に関する。
The present invention relates to a device that operates by being supplied with power from an external power supply device, and more particularly to a malfunction prevention method for a power supply protection circuit that prevents a malfunction of a protection circuit of an internal power supply device provided inside the device.

計算機システム等においては、外部電源装置で一括して
商用電源を受電し、各装置が必要とする直流電源を作成
して供給している。そして、各装置では、この直流電源
を内部電源装置で受電し、定電圧化して使用している。
In computer systems and the like, an external power supply device collectively receives commercial power, and generates and supplies the DC power required by each device. In each device, this DC power is received by an internal power supply device, and is used after being made into a constant voltage.

ところで、この内部電源装置は、通常過電流によって回
路部品が破壊されることを防止するため、内部電源装置
の出力側の電圧を監視して、所定の電圧以下となると電
源を切断させる保護回路が設けられているが、この保護
回路の誤動作は防止されることが必要である。
By the way, this internal power supply usually has a protection circuit that monitors the voltage on the output side of the internal power supply and shuts off the power when the voltage falls below a predetermined level, in order to prevent circuit components from being destroyed by overcurrent. However, it is necessary to prevent malfunction of this protection circuit.

〔従来の技術〕[Conventional technology]

第4図は従来技術の一例を説明するブロック図で、第5
図は第4図の動作を説明するタイムチャートである。
FIG. 4 is a block diagram illustrating an example of the prior art.
The figure is a time chart explaining the operation of FIG. 4.

外部電源装置1の図示省略したスイッチが投入されると
、第5図外部電源の■に示す如く、外部電源装置1が作
成する直流電源の電圧が上昇し、この直流電源が内部電
源装置2に供給される。
When a switch (not shown) of the external power supply device 1 is turned on, the voltage of the DC power supply generated by the external power supply device 1 rises, as shown in (■) of the external power supply in FIG. Supplied.

内部電源装置2は、直流電源が供給されると、第5図内
部電源に示す如く、供給された直流電源の電圧を一定の
値になるように制御して、装置内部の各回路に供給する
When the internal power supply device 2 is supplied with DC power, it controls the voltage of the supplied DC power to a constant value and supplies it to each circuit inside the device, as shown in the internal power supply in FIG. .

電源異常検出回路3は、外部電源装置1が送出する直流
電源によって動作を開始し、内部電源装置2の出力側の
電圧を監視する。そして、この電圧が第5図内部電源の
■に示す所定の電圧以下に低下すると、第5図異常検出
信号の■に示す如(、電源異常信号を保護回路4に送出
し、保護回路4は第5図保護信号の■に示す如く、内部
電源装置2に保護信号を送出する。
The power supply abnormality detection circuit 3 starts operating with the direct current power sent from the external power supply 1 and monitors the voltage on the output side of the internal power supply 2. When this voltage drops below the predetermined voltage shown in (■) of the internal power supply in FIG. A protection signal is sent to the internal power supply device 2, as shown in (■) of the protection signal in FIG.

保護信号を受信した内部電源装置2は、例えば遮断器が
動作して外部電源装置1が送出する直流電源の受電を停
止するため、内部電源装置2の回路部品や、この内部電
源装置2から電源を供給されている装置内部の回路部品
に過大電流が流れ続けることで破壊されることを防止す
る。
The internal power supply device 2 that has received the protection signal operates a circuit breaker, for example, to stop receiving the DC power sent out by the external power supply device 1. This prevents damage to circuit components inside the device that are supplied with excessive current due to continued flow.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の電源異常検出回路3は、上記の如く、外部電源装
置1が供給する直流電源によって、内部電源装置2が送
出する電圧の監視を開始するため、内部電源装置2の送
出する電源電圧が第5図内部電源の■に示す所定の電圧
に到達する前に、電源異常検出回路3が電圧監視を開始
すると、第5図異常検出信号の■に示す如く、保護回路
4に電源異常信号を送出し、保護回路4は第5図保護信
号の■に示す如く、内部電源装置2に保護信号を送出す
る。
As described above, the conventional power supply abnormality detection circuit 3 starts monitoring the voltage sent out by the internal power supply 2 using the DC power supplied by the external power supply 1. If the power supply abnormality detection circuit 3 starts voltage monitoring before reaching the predetermined voltage shown in ■ of the internal power supply in Figure 5, it sends a power supply abnormality signal to the protection circuit 4 as shown in ■ of the abnormality detection signal in Figure 5. However, the protection circuit 4 sends out a protection signal to the internal power supply device 2, as shown in (■) of the protection signal in FIG.

従って、内部電源装置2は、障害発生が無く、過大電流
が流れていないにもかかわらず、遮断器が動作して電源
供給を停止するという問題がある。
Therefore, the problem with the internal power supply device 2 is that the circuit breaker operates and stops power supply even though no fault has occurred and no excessive current is flowing.

本発明はこのような問題点に鑑み、外部電源装置1が送
出する直流電源の電圧が規定電圧に到達するまでの過渡
期は、異常検出信号が送出されても、これを保護回路4
に受信させないようにして、保護回路4が誤動作しない
ようにすることを目的としている。
In view of these problems, the present invention has been designed to prevent abnormality detection signals from being sent to the protection circuit 4 during the transition period until the voltage of the DC power source sent by the external power supply device 1 reaches the specified voltage.
The purpose of this is to prevent the protection circuit 4 from malfunctioning by preventing it from being received.

〔課題を解決するための手段〕[Means to solve the problem]

第1図は本発明の詳細な説明するブロック図である。 FIG. 1 is a block diagram illustrating the invention in detail.

装置5は外部電源装置1から供給される電源を一旦内部
電源装置2で受電した後使用する。保護手段6は、外部
電源装置1から電源を供給された時動作を開始し、内部
電源装置2の出力を監視して異常と判定した時、この内
部電源装置2の受電を停止させる。即ち、第4図で説明
した如く、内部電源装置2の遮断器を動作させる。
The device 5 uses the power supplied from the external power supply 1 once received by the internal power supply 2. The protection means 6 starts operating when power is supplied from the external power supply device 1, and when it monitors the output of the internal power supply device 2 and determines that it is abnormal, stops receiving power from the internal power supply device 2. That is, as explained in FIG. 4, the circuit breaker of the internal power supply device 2 is operated.

しかし、リセット手段7は外部電源装置1から電源の供
給が開始された時点で動作を開始して、所定の時間が経
過するまで、保護手段6の内部電源装置2に対する受電
停止動作を阻止する。即ち、この内部電源装置2の遮断
器を動作させる動作を阻止する。
However, the reset means 7 starts operating when the external power supply device 1 starts supplying power, and prevents the protection means 6 from stopping power reception to the internal power supply device 2 until a predetermined period of time has elapsed. That is, the operation of operating the circuit breaker of this internal power supply device 2 is prevented.

〔作用〕 上記の如く構成することにより、リセット手段7は、内
部電源装置2が外部電源装置1から電源の供給を受は始
めた初期時に、保護手段6が出力異常と誤認識して受電
を停止させる動作を阻止するため、誤って内部電源装置
2が電源供給を停止することを防止することが出来る。
[Function] By configuring as described above, the reset means 7 prevents the protection means 6 from erroneously recognizing an output abnormality and receiving power at the initial stage when the internal power supply device 2 starts receiving power supply from the external power supply device 1. Since the stopping operation is prevented, it is possible to prevent the internal power supply device 2 from accidentally stopping the power supply.

〔実施例〕〔Example〕

第2図は本発明の一実施例を示す回路のブロック図で、
第3図は第2図の動作を説明するタイムチャートである
FIG. 2 is a block diagram of a circuit showing an embodiment of the present invention.
FIG. 3 is a time chart explaining the operation of FIG. 2.

第4図と同一符号は同一機能のものを示す。外部電源装
置1の図示省略したスイッチが投入されると、前記同様
第3図外部電源の■に示す如く、外部電源装置1が作成
する直流電源の電圧が上昇し、この直流電源が内部電源
装置2に供給される。
The same reference numerals as in FIG. 4 indicate the same functions. When the switch (not shown) of the external power supply device 1 is turned on, the voltage of the DC power supply generated by the external power supply device 1 rises, as shown in (■) of the external power supply in FIG. 2.

内部電源装置2は、直流電源が供給されると、第3図内
部電源に示す如く、供給された直流電源の電圧を一定の
値になるように制御して、装置内部の各回路に供給する
When DC power is supplied, the internal power supply device 2 controls the voltage of the supplied DC power to a constant value and supplies it to each circuit inside the device, as shown in the internal power supply in FIG. .

電源異常検出回路3は、外部電源装置1が送出する直流
電源によって動作を開始し、内部電源装置2の出力側の
電圧を監視する。この時、内部電源装置2の出力電圧の
上昇が遅く、この電圧が第3図内部電源の■に示す所定
の電圧以下であると、第3図異常検出体号の■に示す如
く、電源異常信号として論理″1″をAND回路9に送
出する。
The power supply abnormality detection circuit 3 starts operating with the direct current power sent from the external power supply 1 and monitors the voltage on the output side of the internal power supply 2. At this time, if the output voltage of the internal power supply device 2 rises slowly and this voltage is below the predetermined voltage shown in ■ of the internal power supply in Figure 3, a power supply abnormality will occur as shown in ■ of the abnormality detection symbol in Figure 3. A logic "1" is sent to the AND circuit 9 as a signal.

この時、リセット回路8は外部電源装置1から供給され
る直流電流によって動作を開始するが、電源異常検出回
路3よりも低い電圧で動作可能であり、電源異常検出回
路3が動作するより速く、第3図リセット信号の■に示
す如く、論理“0”をAND回路9に送出する。
At this time, the reset circuit 8 starts operating with the direct current supplied from the external power supply 1, but it can operate at a lower voltage than the power supply abnormality detection circuit 3, and operates faster than the power supply abnormality detection circuit 3. As shown in the reset signal (■) in FIG. 3, a logic "0" is sent to the AND circuit 9.

従って、AND回路9は論理“0”を保護回路4に送出
したままであり、保護回路4は第3図保護信号に示す如
く、内部電源装置2の遮断器を動作させる論理“1”を
送出しない。
Therefore, the AND circuit 9 continues to send the logic "0" to the protection circuit 4, and the protection circuit 4 sends out the logic "1" which operates the circuit breaker of the internal power supply 2, as shown in the protection signal in FIG. do not.

電源異常検出回路3は、内部電源装置2の出力側の電圧
が所定の電圧0以上となると、第3図異常検出体号の[
相]に示す如く、論理“0″をAND回路9に送出する
。又、リセット回路8は第3図リセット信号の■に示す
所定の時間が経過すると、論理“1”をAND回路9に
送出する。
When the voltage on the output side of the internal power supply device 2 reaches a predetermined voltage of 0 or more, the power supply abnormality detection circuit 3 detects the abnormality detection symbol [ in Fig. 3].
As shown in the phase], a logic "0" is sent to the AND circuit 9. Further, the reset circuit 8 sends a logic "1" to the AND circuit 9 when a predetermined time period shown in (■) of the reset signal in FIG. 3 has elapsed.

内部電源装置2又は装置5の受電回路に障害が発生し、
内部電源装置2の送出する電圧が低下して、第3図内部
電源の■に示す所定の電圧以下となると、電源異常検出
回路3は、第3図異常検出体号の■に示す如く、論理“
1”をAND回路9に送出する。
A failure occurs in the power receiving circuit of internal power supply device 2 or device 5,
When the voltage sent out by the internal power supply device 2 decreases and becomes below the predetermined voltage shown in ■ of the internal power supply in FIG. “
1'' to the AND circuit 9.

リセット回路8はこの時、第3図リセット信号に示す如
く、論理”1”をAND回路9に送出しているため、A
ND回路9は保護回路4に第3図保護信号に示す如く、
論理“1”を送出する。
At this time, the reset circuit 8 is sending a logic "1" to the AND circuit 9 as shown in the reset signal in FIG.
The ND circuit 9 sends the protection signal to the protection circuit 4 as shown in the protection signal in FIG.
Sends logic “1”.

従って、保護回路4は内部電源装置2の遮断器を動作さ
せるため、内部電源袋W2は外部電源装置1が送出する
直流電源の受電を停止する。従って、内部電源装置2の
回路部品や、内部電源装置2から電源を供給されている
装置5の内部の回路部品に過大電流が流れ続けることで
破壊されることを防止することが出来る。
Therefore, since the protection circuit 4 operates the circuit breaker of the internal power supply device 2, the internal power supply bag W2 stops receiving the DC power transmitted from the external power supply device 1. Therefore, it is possible to prevent the circuit components of the internal power supply device 2 and the circuit components inside the device 5 to which power is supplied from the internal power supply device 2 from being destroyed due to continued flow of excessive current.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く、本発明は電源シーケンスによって保
護回路が誤動作することを防止するため、内部電源装置
や装置内部の受電回路に異常がなくても、外部電源装置
からの受電が停止することが無い。
As explained above, since the present invention prevents the protection circuit from malfunctioning due to the power supply sequence, the reception of power from the external power supply does not stop even if there is no abnormality in the internal power supply or the power receiving circuit inside the device. .

従って、保護回路の信頼性を高めることが出来る。Therefore, the reliability of the protection circuit can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の詳細な説明するブロック図、第2図は
本発明の一実施例を示す回路のブロック図、 第3図は第2図の動作を説明するタイムチャート、第4
図は従来技術の一例を説明するブロック図、第5図は第
4図の動作を説明するタイムチャートである。 図において、 1は外部電源装置、 3は電源異常検出回路、 5は装置、 7はリセット手段、 9はAND回路である。 2は内部電源装置、 4は保護回路、 6は保護手段、 8はリセット回路、
FIG. 1 is a block diagram explaining the present invention in detail, FIG. 2 is a block diagram of a circuit showing an embodiment of the present invention, FIG. 3 is a time chart explaining the operation of FIG. 2, and FIG.
The figure is a block diagram explaining an example of the prior art, and FIG. 5 is a time chart explaining the operation of FIG. 4. In the figure, 1 is an external power supply device, 3 is a power supply abnormality detection circuit, 5 is a device, 7 is a reset means, and 9 is an AND circuit. 2 is an internal power supply device, 4 is a protection circuit, 6 is a protection means, 8 is a reset circuit,

Claims (1)

【特許請求の範囲】 外部電源装置(1)から供給される電源を一旦内部電源
装置(2)で受電した後使用する装置(5)において、
該外部電源装置(1)から電源を供給された時動作を開
始し、該内部電源装置(2)の出力を監視して異常と判
定した時、該内部電源装置(2)の受電を停止させる保
護手段(6)と、 該外部電源装置(1)から電源を供給された時動作を開
始して、所定の時間該保護手段(6)の動作を禁止する
リセット手段(7)とを設け、 前記外部電源装置(1)から電源の供給が開始された時
点から、該所定の時間が経過するまでは、該保護手段(
6)の前記内部電源装置(2)に対する受電停止動作を
阻止することを特徴とする電源保護回路の誤動作防止方
式。
[Claims] A device (5) that uses power supplied from an external power supply device (1) once received by an internal power supply device (2),
It starts operating when power is supplied from the external power supply device (1), and stops receiving power from the internal power supply device (2) when it monitors the output of the internal power supply device (2) and determines that it is abnormal. A protection means (6) and a reset means (7) that starts operating when power is supplied from the external power supply device (1) and prohibits operation of the protection means (6) for a predetermined period of time, The protection means (
6) A method for preventing malfunction of a power supply protection circuit, characterized in that the operation of stopping power reception to the internal power supply device (2) is prevented.
JP2267972A 1990-10-05 1990-10-05 Preventing system for malfunction of power supply protective circuit Pending JPH04145828A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2267972A JPH04145828A (en) 1990-10-05 1990-10-05 Preventing system for malfunction of power supply protective circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2267972A JPH04145828A (en) 1990-10-05 1990-10-05 Preventing system for malfunction of power supply protective circuit

Publications (1)

Publication Number Publication Date
JPH04145828A true JPH04145828A (en) 1992-05-19

Family

ID=17452144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2267972A Pending JPH04145828A (en) 1990-10-05 1990-10-05 Preventing system for malfunction of power supply protective circuit

Country Status (1)

Country Link
JP (1) JPH04145828A (en)

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