JPH11178193A - Power unit - Google Patents

Power unit

Info

Publication number
JPH11178193A
JPH11178193A JP33966697A JP33966697A JPH11178193A JP H11178193 A JPH11178193 A JP H11178193A JP 33966697 A JP33966697 A JP 33966697A JP 33966697 A JP33966697 A JP 33966697A JP H11178193 A JPH11178193 A JP H11178193A
Authority
JP
Japan
Prior art keywords
circuit
abnormality
line switch
power supply
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33966697A
Other languages
Japanese (ja)
Inventor
Tsuneki Kawaguchi
恒樹 川口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP33966697A priority Critical patent/JPH11178193A/en
Publication of JPH11178193A publication Critical patent/JPH11178193A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a power unit with a safety circuit for interrupting a power switch surely when the voltage or current is abnormal and being restored automatically after interrupting a switch temporarily in case of a temporary abnormality due to noise, for example. SOLUTION: Upon occurrence of an abnormal voltage or current, an abnormality detection circuit 4 detects the abnormality and delivers a signal for interrupting a line switch 2 to a latch circuit 5. Upon elapsing a predetermined time, a reset circuit 6 delivers an unlatch signal to the latch circuit 5 and the line switch 2 is connected. A number of trial limiting circuit 7 sets the number of times for trying interruption and connection of the line switch 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電源回路に関する
ものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit.

【0002】[0002]

【従来の技術】ノートパソコン等の情報処理装置に使用
されている電源装置には、CPU、メモリー等のデバイ
スに定格電力を供給する変換器と前記デバイスを保護す
る安全回路等が設けられている。
2. Description of the Related Art A power supply device used in an information processing apparatus such as a notebook personal computer is provided with a converter for supplying rated power to devices such as a CPU and a memory, and a safety circuit for protecting the device. .

【0003】CPU、メモリー等にある規定以上の電圧
を印加したり、または電流を流したりすると高価なデバ
イスを破壊したり、さらには情報処理装置が発煙、発火
等の危険な状態になる可能性がある。そこで、異常検出
回路を設け過電圧、過電流のときには、ACアダプタ
ー、電池等の電源ラインの根元のスイッチを遮断する安
全回路が設けられている。
[0003] When a voltage higher than a predetermined value or a current is applied to a CPU, a memory, or the like, an expensive device may be destroyed, and the information processing apparatus may be in a dangerous state such as smoking or ignition. There is. Therefore, an abnormality detection circuit is provided to provide a safety circuit that shuts off a switch at the root of a power supply line such as an AC adapter or a battery when an overvoltage or an overcurrent occurs.

【0004】従来のノートパソコン等における電圧の異
常時の電源装置の動作を図4に示す。
FIG. 4 shows the operation of the power supply device in a conventional notebook personal computer or the like when the voltage is abnormal.

【0005】図において、51はACアダプター、電池
等の電源、52は電源の根元のラインスイッチ、53は
DC/DCコンバータ、54は異常検出回路、55は処
理回路である。
In FIG. 1, reference numeral 51 denotes an AC adapter, a power supply such as a battery, 52 denotes a line switch at the root of the power supply, 53 denotes a DC / DC converter, 54 denotes an abnormality detection circuit, and 55 denotes a processing circuit.

【0006】DC/DCコンバータ53は、電源51か
ら供給されたDC電圧を変換して、処理回路55にある
CPU、メモリー等のデバイスに適合した電力を供給し
ている。異常検出回路54は、DC/DCコンバータ5
3から供給される電圧、電流を検出している。異常検出
回路54は異常を検出すると、ラインスイッチ52を遮
断して処理回路55を保護している。
[0006] The DC / DC converter 53 converts a DC voltage supplied from the power supply 51 and supplies power suitable for devices such as a CPU and a memory in the processing circuit 55. The abnormality detection circuit 54 includes the DC / DC converter 5
3 is detected. When the abnormality detection circuit 54 detects an abnormality, it shuts off the line switch 52 to protect the processing circuit 55.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、従来の
安全回路では、過電圧、過電流等の異常を検出した場
合、異常が取り除かれるまでラインスイッチの接続、遮
断が繰り返される問題があった。
However, the conventional safety circuit has a problem that when an abnormality such as an overvoltage or an overcurrent is detected, the connection and disconnection of the line switch are repeated until the abnormality is removed.

【0008】図4でこの現象を説明する。図4(a)は
電圧が正常値であり、ラインスイッチ52は接続状態で
ある。図4(b)は異状時の状態で、電圧の異常を異常
検出回路54が検知し、ラインスイッチ52に信号を送
り、ラインスイッチ52は遮断されている。図4(b)
では、電源51からの電力供給が停止するので、異常検
出回路54が検出する電圧は、瞬時の間正常範囲とな
る。電圧が見かけ上正常値に戻り、異常検出回路54が
解除しラインスイッチ52が再接続する。しかし、異常
原因は取り除かれていないので、再び異常検出回路54
が異常を検知しラインスイッチ52を遮断する。したが
って、ラインスイッチ52は、電圧異常が取り除かれる
まで接続と遮断の動作を繰り返す。
FIG. 4 illustrates this phenomenon. FIG. 4A shows that the voltage is a normal value and the line switch 52 is in a connected state. FIG. 4B shows a state at the time of abnormality, in which the abnormality detection circuit 54 detects an abnormality in voltage, sends a signal to the line switch 52, and the line switch 52 is shut off. FIG. 4 (b)
In this case, since the power supply from the power supply 51 is stopped, the voltage detected by the abnormality detection circuit 54 is within the normal range for a moment. The voltage apparently returns to a normal value, the abnormality detection circuit 54 is released, and the line switch 52 is reconnected. However, since the cause of the abnormality has not been removed, the abnormality detection circuit 54
Detects an abnormality and shuts off the line switch 52. Therefore, the line switch 52 repeats the connection and disconnection operations until the abnormal voltage is removed.

【0009】本発明はこのようなラインスイッチの接続
/遮断の繰り返しを防止し、さらにノイズ等の誤動作に
よる異常検出に対しては、ラインスイッチがある一定時
間後に自動復帰する安全回路を具備した電源装置を提供
することを目的とする。
The present invention prevents such repetition of connection / disconnection of a line switch, and further includes a power supply having a safety circuit for automatically resetting the line switch after a certain period of time when an abnormality is detected due to a malfunction such as noise. It is intended to provide a device.

【0010】[0010]

【課題を解決するための手段】上記課題を解決するため
に本発明の電源装置は、過電圧、過電流の要因で、安全
回路が作動した場合、異常が取り除かれるまでラインス
イッチを遮断するラッチ回路を備えるものであり、ラッ
チ回路によってラインスイッチの接続/遮断の繰り返し
をなくすことができる。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, a power supply device according to the present invention is provided with a latch circuit for shutting off a line switch until an abnormality is removed when a safety circuit is activated due to overvoltage or overcurrent. And the repetition of connection / disconnection of the line switch can be eliminated by the latch circuit.

【0011】[0011]

【発明の実施の形態】本発明の請求項1に記載の発明
は、電源と、電源からの電力の供給を遮断する遮断回路
と、電源から供給された電圧を変換する変換器と、電
圧、電流等の異常を検出する異常検出回路と、異常検出
回路が検出した異常状態をラッチするラッチ回路とを備
えたことを特徴とするものであり、異常検出回路が異常
を検出した場合ラッチ回路によってラインスイッチの接
続/遮断の繰り返しを確実に防止する作用を有する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention according to claim 1 of the present invention provides a power supply, a cutoff circuit for cutting off the supply of power from the power supply, a converter for converting a voltage supplied from the power supply, An abnormality detection circuit that detects an abnormality such as a current, and a latch circuit that latches an abnormal state detected by the abnormality detection circuit, wherein when the abnormality detection circuit detects an abnormality, It has the function of reliably preventing repetition of connection / disconnection of the line switch.

【0012】本発明の請求項2に記載の発明は、請求項
1に記載のものであって、ラッチ回路をリセットするタ
イマー機能付きリセット回路と、リセット回数を限定す
る試行回数限定回路とを備えたことを特徴とするもので
あり、異常検出回路がノイズ等の誤動作により異常検出
した場合にラインスイッチを自動復帰させるという作用
を有する。
According to a second aspect of the present invention, there is provided the first aspect of the present invention, comprising a reset circuit having a timer function for resetting the latch circuit, and a trial number limiting circuit for limiting the number of resets. This has the function of automatically returning the line switch when the abnormality detection circuit detects an abnormality due to a malfunction such as noise.

【0013】以下に本発明の実施の形態を図1、図2を
用いて説明する。 (実施の形態1)図1は本発明の一実施の形態の電源装
置のブロック図、図2は動作説明図である。
An embodiment of the present invention will be described below with reference to FIGS. (Embodiment 1) FIG. 1 is a block diagram of a power supply device according to an embodiment of the present invention, and FIG. 2 is an operation explanatory diagram.

【0014】図1において、1はACアダプター、電池
等の電源、2は電源1の根元のラインスイッチ、3は電
源1からの電圧を個々のデバイスに対応した電圧に変換
するDC/DCコンバータ、4は過電圧、過電流の異常
を検出する検出回路、5は異常時に検出信号を受け、ラ
インスイッチ2の遮断をラッチするラッチ回路、6はリ
セット&タイマー回路、7は試行回数限定回路、8はC
PU、メモリー等のデバイスを備える処理回路である。
In FIG. 1, 1 is a power supply such as an AC adapter and a battery, 2 is a line switch at the root of the power supply 1, 3 is a DC / DC converter for converting a voltage from the power supply 1 to a voltage corresponding to each device, 4 is a detection circuit for detecting an overvoltage or overcurrent abnormality, 5 is a latch circuit for receiving a detection signal at the time of abnormality, and latching the cutoff of the line switch 2, 6 is a reset & timer circuit, 7 is a circuit for limiting the number of trials, 8 is C
This is a processing circuit including devices such as a PU and a memory.

【0015】図1において、例えばDC/DCコンバー
タ3の故障により、過電圧、過電流の異常が発生する
と、異常検出回路4が異常を検出しラッチ回路5に信号
を送り、ラッチ回路5はラインスイッチ2を遮断する。
ラインスイッチ2をラッチ回路5を介して遮断すること
によって、ラインスイッチ2の遮断後異常検出回路4が
瞬時正常電圧、電流を検出してもラインスイッチ2が再
度接続することはない。
In FIG. 1, when an overvoltage or overcurrent abnormality occurs due to, for example, a failure of the DC / DC converter 3, an abnormality detection circuit 4 detects the abnormality and sends a signal to a latch circuit 5, and the latch circuit 5 Block 2
By disconnecting the line switch 2 via the latch circuit 5, the line switch 2 is not connected again even if the abnormality detection circuit 4 detects the instantaneous normal voltage and current after the line switch 2 is disconnected.

【0016】したがって、従来のような、ラインスイッ
チ2の接続/遮断の繰り返しを解決することができる。
Therefore, it is possible to solve the conventional repeated connection / disconnection of the line switch 2.

【0017】ところで、異常検出回路4はノイズ等の一
時的な要因によって誤動作する場合があるので、ラッチ
回路5の付加だけでは不十分な場合がある。このため、
実施の形態のラッチ回路5にはリセット&タイマー回路
6、試行回数限定回路7が接続されている。
Since the malfunction detection circuit 4 may malfunction due to temporary factors such as noise, the addition of the latch circuit 5 may not be sufficient in some cases. For this reason,
A reset & timer circuit 6 and a trial number limiting circuit 7 are connected to the latch circuit 5 of the embodiment.

【0018】リセット&タイマー回路6と試行回数限定
回路7の動作を図2、図3によって説明する。図2は異
常原因がDC/DCコンバータ3等の故障による本質的
異常の場合の、図3は異常原因がノイズ等の一時的な異
常の場合のラインスイッチ2、異常検出回路4、ラッチ
回路5、リセット&タイマー回路6、試行回数限定回路
7の動作を説明する図である。
The operations of the reset & timer circuit 6 and the trial number limiting circuit 7 will be described with reference to FIGS. FIG. 2 shows a case where the cause of the abnormality is an essential abnormality due to a failure of the DC / DC converter 3 or the like, and FIG. 3 shows a case where the cause of the abnormality is a temporary abnormality such as noise, the line switch 2, the abnormality detection circuit 4, and the latch circuit 5. FIG. 4 is a diagram for explaining operations of a reset & timer circuit 6 and a trial number limiting circuit 7.

【0019】図2において、異常検出回路4が第1回目
の異常10を検出するとラッチ回路5は、ラインスイッ
チ2を遮断状態11とする。リセット&タイマー回路6
は第1回目の異常信号10の検出と同時に、例えばクロ
ックカウンターが動作して異常信号10からの経過時間
の計測を開始する。一定時間経過するとリセット&タイ
マー回路6が第1回目のリセット信号12をラッチ回路
5に送り、ラッチ回路5はラインスイッチ2を接続状態
13にする。以上の動作を試行回数限定回路7の設定回
数だけ繰り返すが、例えば設定回数を5回とすれば、5
回目以降はラインスイッチ2の遮断状態14が持続す
る。
In FIG. 2, when the abnormality detecting circuit 4 detects the first abnormality 10, the latch circuit 5 sets the line switch 2 to the cutoff state 11. Reset & timer circuit 6
At the same time as the first detection of the abnormal signal 10, for example, the clock counter operates to start measuring the elapsed time from the abnormal signal 10. After a certain period of time, the reset & timer circuit 6 sends the first reset signal 12 to the latch circuit 5, and the latch circuit 5 sets the line switch 2 to the connection state 13. The above operation is repeated as many times as the number of times set in the trial number limiting circuit 7.
After the third time, the cutoff state 14 of the line switch 2 is maintained.

【0020】図3の場合には、異常検出回路4が第1回
目の異常15を検出してから所定時間後に第1回目のリ
セット信号16を発信し、ラインスイッチ2は接続状態
17となる。リセット&タイマー回路6は、設定回数の
5回までラッチ回路5を遮断するようにリセット信号を
発信するが、ラッチ回路5はすでに遮断状態18なので
信号は無視され、電源スイッチ2は接続状態17を保持
し続ける。
In the case of FIG. 3, a first reset signal 16 is transmitted a predetermined time after the abnormality detection circuit 4 detects the first abnormality 15, and the line switch 2 is brought into the connection state 17. The reset & timer circuit 6 issues a reset signal so as to shut off the latch circuit 5 up to the set number of times 5, but since the latch circuit 5 is already in the cutoff state 18, the signal is ignored and the power switch 2 changes the connection state 17 to the connection state 17. Keep holding.

【0021】[0021]

【発明の効果】以上実施の形態で説明したように、本発
明によれば過電圧、過電流等の異常時には、異常が取り
除かれるまでラインスイッチは遮断されラインスイッチ
の接続/遮断の繰り返しを防止する。また、過電圧、過
電流以外の要因による一時的な異常検出に対しては、ラ
インスイッチは自動的に復帰する。
As described in the above embodiment, according to the present invention, when an abnormality such as an overvoltage or an overcurrent occurs, the line switch is cut off until the abnormality is removed, thereby preventing the line switch from being repeatedly connected / cut off. . In addition, the line switch automatically recovers from temporary abnormality detection due to factors other than overvoltage and overcurrent.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態の電源装置のブロック図FIG. 1 is a block diagram of a power supply device according to an embodiment of the present invention.

【図2】本発明の一実施の形態の電源装置の動作説明図FIG. 2 is an operation explanatory diagram of the power supply device according to the embodiment of the present invention;

【図3】本発明の一実施の形態の電源装置の動作説明図FIG. 3 is an operation explanatory diagram of the power supply device according to the embodiment of the present invention;

【図4】従来の安全回路のブロック図FIG. 4 is a block diagram of a conventional safety circuit.

【符号の説明】[Explanation of symbols]

1 電源装置 2 ラインスイッチ 3 DC/DCコンバータ 4 異常検出回路 5 ラッチ回路 6 リセット&タイマー回路 7 試行回数限定回路 8 処理回路 DESCRIPTION OF SYMBOLS 1 Power supply device 2 Line switch 3 DC / DC converter 4 Abnormality detection circuit 5 Latch circuit 6 Reset & timer circuit 7 Trial number limiting circuit 8 Processing circuit

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】電源と、電源からの電力の供給を遮断する
遮断回路と、電源から供給された電圧を変換する変換器
と、電圧、電流等の異常を検出する異常検出回路と、異
常検出回路が検出した異常状態をラッチするラッチ回路
とを備えたことを特徴とする電源装置。
1. A power supply, an interruption circuit for interrupting supply of electric power from the power supply, a converter for converting a voltage supplied from the power supply, an abnormality detection circuit for detecting an abnormality in voltage, current, and the like, and an abnormality detection And a latch circuit for latching an abnormal state detected by the circuit.
【請求項2】ラッチ回路をリセットするタイマー機能付
きリセット回路と、リセット回数を限定する試行回数限
定回路とを備えたことを特徴とする請求項1に記載の電
源装置。
2. The power supply device according to claim 1, further comprising a reset circuit having a timer function for resetting the latch circuit, and a trial number limiting circuit for limiting the number of resets.
JP33966697A 1997-12-10 1997-12-10 Power unit Pending JPH11178193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33966697A JPH11178193A (en) 1997-12-10 1997-12-10 Power unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33966697A JPH11178193A (en) 1997-12-10 1997-12-10 Power unit

Publications (1)

Publication Number Publication Date
JPH11178193A true JPH11178193A (en) 1999-07-02

Family

ID=18329665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33966697A Pending JPH11178193A (en) 1997-12-10 1997-12-10 Power unit

Country Status (1)

Country Link
JP (1) JPH11178193A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007209122A (en) * 2006-02-02 2007-08-16 Meidensha Corp Restart system of digital protective relay system
JP2008099452A (en) * 2006-10-12 2008-04-24 Matsushita Electric Ind Co Ltd Portable terminal device, abnormal operation detecting circuit, and power supply control method
JP2011081974A (en) * 2009-10-05 2011-04-21 Panasonic Electric Works Co Ltd Direct current breaker
US7978452B2 (en) 2007-09-26 2011-07-12 Lear Corporation Automotive overcurrent protection
JP2015195639A (en) * 2014-03-31 2015-11-05 サンケン電気株式会社 Switching power unit
JP2017523636A (en) * 2014-05-27 2017-08-17 ルノー エス.ア.エス. Field effect transistor and failure detection apparatus thereof
JP2020108245A (en) * 2018-12-27 2020-07-09 トヨタ自動車株式会社 Abnormality detection system and vehicle including the same, and abnormality detection method
CN113183779A (en) * 2021-04-22 2021-07-30 联合汽车电子有限公司 Vehicle-mounted charger and charging method thereof

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007209122A (en) * 2006-02-02 2007-08-16 Meidensha Corp Restart system of digital protective relay system
JP4534995B2 (en) * 2006-02-02 2010-09-01 株式会社明電舎 Restart method for digital protective relay
JP2008099452A (en) * 2006-10-12 2008-04-24 Matsushita Electric Ind Co Ltd Portable terminal device, abnormal operation detecting circuit, and power supply control method
US7978452B2 (en) 2007-09-26 2011-07-12 Lear Corporation Automotive overcurrent protection
JP2011081974A (en) * 2009-10-05 2011-04-21 Panasonic Electric Works Co Ltd Direct current breaker
JP2015195639A (en) * 2014-03-31 2015-11-05 サンケン電気株式会社 Switching power unit
JP2017523636A (en) * 2014-05-27 2017-08-17 ルノー エス.ア.エス. Field effect transistor and failure detection apparatus thereof
JP2020108245A (en) * 2018-12-27 2020-07-09 トヨタ自動車株式会社 Abnormality detection system and vehicle including the same, and abnormality detection method
CN111505368A (en) * 2018-12-27 2020-08-07 丰田自动车株式会社 Abnormality detection system, vehicle provided with the same, and abnormality detection method
CN113183779A (en) * 2021-04-22 2021-07-30 联合汽车电子有限公司 Vehicle-mounted charger and charging method thereof
CN113183779B (en) * 2021-04-22 2023-07-28 联合汽车电子有限公司 Vehicle-mounted charger and charging method thereof

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