JP2776644B2 - Power supply abnormality monitoring circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply abnormality monitoring circuit, and more particularly to a DC power supply monitoring circuit that outputs a DC voltage when an AC voltage is input.

[0002]

2. Description of the Related Art FIG.
Is shown in

[0003] An AC voltage is input to a rectifying / smoothing circuit 61 via an insulating transformer 60 and is converted into a DC voltage. This DC output is output from a fuse or breaker 62 with alarm contacts B and C.
The power is supplied to the DC power supply 64 via the short circuit 63. A desired stabilized DC voltage is generated by the DC power supply 64, and the control circuit 65 is operated by the DC voltage.

On the other hand, another rectifying and smoothing circuit 66 for rectifying and smoothing the AC voltage is provided, and an AC disconnection detecting circuit 67 is provided for monitoring the voltage of the rectified and smoothed output.

In this configuration, when a failure is detected in the DC power supply 64, the short circuit 63 is triggered in response to the failure detection, and the fuse or breaker 6 is triggered.
2 is blown or tripped. The alarm contacts B and C
By mechanically latching the state by
The output voltage drop due to the failure of the DC power supply 64 itself is detected at the terminal B,
C is to announce.

On the other hand, the interruption of the AC input voltage is performed by monitoring the output voltage of a separately provided rectifying / smoothing circuit 66 by an AC interruption detection circuit 67, and the abnormality is notified by terminals D and E. Is to be done.

Generally, failures of the DC power supply 64 include overvoltage, overcurrent, undervoltage, and the like. When such a condition occurs, the DC output voltage is turned off by a protection circuit built in the power supply itself. It is supposed to. However, in the conventional circuit shown in FIG. 6, if an attempt is made to operate the short circuit 63 in the case of an undervoltage, even when the power is turned on, a momentary interruption or a power failure is detected as a failure, the overvoltage or overcurrent state It is configured to detect only

[0008]

In the above-described conventional power supply abnormality monitoring circuit, even when the DC power supply 64 is cut off due to overvoltage or overcurrent and the control circuit 65 does not operate,
The DC abnormal signal must continue to be transmitted, and for this purpose, a mechanical latch is used by a fuse or a breaker 62.
Since it is triggered by a signal transmitted due to an abnormality of the output voltage or the output current located on the secondary side of the transformer, it is necessary to provide it on the secondary side of the insulating transformer 60. Therefore, the insulating transformer 60 is required, and there is a disadvantage that it is physically large, heavy, and expensive.

In addition, when the DC power supply 64 causes a decrease in output voltage due to factors other than overvoltage and overcurrent, it cannot be detected. Of course, if the undervoltage detection such as power-on, instantaneous interruption, or power failure is inhibited, the cause of the undervoltage failure can also be detected. However, there is a disadvantage that an inhibitor circuit for that purpose is further required.

The present invention has been made in order to solve the above-mentioned drawbacks of the prior art, and its object is to solve the problem of all DC power supplies (overvoltage, overcurrent, undervoltage, etc.) An object of the present invention is to provide a small and lightweight power supply monitoring circuit capable of detecting a disconnection of an input voltage.

[0011] the power source malfunction monitoring circuit of the present invention, an AC voltage
A power supply for monitoring abnormalities of the DC power supply that inputs and outputs DC voltage
A power supply abnormality monitoring circuit, comprising:
The voltage output from the current smoothing circuit is
AC error signal to notify this when the value falls below the specified value.
Signal and notify if it is greater than the specified value
An AC disconnection detection circuit for transmitting an AC normal signal;
The pressure level is constantly monitored.
A DC disconnection detection circuit for generating a C disconnection signal;
Output normal signal and DC disconnection of the DC disconnection detection circuit
Signal is input and a DC disconnection signal is generated while an AC normal signal is present.
And a DC abnormal latch circuit that generates a DC abnormal signal only when the error occurs .

[0012]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

[0014] In Figure, the DC power source 2 is intended for generating a DC voltage V _CC operates the input AC voltage, the control circuit 3 operates by the DC voltage V _CC, DC error signal and AC failure signal, etc. The various abnormal processing control is performed in response to the supply.

[0015] DC-off detection circuit 5 always monitors the voltage level of the DC voltage V _CC, for generating a DC disconnection signal a when the voltage level is equal to or less than a predetermined value.

The rectification smoothing circuit 4 is intended for rectifying smoothing this as input AC voltage, the rectified smoothed output is inputted to the AC interruption detecting circuit 6 via a voltage dividing resistor R _1.

The AC disconnection detecting circuit 6 has an input voltage V _1.
, The AC abnormal signal is generated between the terminals d and e when the voltage level is lower than a predetermined value, and the AC normal signal f is generated when the voltage level is higher than the predetermined value.

The DC abnormal latch circuit 7 receives the AC normal signal f and the DC disconnection signal a as inputs, and responds only when the DC disconnection signal a is generated during the existence period of the AC normal signal f, and thereafter, responds thereto. , A DC abnormal signal is generated between the terminals b and c.

FIG. 2 is a diagram showing a specific circuit example of the DC disconnection detection circuit 5, AC disconnection detection circuit 6, and DC abnormal latch circuit 7 of FIG.

The DC disconnection detecting circuit 5 includes a DC disconnection detecting section 51,
It comprises a delay circuit 52 and a photothyristor drive circuit 53.

The DC break detecting unit 51 monitors the voltage level of the DC voltage V _CC, the series drop across the resistor R ₄ to the a series circuit of a Zener diode Z _2, and the resistor R ₄ and the Zener diode Z ₂ PN with voltage as base input
And a P transistor Q _3.

The delay circuit 52 has an NPN transistor as input collector output Q _3, capacitor C ₁ and a resistor R ₅ and the delay time of only the time T ₀ corresponding to the time constant defined by. Zener diode Z _3, until increase of the terminal voltage of the capacitor C ₁ is a constant value, which an action to keep turning off the PNP transistor Q _5, the diode D ₁ is the capacitor C ₁ at the time of the direct current power source off It is for discharging electric charge.

The photothyristor drive circuit 53
NP transistor Q ₅ , two NPN transistors Q ₄
, Q ₆ , two diodes D ₂ and D ₃ , five resistors R ₆ , R ₇ , R ₈ , R ₁₄ and R ₁₅ , and a photodiode PD
Consisting of _1.

When the base current of the PNP transistor Q ₅ flows through the Zener diode Z ₃ , the NPN transistor Q ₅ becomes NPN.
Positive feedback is applied by the transistor Q ₆ , and the resistors R ₆ , R
Through ₇ and diode D _2, so that flow collector current of the NPN transistor Q _3. Then, this current is the is detected DC disconnection transistor Q ₃ is turned off, is the base input of NPN transistor Q ₄ via the diode D _3, the Fotosairita PSCR ₁ that has been inserted into the collector of the transistor Q ₄ Images driving the diode PD _1.

The resistor R ₈ is connected to the NPN transistor Q ₄
Is the collector resistance. The diode D ₂ is a diode for preventing a current from flowing from the delay circuit 52 as a base current of the NPN transistor Q ₄ .

The AC disconnection detection circuit 6 includes PNP transistors Q ₁ and Q ₂ which operate differentially and whose emitter is shared by an emitter resistor R ₃ , and a resistor R ₁₇ which is a collector load resistor.
And the bias resistance RV ₁ of the PNP transistor Q ₂ ,
A resistor R ₂ , which is both a bias circuit for the PNP transistor Q ₁ and a reference level generating circuit, and a Zener diode Z
And a level comparison circuit consisting of ₁ . And PNP
The collector output of the transistor Q ₂ is the photo coupler PC ₁
Is output as an AC abnormality signal between the terminals d and e.

Further, AC normal signal f is a reverse phase signal by the PNP transistor Q ₁ is derived by the resistor R _17,
It is input to the DC abnormality latch circuit 7.

[0028] including the DC abnormal latch circuit 7 and the NPN transistor Q _7, a photo thyristor PSCR ₁ which is connected to the collector, a photocoupler PC _2, and a resistor R _9. DC disconnection signal a is latched by photothyristor PSCR _1, the latch output photocoupler PC ₂
Is output between the terminals b and c as a DC abnormal signal.

The resistors R ₁₃ , R ₁₄ , R ₁₇ and R ₁₅ are NPN
It is assumed that the transistors Q ₃ , Q ₄ , Q ₇ and the PNP transistor Q ₅ are erroneously turned on by the leakage current of the Zener diode Z ₂ , the PNP transistor Q ₅ , the PNP transistor Q ₁ , the Zener diode Z ₃ and the NPN transistor Q ₃ , respectively. This is a bypass resistor for prevention. The capacitor C _2, the resistor R ₁₈ is intended to prevent photothyristor PSCR ₁ is to false firing.

Next, the operation of the embodiment of the present invention will be described with reference to the operation time charts shown in FIGS.

FIG. 3 is a time chart when an AC voltage is applied. AC when the voltage is turned at time t _0, rises as the rectifying smoothing circuit 4 begins to charge, thus also the input voltage V ₁ of the by resistor R ₁ to the AC interruption detecting circuit 6 obtained by dividing 3 Start.

[0032] and photo input voltage V _I is coupler PC ₁
Of the photodiode forward voltage V _PD1 and the collector-emitter voltage V _CE2 of the PNP transistor Q ₂ (V _PD1
+ And V _CE2), between time t ₁ which is between the sum of the Zener diode Z ₁ of the Zener voltage VZ ₁ and the base-emitter voltage V _BE1 of the PNP transistor _{Q 1 (V Z1 + V BE1} ) of t ₂ is PNP transistor Q ₂ of the AC interruption detecting circuit 6 is turned on. Accordingly, the photocoupler PC ₁ also turned on, AC abnormality signal is output terminals d, e. From

However, after V _CC rises between the sum (V _Z2 + V _BE3 ) of the Zener voltage V _Z2 of the Zener diode Z ₂ and the base-emitter voltage V _BE3 of the NPN transistor Q ₃ , it takes a further predetermined time ( The control circuit 3 starts operating in response to the power-on reset signal released after about 50 ms (typically, about 50 ms), so that the AC abnormality signal is ignored. Therefore, there is no need to inhibit the transmission of the AC abnormal signal when the AC power is turned on.

Next, at time t ₂ , the specified value (V _Z1 +
V _BE1 ), the PNP transistor Q ₂ turns off,
PNP transistor Q ₁ is turned on, thus the NPN transistor is Q ₇ is turned on, photothyristor PSCR ₁ at this time because it has turned off, the photocoupler PC ₂ also turned off, DC abnormality signal is not transmitted. Then V
_{When CC} reaches the specified value (V _Z2 + V _BE3 ) at time t ₃ , D
NPN transistor Q ₃ of the C-off detection circuit 51, the base current resistor R _4, to flow through the Zener diode Z _2, are turned on.

[0035] From this point, a constant C ₁ · R ₅ when the capacitor C ₁ of the delay circuit 52, a voltage value obtained by subtracting the collector-emitter voltage V _CE3 of NPN transistor Q ₃ from V _CC (V _CC -V _CE3) Start charging with the aim of. Then, at time t ₄ , the voltage V _C1 across the capacitor C ₁ is obtained.
Are the Zener voltage V _Z3 of the Zener diode Z ₃ and P
It is clamped to the sum (V _Z3 + V _BE5 ) of the base-emitter voltage V _BE5 of the NP transistor Q ₅ , and immediately after that, the PN
Since P transistor Q ₅ is that the base current flows through the Zener diode Z _3, resistor R _5, turned on.

The part of the collector current of the PNP transistor Q ₅ flows as the base current of the NPN transistor Q _6, NPN transistor Q ₆ is also turned on. By turning on the NPN transistor Q _6, the PNP transistor Q ₅ positive feedback the collector current of the PNP transistor Q ₅ is through a resistor R _6, R ₇ and diode D ₂ NP
Flowing to the N transistor Q _3.

Here, the delay time T ₀ of the delay circuit 52 will be described. At time t ₃ , NPN transistor Q
₃ may have a non-saturation, since in this case can not be turned off completely NPN transistor Q _4, the PNP transistor Q _5, NPN transistor Q ₆ is driven in this state, the collector current diode D _3, NPN will flow through the base of the transistor Q _4, as a result the NPN transistor Q ₄ is turned on, the photothyristor PSCR ₁ drive, sometimes DC error signal b, c from being erroneously transmitted. To prevent this, the delay time T ₀ is set so that the PNP transistor Q ₅ is driven after the NPN transistor Q ₃ is completely saturated (that is, the NPN transistor Q ₄ is completely turned off). It is giving.

[0038] Next, as shown in FIG. 4, V _CC is the cross-sectional malfunction of the DC power supply 2, the specified value at time _{t 5 (V Z2 + V BE3} )
When a falls below, and NPN transistor Q ₃ is turned off DC interruption detection unit 51, the collector current of the PNP transistor Q ₅ flows through the base of the diode D _3, the NPN transistor Q _4, as a result the NPN transistor Q ₄ is turned on photo thyristor PSCR ₁ is drives have been. At this time, since the input voltage V ₁ is equal to or more than the specified value (V _Z1 + V _BE1 ) and the PNP transistor Q ₁ and the NPN transistor Q ₇ are on, the photo thyristor PSCR
Photocoupler PC ₂ is turned on, and the DC abnormality signal is sent from the terminal b, c by ₁ on.

Thereafter, even if the failure of the DC power supply 2 recovers and exceeds the specified value (V _Z2 + V _BE3 ) at time t ₇ , as long as the input voltage V ₁ is equal to or higher than the specified value (V _Z1 + V _BE1 ), the DC abnormality occurs. The latch circuit 7 operates, and the DC abnormal signal continues to be transmitted.
Therefore, including this case, the failed DC power supply can be specified.

Next, as shown in FIG. 5, although the DC power source 2 is normal, the AC voltage is cross at time t ₉ by an instantaneous interruption or power failure, the rectification smoothing circuit 4 starts to discharge, the input voltage V _I also start to descend. And the input voltage V _I is V _Z1
T ₁₁ from + V _BE1 and V _PO1 + V time t _10, which is between the _CE2
Between it is to PNP transistor Q ₂ is on AC interruption detecting circuit 6, hence AC abnormal signal to be turned on the photo-coupler PC ₁ is sent from the terminal d, e.

Generally, the DC power supply 2 is turned on for a certain time (usually 10
The control circuit 3 can operate during that time, and can recognize this AC abnormality signal and notify the host device or operate and hold the latching relay. .

[0042] Thereafter, gone short break strength of the DC power supply 2 lowered the output voltage V _CC, the specified value at time t ₁₂ (V
_Z2 + V _BE3 ), the DC disconnection detection circuit 51 _returns to N
PN transistor Q ₃ is turned off, PNP transistor Q
₅ of the collector current flows through the base of the NPN transistor Q _4, but will drive the photothyristor PSCR ₁ NPN transistor Q ₄ is turned on, the input voltage V _I at this time already specified value (V _Z1 + V _BE1) is below the, since the PNP transistor Q ₁ and NPN transistor Q ₇ is turned off, the photocoupler PC ₂ will remain off, will not be DC abnormal signal is sent out.

That is, the DC abnormal signal between the terminals b and c is obtained only when the AC is normal without the AC abnormal signal between the terminals d and e (the PNP transistor Q1 and the NPN transistor Q).
7 only when the power is on), it can be generated at the time of power failure or momentary interruption of AC voltage,
Since no C abnormal signal is generated, there is no need for an inhibit as in the prior art.

[0044]

As described above, according to the present invention,
When the power is turned on, the transmission of the DC abnormal signal is inhibited for a certain period of time after the DC power is turned on. In the case of an instantaneous interruption or power failure, the transmission of the DC abnormal signal is inhibited by the AC disconnection detection circuit and the AC abnormal signal is output. Since the transmission is configured, direct monitoring of the output voltage of the DC power supply can detect a failure of the DC power supply, and therefore, all failures of the DC power supply (overvoltage, overcurrent, undervoltage, etc.)
There is an effect that the AC input voltage interruption (momentary interruption, power failure, etc.) can be detected separately.

Further, according to the present invention, there is an effect that it can be constituted only by electronic components, and can be made small, light and inexpensive.

[Brief description of the drawings]

FIG. 1 is a system block diagram of an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific example of a part of the block in FIG. 1;

FIG. 3 is an operation time chart when an AC voltage is applied.

FIG. 4 is an operation time chart when a DC abnormal signal is transmitted.

FIG. 5 is an operation time chart when an AC abnormal signal is transmitted.

FIG. 6 is a block diagram of a conventional power supply monitoring circuit.

[Explanation of symbols]

 2 DC power supply 4 Rectification smoothing circuit 5 DC disconnection detection circuit 6 AC disconnection detection circuit 7 DC abnormal latch circuit

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G06F 1/28 H02H 3/08-3/253 H02H 7/00 H02H 7/10-7/20

Claims (1)

(57) [Claims] An AC voltage is input and a DC voltage is output.
A power supply abnormality monitoring circuit that monitors an abnormality of a power supply, wherein the power supply abnormality monitoring circuit outputs an output from a rectifying and smoothing circuit that receives the AC voltage as an input.
If the voltage falls below a preset value,
And send an AC abnormal signal to notify this.
A that sends an AC normal signal to notify this
C disconnection detection circuit and constantly monitor the level of the DC voltage
And a DC that generates a DC disconnection signal when the value falls below a predetermined value.
Disconnection detection circuit, an AC normal signal of the AC disconnection detection circuit, and the DC disconnection detection circuit.
Input the DC disconnection signal of the road and DC disconnection while the AC normal signal exists.
A power supply abnormality monitoring circuit, comprising: a DC abnormality latch circuit that generates a DC abnormality signal only when a signal is generated .