JPH04145537A - Information processor - Google Patents

Abstract

PURPOSE:To eliminate the need of the modification of software in corresponding to a change in hardware even at the time of performing an exceptional process which largely depends upon the hardware by providing a ROM vector table and bank switching means. CONSTITUTION:When an exceptional process becomes necessary, a bank switching means 4 switches the bank address from a RAM 2 which is usually selected to a ROM 3 only when the exceptional process is caused by hardware. A CPU 1 executes a ROM exceptional processing routine 32 by referring to a ROM vector table 31 and analyzes and removes the cause of the exceptional process which largely depends upon the hardware. Then the bank switching means 4 automatically switches the bank address from the ROM 3 to the RAM 2. Therefore, even when the produced exceptional process largely depends upon the hardware, it is not necessary to modify the software in corresponding to the change in the hardware.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an information processing device, and particularly to an information processing device that performs exception processing such as system error processing and task error processing, even if hardware is changed. The present invention relates to an information processing apparatus that does not require modification of an exception handling section of an operating system in response to changes in hardware.

[Conventional technology]

Conventionally, in information processing devices, the operating system (hereinafter referred to as O8) uses a random access memory (hereinafter referred to as RA), which is a read/write storage unit, for functions that perform exception handling such as system error handling and task error handling.
(abbreviated as M).

[Problem to be solved by the invention]

In the conventional information processing device described above, the O8 must remove the error factor that caused the exception handling and perform subsequent recovery processing, but in the case of an error factor related to hardware, Since the change changes the processing method, there is a problem in that the exception handling section of O8 must also be changed due to the hardware change.

An object of the present invention is to provide an information processing device that does not require modification of software in response to changes in hardware, even if the exception that occurs is exception handling that is highly dependent on hardware. be.

[Means for Solving the Problems] An information processing device of the present invention includes a readable/writable storage unit and a nonvolatile storage unit, in which: (A) the normal bank address includes the readable/writable storage unit; (B) bank switching means for automatically switching a bank address from the read/write storage section to the nonvolatile storage section according to the type of exception when an exception occurs, the nonvolatile storage section; (C) A non-volatile storage vector table means having a table indicating the start address of the non-volatile storage; non-volatile storage exception processing routine means for notifying software of the occurrence of an exception by causing the software to receive an exception; , is equipped with.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

The information processing device shown in FIG.
PU (abbreviated as PU) 1, RAM 2 connected to the CPU via bus 5, non-volatile memory section (hereinafter abbreviated as ROM) 3 allocated to the same address as RAM 2, RAM 2 selected as the bank address during normal operation. , bank switching means 4 which automatically switches the bank address from the RAM 2 to the ROM 3 according to the type of exception when an exception occurs.

The ROM 3 also includes a ROM vector table means 31 having a table indicating the start address of exception processing, which is called when an exception occurs, analyzes the cause of the exception, removes the cause, and performs processing according to the type of the cause. It consists of a ROM exception handling routine means 32 that notifies software of the occurrence of an exception by generating a trap.

The RAM 2 also includes a RAM vector table means 21 containing a table indicating the start address of exception handling.

Next, the operation will be explained.

In FIG. 1, there is a RAM vector table 21 in RAM2, and in ROMS: L! There is a ROM vector table 31. When an exception occurs, the bank switching means 4 handles the exception depending on whether the exception is caused by a hardware factor or a software factor.
Only in the case of hardware factors, the bank address normally selected for RAM2 is switched from RAM2 to ROM3. CPUI is RAM vector table 21
Or already switched ROM vector table 3
1, extract the exception vector therein, and move the exception to exception handling. RAM vector table 21. ROM
The vector table 31 stores the start address of exception processing.

When the CPUI refers to the RAM vector table 21, it is the same as the conventional technology.

When the CPU refers to the ROM vector table 31, the ROM exception handling routine 32 is executed, analyzes and removes the cause of the exception that is largely dependent on the hardware, and generates a trap depending on the type of the exception cause. This ends the exception handling. Immediately after this trap occurs, the bank switching means 4 changes the bank address to the ROM.
3 to RAM2 automatically.

Note that a mask read-only memory or a programmable read-only memory can be used as the nonvolatile storage unit in the above description.

〔Effect of the invention〕

As explained above, the present invention provides a ROM vector table and bank switching means in addition to the conventional RAM vector table, so that the generated exception can be treated as an exception that is largely dependent on the hardware. This also has the advantage that there is no need to modify the software in response to changes in hardware.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention. 1...Central processing unit (CPU), 2...
- Readable/writable memory (RAM), 3... Non-volatile memory (ROM), 4... Bank switching means, 5... Bus, 21... -RAM vector table, 31...ROM vector table, 32...ROM exception handling routine. Agent Patent Attorney Susumu Uchihara

Claims (1)

[Scope of Claims] 1. In an information processing device including a readable/writable storage unit and a nonvolatile storage unit, (A) the read/write storage unit is selected as the bank address in normal times, and the type of exception is selected when an exception occurs; bank switching means for automatically switching a bank address from the read/write storage section to the nonvolatile storage section in accordance with the above, wherein the nonvolatile storage section includes: (C) Called when an exception occurs, analyzes the cause of the exception, removes the cause, and generates a trap depending on the type of the cause, thereby preventing the occurrence of an exception in the software. non-volatile storage exception handling routine means for transmitting the following: (D) readable/writable storage vector table means having a table indicating a start address of exception handling; Information processing device. 2. The information processing apparatus according to claim 1, wherein the nonvolatile storage section is a mask read only memory. 3. The information processing apparatus according to claim 1, wherein the nonvolatile storage section is a programmable read-only memory.