JPH04140874A - Interruption receiving system - Google Patents

Abstract

PURPOSE:To efficiently accept an interruption by providing the first means which permits the interruption, the second means which temporarily holds the plural interruption causes, and the third means which transmits the plural interruption causes to a controller by a preliminarily decided unit. CONSTITUTION:A command controller 102 transmits an interruption transmission permitting signal 1 to a device 200 to be controlled at the time of accepting the interruption. The (1) and (2) of an interruption cause holding flag group 201 are received through a selector 203 by an interruption receiving buffer 101 in a timing in which the interruption transmission permitting signal 1 is outputted, and at the same time a flag reset circuit 205 resets the (1) and (2) of the group 201 corresponding to the transmitted interruption causes. A transmitted flag selected counter 202 counts up from 0 to 1 at the time of receiving 1, the (3) and (4) of the group 201 are transmitted and received by the interruption receiving buffer 101, and at the same time the flat reset circuit 205 resets the (3) and (4) of the group 201 corresponding to the transmitted interruption causes.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interrupt reception method for a control device, and more particularly to an interrupt reception method in which a control device receives a request for the next execution instruction from a controlled device.

[Conventional technology]

Conventionally, in this type of interrupt reception method, when a control device receives an interrupt from a controlled device, it is necessary to determine the priority of the interrupt factor from the controlled device and to reset the interrupt factor.

[Problem to be solved by the invention]

The above-mentioned conventional interrupt reception method has the disadvantage that it requires a circuit for prioritizing interrupt factors from a controlled device and an increase in the amount of hardware needed to reset the interrupt factors.

[Means to solve the problem]

The interrupt reception method of the present invention includes, in the interrupt reception method in which a control device receives a request for the next execution command from a controlled device, a first means for allowing an interrupt to the control device or the controlled device; a second means for temporarily holding a plurality of interrupt factors in a controlled device; and a unit for predetermining the plurality of interrupt factors held by the second means when an interrupt is permitted by the first means. and third means for sending the information to the control device.

The third means includes a sending flag selection counter that starts the 1st to 7th call when the interrupt is permitted by the first means and returns to the initial value when the count value reaches a predetermined value; and a selector that sends the plurality of interrupt factors held by the second means to the control device in the predetermined unit in accordance with the count value of the flag selection counter. .

Further, the interrupt reception method of the present invention may include an interrupt reception buffer that receives the plurality of interrupt causes sent by the third means and presents them to the first means.

〔Example〕

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention in which there are eight interrupt factors on the control device side.

In FIG. 1, ], OO is a control device, 200 is a controlled device, 101 is an interrupt reception buffer, 102 is an instruction control device, 201 is a group of interrupt cause holding flags, 202 is a sending flag selection counter, and 203 is a selector. , 204 is a control circuit, 205 is a flag reset circuit, signal line 1 is an interrupt sending permission signal, signal line 2 is an interrupt sending signal, and signal line 3 is an execution command.

The control device 100 has a controlled device 200 connected thereunder.
This is a device that operates the controlled device 200 by giving execution instructions to the device. The interrupt reception buffer 101 is connected to the controlled device 200
This is for receiving the interrupt sending signal 2 sent from the instruction controller 1102 and displaying the contents of the received interrupt factor flag to the instruction control device 1102. The instruction control device 102 is composed of an interrupt processing circuit and an instruction processing circuit, and controls the controlled device 200 to permit sending an interrupt, and decodes the contents of the interrupt factor flag to send the next execution instruction to the controlled device. 200 is controlled. Controlled device 20
0 is a device that operates according to the execution command from the control device 11fl 00, and eight interrupt factors occur, and the rate of occurrence of these interrupt factors is the same as that of the instruction control device 102.
This is a sufficiently small number of devices for processing. The interrupt factor holding flag group 201 is generated from the control circuit 204 and r, -
11J is a flag group for holding an interrupt factor until it is sent to the control device 100, and is a flip-flop that is set when an interrupt factor occurs and reset when it is sent to the control device 100. The send flag selection counter 202 is a counter that amplifies from 0 to 3, and when it reaches 3, it goes to 0. When the interrupt permission signal 1 comes, it counts up from 0, and when it reaches 0 again, it starts the next one. It remains at 0 until the interrupt enable signal 1 arrives. The selector 203 selects an interrupt cause holding flag to be sent to the control unit W100 from the interrupt cause holding flag group 201 according to the value of the sending flag selection counter 202. The control circuits 20 and 4 are the command control device 102
This circuit executes execution instructions, and is composed of multiple control circuits and generates eight interrupt factors. The flag reset circuit 205 is a circuit that resets the interrupt factor holding flag group 201 when the interrupt factor held in the interrupt factor holding flag group 201 is sent to the control device 00.

First, the instruction control device 102 provides the execution instruction 3 to the control circuit 204. The control circuit 204 executes the instructions,
When an interrupt factor occurs, interrupt factor retention flag group 2
Set a flag according to the factor of 01. Since it takes time for the interrupt factor holding flag group 201 to be sent to the control device 100, there is a possibility that up to eight interrupt factor holding flags 201 are set. Next, when the instruction control device 102 receives an interrupt from the controlled device 200, the instruction control device 102 transmits the interrupt sending permission signal 1 to the controlled device 200.
Send to 00. Since the sending flag selection counter 202 remains stopped at 0, at the timing when the instruction control device 102 outputs the interrupt sending permission signal 1, the selector 203 sends ■ and ■ of the interrupt cause holding flag group 201 to the interrupt receiving buffer 10. At the same time that the received interrupt factor is received, the flag reset circuit 205 resets ■ and ■ of the interrupt factor holding flag group 201 corresponding to the transmitted interrupt factor. When the sending flag selection counter 202 reaches 1, it changes from O to 1.
Click (up) and select interrupt factor retention flag group 2.
■ and ■ of 01 are sent and received by the interrupt reception buffer 101, and at the same time, the Fuji reset circuit 205 sets the interrupt factor holding flag group 2 corresponding to the sent interrupt factor.
Reset ■ and ■ in 01. Similarly, the sending flag selection counter 202 counts up from 1 to 2.
and ■ are received by the interrupt reception buffer 101. The interrupt reception buffer 101 stores the consecutively received interrupt cause holding flags 201 -■, ■-■, ■-■, ■.
- Show ■ to the command control device 102. Command control device 10
2 analyzes the interrupt cause and provides the next execution instruction 3 to the controlled device 200.

FIG. 2 shows the value of the sending flag selection counter 202 and the interrupt factor holding flag group 20 sent to the control device 100.
It shows the relationship with 1.

FIG. 3 is a time chart showing the timing at which the interrupt sending permission signal 1, the value of the sending flag selection counter 202, and the interrupt receiving buffer ]01 receive the interrupt cause holding flags 201 from ■ to ■.

〔Effect of the invention〕

As described above, according to the present invention, an interrupt factor can be received without requiring priority determination of the interrupt factor by transmitting an interrupt factor sending permission signal when the control device is capable of processing the interrupt factor.

Furthermore, since there is no need for a signal to reset the interrupt factor, the amount of hardware can be reduced. Furthermore, by connecting a plurality of controlled devices under the control device and outputting interrupt sending permission signals at a timely manner, it is possible to efficiently receive interrupts from the controlled devices.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing the relationship between the value of the sending flag selection counter 202 in FIG. 1 and the interrupt factor holding flag group 201 sent to the control device 100. , FIG. 3 is a time chart showing the interrupt sending permission signal 1 shown in FIG. 100 Control device, 101 Interrupt reception buffer, 102 Instruction control device, 200 Controlled device,
201... Interrupt factor holding flag group, 202 Sending flag selection counter, 203... Selector, 204... Control circuit, 205 - Flag reset circuit.

Claims (1)

[Scope of Claims] 1. In an interrupt reception method in which a control device receives a request for the next execution command from a controlled device, the control device includes first means for allowing the controlled device to interrupt; a second means for temporarily holding a plurality of interrupt factors in a controlled device; and a unit for predetermining the plurality of interrupt factors held by the second means when an interrupt is permitted by the first means. a third signal sent to the control device at
An interrupt reception method characterized by comprising: means. 2. The third means includes a sending flag selection counter that starts counting up when an interrupt is permitted by the first means and returns to an initial value when the count value reaches a predetermined value; and a selector for sending the plurality of interrupt factors held by the second means to the control device in the predetermined unit in accordance with the count value of the interrupt control device according to claim 1. Reception method. 3. The interrupt receiving system according to claim 1, further comprising an interrupt receiving buffer that receives the plurality of interrupt causes sent by the third means and displays them to the first means.