JPH04139893A - Heating chip and mounting by using the same - Google Patents

Heating chip and mounting by using the same

Info

Publication number
JPH04139893A
JPH04139893A JP26336490A JP26336490A JPH04139893A JP H04139893 A JPH04139893 A JP H04139893A JP 26336490 A JP26336490 A JP 26336490A JP 26336490 A JP26336490 A JP 26336490A JP H04139893 A JPH04139893 A JP H04139893A
Authority
JP
Japan
Prior art keywords
chip
heating
chips
heating chip
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26336490A
Other languages
Japanese (ja)
Other versions
JP2519829B2 (en
Inventor
Takaaki Kamiyoshi
神吉 孝明
Hitoshi Kataoka
仁 片岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2263364A priority Critical patent/JP2519829B2/en
Publication of JPH04139893A publication Critical patent/JPH04139893A/en
Application granted granted Critical
Publication of JP2519829B2 publication Critical patent/JP2519829B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To improve throughput, accuracy and an yield of tucking operation by holding adjustably a difference between reference surfaces of a heating chip according to mounting references. CONSTITUTION:Eight chips 1 are arranged around an LSI and tips thereof are in close contact with the edges of the LSI. Here, reference faces to the thickness and width directions of a heating chip are made to constitute A and B, and as to size accuracy of (a) and (b) in Fig., the reference faces of the chip 1 A and B and a reference at the time of mounting the chip 1 are combined to facilitate to ensure accuracy. Then, the ceramic chip 1 is held by a rail part of an LM(linear motion) guide 3 by means of a mounting frame 2, eight pieces of chips 1 are made movable in parallel vertically about 5mm so as to adjust a pressure amount at the time of tucking by a spring 4. Thereby, throughput, accuracy and an yield of tucking can be heightened.

Description

【発明の詳細な説明】 〔概要〕 加熱チップと半導体装置を基板にタッキング(tack
ing、仮ハンダ付け)する方法に関し。
[Detailed Description of the Invention] [Summary] Tacking a heating chip and a semiconductor device onto a substrate
ing, temporary soldering).

加熱チップの交換頻度を少なくシ、かつ高スループツト
、高精度、高歩留のタッキング方法を提供することを目
的とし。
The purpose of the present invention is to provide a tacking method that reduces the frequency of replacing heating chips, and has high throughput, high precision, and high yield.

1)半導体装置の端子に当接して加熱し、該端子を基板
にハンダ付けする加熱チップであって、構成面の少なく
とも1面を基準面とする複数の加熱チップと、該加熱チ
ップの該基準面間の距離を該加熱チップの取り付け基準
に合わせて調節できる該加熱チップの保持具を有するよ
うに個性する。
1) A plurality of heating chips that contact and heat terminals of a semiconductor device and solder the terminals to a substrate, the heating chips having at least one of their constituent surfaces as a reference surface, and the reference of the heating chips. The heating chip has a holder that allows the distance between the surfaces to be adjusted according to the mounting standard of the heating chip.

2)前記加熱チップが半導体装置の4辺の各辺にそれぞ
れ2本ずつ配置されるように構成する。
2) Two heating chips are arranged on each of the four sides of the semiconductor device.

3)前記加熱チップがセラミックチップであるように構
成する。
3) The heating chip is configured to be a ceramic chip.

4)半導体装置の端子に加熱チップを当接して該加熱チ
ップを加熱し、該端子の予備ハンダを溶かして該半導体
装置を基板にタッキングする際、該加熱チップを構成す
る少なくとも1面を基準面とし、該チップの該基準面間
の距離を該加熱チップの取り付け基準に合わせて調節す
るように構成する。
4) When a heating chip is brought into contact with a terminal of a semiconductor device to heat the heating chip, melt the preliminary solder of the terminal, and tack the semiconductor device to a substrate, at least one surface constituting the heating chip is set as a reference surface. and the distance between the reference surfaces of the chips is adjusted in accordance with the mounting standard of the heating chip.

〔産業上の利用分野〕[Industrial application field]

本発明は加熱チップと半導体装置の実装方法。 The present invention relates to a method for mounting a heating chip and a semiconductor device.

特に半導体装置を基板にタッキングする方法に関する。In particular, the present invention relates to a method of tacking a semiconductor device to a substrate.

〔従来の技術〕[Conventional technology]

LSI等の半導体装置を基板にタッキングする場合、 
LSI端子に加熱チップ(熱源)を直接当てて加熱チッ
プを加熱し、端子の予備ハンダを溶かしてタッキングを
行っていた。
When tacking a semiconductor device such as an LSI to a substrate,
Tacking was performed by directly applying a heating chip (heat source) to an LSI terminal, heating the chip, and melting the preliminary solder on the terminal.

また、従来の加熱チップは銅板の中にヒータを付けたも
のを使用していた。
Furthermore, conventional heating chips used a copper plate with a heater attached inside it.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来例では下記のような問題があった。 The conventional example had the following problems.

■ チップを高温に加熱するため熱膨張によりチップ形
状の幅が広くなり、実装密度の高い基板ではLSI端子
を複数同時にタッキングできず、単体チップを次々と移
動しなければなちず、従ってチップの移動時間が必要と
なりタッキングに時間がかかることになる。
■ Since the chip is heated to a high temperature, the width of the chip shape becomes wider due to thermal expansion, and on a board with a high packaging density, it is not possible to tack multiple LSI terminals at the same time, and single chips must be moved one after another. This requires time and tacking takes time.

■ チップ先端の精度の確保が困難で、かつチップに基
準面がないため、タッキング精度の確保が困難で、実装
歩留が悪い。
■ It is difficult to ensure accuracy at the tip of the chip, and since there is no reference surface on the chip, it is difficult to ensure tacking accuracy, and the mounting yield is poor.

■ チップの瞬時加熱ができないため、タッキングに時
間がかかる。
■ Tacking takes time because the chips cannot be heated instantly.

■ チップの劣化が激しく寿命が短いため、頻繁にチッ
プを交換しなければならない。
■ Chips deteriorate rapidly and have a short lifespan, so they must be replaced frequently.

本発明は加熱チップの交換頻度を少なくシ、かつ高スル
ーブツト高精度、高歩留のタッキング方法を提供するこ
とを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a tacking method that reduces the frequency of replacement of heating chips and has high throughput, high precision, and high yield.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題の解決は。 What is the solution to the above problem?

1)半導体装置の端子に当接して加熱し、該端子を基板
にハンダ付けする加熱チップであって 構成面の少なく
とも1面を基準面とする複数の加熱チップと、該加熱チ
ップの該基準面間の距離を該加熱チップの取り付け基準
に合わせて調節できる該加熱チップの保持具を有する加
熱チップ、あるいは 2)前記加熱チップが半導体装置の4辺の各辺にそれぞ
れ2本ずつ配置される前記l)記載の加熱チップ、ある
いは 3)前記加熱チップがセラミックチップであることを特
徴とする前記l)または2)記載の加熱チップ、あるい
は 4)半導体装置の端子に加熱チップを当接して該加熱チ
ップを加熱し、該端子の予備ハンダを溶かして該半導体
装置を基板にタッキングする際、該加熱チップを構成す
る少なくとも1面を基準面とし、該チップの該基準面間
の距離を該加熱チップの取り付け基準に合わせて調節す
る実装方法により達成される。
1) A heating chip that comes into contact with a terminal of a semiconductor device to heat it and solder the terminal to a substrate, the heating chip having at least one of its constituent surfaces as a reference surface, and the reference surface of the heating chip. 2) a heating chip having a holder for the heating chip whose distance between the heating chips can be adjusted according to the mounting standard of the heating chip; or 2) a heating chip in which two heating chips are arranged on each of the four sides of the semiconductor device. 1) The heating chip as described above, or 3) The heating chip as described in 1) or 2) above, wherein the heating chip is a ceramic chip, or 4) The heating chip is brought into contact with a terminal of a semiconductor device to heat the semiconductor device. When heating the chip to melt the preliminary solder of the terminal and tacking the semiconductor device to the substrate, at least one surface constituting the heating chip is used as a reference surface, and the distance between the reference surfaces of the chip is determined as the heating chip. This is achieved through a mounting method that adjusts to the mounting standards of the industry.

〔作用〕[Effect]

本発明は加熱チップにセラミックチップを使用し、形状
を小振りにし、かつ加熱チップを構成する少なくとも1
面を基準面にして加熱チップの位置精度が確保できるよ
うにしたものである。
The present invention uses a ceramic chip as a heating chip, has a small shape, and has at least one ceramic chip constituting the heating chip.
The positional accuracy of the heating chip can be ensured by using the surface as a reference surface.

第1図(al、 (b)は本発明の原理図で加熱チップ
(セラミックチップ)の配置図である。
FIGS. 1A and 1B are diagrams of the principle of the present invention, and are layout diagrams of heating chips (ceramic chips).

図において、8本のチップlがLSIの周囲に配置され
、その先端はLSI端子に当接している。
In the figure, eight chips 1 are arranged around the LSI, and their tips are in contact with the LSI terminals.

ここで、加熱チップの厚さ方向に対する基準面をA、加
熱チップの幅方向に対する基準面をBとしている。
Here, A is the reference plane in the thickness direction of the heating chip, and B is the reference plane in the width direction of the heating chip.

図中、aの寸法精度はチップの基準面へとチップの取り
付け時の基準を合わせ、また、bの寸法精度はチップの
基準面Bとチップの取り付け時の基準を合わせることに
より、精度確保を容易にしている。
In the figure, the dimensional accuracy of a is ensured by aligning the reference surface of the chip with the standard when attaching the chip, and the dimensional accuracy of b is ensured by aligning the reference surface B of the chip with the reference point when attaching the chip. It's easy.

また チップにセラミックチップを使用することにより
瞬時加熱(4006C/秒)が可能となり、タッキング
時間が短縮されるとともに、チップの寿命が大幅に延び
た。
Furthermore, by using a ceramic chip for the chip, instantaneous heating (4006 C/sec) is possible, shortening the tacking time and significantly extending the life of the chip.

従来の加熱チップの昇温速度は400°C/3〜5秒で
あり、セラミックチップの昇温速度が速い理由は急激に
温度を上げても形状が変形したり、材質が劣化しないた
めである。
The heating rate of conventional heating chips is 400°C/3 to 5 seconds, and the reason why the heating rate of ceramic chips is so fast is that the shape does not deform or the material deteriorates even if the temperature is raised rapidly. .

〔実施例〕〔Example〕

第2図(a)、 (b)は実施例に用いたセラミックチ
ップの2面図である。
FIGS. 2(a) and 2(b) are two side views of the ceramic chip used in the example.

図において、lはチップ本体、 IA、 IBは通電の
ための端子である。
In the figure, l is the chip body, and IA and IB are terminals for power supply.

また、A、Bは基準面である。Further, A and B are reference planes.

第3図fan、 (b)は本発明の一実施例の構成図で
ある。
FIG. 3(b) is a block diagram of an embodiment of the present invention.

図はセラミックチップの取り付け構造を示す。The figure shows the mounting structure of the ceramic chip.

セラミックチップの保持具は次のように構成される。The ceramic chip holder is constructed as follows.

セラミックチップlは取付駒2によりLM (直線運動
)ガイド3のレール部に保持されており、垂直方向に5
mm程度8本のセラミックチップが平行に移動できるよ
うになっている。
The ceramic chip l is held on the rail part of the LM (linear motion) guide 3 by the mounting piece 2, and is
Eight ceramic chips of about mm can be moved in parallel.

タッキングの精度はチップの温度、加熱時間および加圧
量によって変化するためバネ4によりタッキング時の加
圧量を調整する。
Since the accuracy of tacking changes depending on the temperature of the chip, the heating time, and the amount of pressure applied, the amount of pressure applied during tacking is adjusted by the spring 4.

また、加熱時間とチップ温度はチップの昇温データを基
にして調整する。
Further, the heating time and chip temperature are adjusted based on the chip temperature increase data.

第4図(a)、 (b)は実施例の高密度実装基板対応
図である。
FIGS. 4(a) and 4(b) are diagrams corresponding to the high-density mounting board of the embodiment.

LSIを高密度実装基板(参照ピッチ28mm)に実装
する場合は、セラミックチップlの幅方向の寸法を小さ
(シ、先端に幅方向の逃げを設けることにより対応でき
る。
When mounting an LSI on a high-density mounting board (reference pitch: 28 mm), this can be achieved by reducing the width dimension of the ceramic chip l (i.e., providing a widthwise relief at the tip).

タッキング後の実装の本番は次のように行う。The actual implementation after tacking is performed as follows.

2個のチップ(例えば、 MoにAuメツキを施し。Two chips (for example, Mo plated with Au.

先端部にセラミックを溶射して被覆したもの)を持つオ
ートボンダ(自動ハンダ付機)によりLSIを基板上に
ハンダ付けする。
The LSI is soldered onto the board using an autobonder (automatic soldering machine) whose tip is coated with ceramic by thermal spraying.

この際、 LSIは仮止めされているので、 LSIの
外形を基準にしてLSI端子にチップを付け加熱してハ
ンダ付けした後、チップを90°回転して同様の操作を
行い4方向のハンダ付けを行う。
At this time, since the LSI is temporarily attached, place the chip on the LSI terminal based on the external shape of the LSI, heat it and solder it, then rotate the chip 90 degrees and repeat the same operation to solder in four directions. I do.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、チップ交換頻度は
少なくなり、かつ高スループット高精度、高歩留のタッ
キング方法が得られた。
As explained above, according to the present invention, a tacking method with reduced chip replacement frequency, high throughput, high precision, and high yield was obtained.

この結果、 LSIの高精度実装が高歩留、高スループ
ツトで行えるようになった。
As a result, high-precision LSI mounting has become possible with high yield and high throughput.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)、 (b)は本発明の原理図で加熱チップ
(セラミックチップ)の配置図。 第2図(a)、 (b)は実施例に用いたセラミックチ
ップの2面図。 第3図(al、 (blは本発明の一実施例の構成図第
4図(aL (blは実施例の高密度実装基板対応図で
ある。 図において。 ■は加熱チップでセラミックチップ。 IA、 IBは端子。 A、Bは基準面。 2は取付駒 3はLMガイド。 4はバネ %3.’、5 (α)上面図 智り讐曽 基堵 ((1)上面図 (α) 旧目 [][HI
FIGS. 1(a) and 1(b) are diagrams of the principle of the present invention, and are layout diagrams of heating chips (ceramic chips). FIGS. 2(a) and 2(b) are two side views of the ceramic chip used in the example. Figure 3 (al), (bl is a configuration diagram of an embodiment of the present invention. Figure 4 (aL) (bl is a diagram corresponding to a high-density mounting board of the embodiment. In the figure. ■ is a heating chip and a ceramic chip. IA , IB are terminals. A and B are reference planes. 2 is mounting piece 3 is LM guide. 4 is spring percentage 3.', 5 (α) Top view ((1) Top view (α) Old eyes [] [HI

Claims (1)

【特許請求の範囲】 1)半導体装置の端子に当接して加熱し,該端子を基板
にハンダ付けする加熱チップであって,構成面の少なく
とも1面を基準面とする複数の加熱チップと,該加熱チ
ップの該基準面間の距離を該加熱チップの取り付け基準
に合わせて調節できる該加熱チップの保持具を有するこ
とを特徴とする加熱チップ。 2)前記加熱チップが半導体装置の4辺の各辺にそれぞ
れ2本ずつ配置されることを特徴とする請求項1記載の
加熱チップ。 3)前記加熱チップがセラミックチップであることを特
徴とする請求項1または2記載の加熱チップ。 4)半導体装置の端子に加熱チップを当接して該加熱チ
ップを加熱し,該端子の予備ハンダを溶かして該半導体
装置を基板にタッキングする際,該加熱チップを構成す
る少なくとも1面を基準面とし,該チップの該基準面間
の距離を該加熱チップの取り付け基準に合わせて調節す
ることを特徴とする半導体装置の実装方法。
[Scope of Claims] 1) A plurality of heating chips that contact and heat terminals of a semiconductor device and solder the terminals to a substrate, the heating chips having at least one of the constituent surfaces as a reference surface; A heating chip characterized in that it has a holder for the heating chip that can adjust the distance between the reference surfaces of the heating chip in accordance with the mounting standard of the heating chip. 2) The heating chip according to claim 1, wherein two heating chips are arranged on each of four sides of the semiconductor device. 3) The heating chip according to claim 1 or 2, wherein the heating chip is a ceramic chip. 4) When a heating chip is brought into contact with a terminal of a semiconductor device to heat the heating chip, melt the preliminary solder of the terminal, and tack the semiconductor device to a substrate, at least one surface constituting the heating chip is set as a reference surface. and adjusting the distance between the reference surfaces of the chips in accordance with the mounting standard of the heating chip.
JP2263364A 1990-10-01 1990-10-01 Heating device and mounting method using the same Expired - Lifetime JP2519829B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2263364A JP2519829B2 (en) 1990-10-01 1990-10-01 Heating device and mounting method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2263364A JP2519829B2 (en) 1990-10-01 1990-10-01 Heating device and mounting method using the same

Publications (2)

Publication Number Publication Date
JPH04139893A true JPH04139893A (en) 1992-05-13
JP2519829B2 JP2519829B2 (en) 1996-07-31

Family

ID=17388463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2263364A Expired - Lifetime JP2519829B2 (en) 1990-10-01 1990-10-01 Heating device and mounting method using the same

Country Status (1)

Country Link
JP (1) JP2519829B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60131268U (en) * 1984-02-10 1985-09-03 八木 金作 Soldering iron parts removal tool
JPS62202964U (en) * 1986-06-13 1987-12-24

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60131268U (en) * 1984-02-10 1985-09-03 八木 金作 Soldering iron parts removal tool
JPS62202964U (en) * 1986-06-13 1987-12-24

Also Published As

Publication number Publication date
JP2519829B2 (en) 1996-07-31

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