JPH0412491B2 - - Google Patents

Info

Publication number
JPH0412491B2
JPH0412491B2 JP57143636A JP14363682A JPH0412491B2 JP H0412491 B2 JPH0412491 B2 JP H0412491B2 JP 57143636 A JP57143636 A JP 57143636A JP 14363682 A JP14363682 A JP 14363682A JP H0412491 B2 JPH0412491 B2 JP H0412491B2
Authority
JP
Japan
Prior art keywords
operand
main memory
address
signal
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57143636A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5933554A (ja
Inventor
Koichi Tsukizoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14363682A priority Critical patent/JPS5933554A/ja
Publication of JPS5933554A publication Critical patent/JPS5933554A/ja
Publication of JPH0412491B2 publication Critical patent/JPH0412491B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
JP14363682A 1982-08-18 1982-08-18 オペランド供給装置 Granted JPS5933554A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14363682A JPS5933554A (ja) 1982-08-18 1982-08-18 オペランド供給装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14363682A JPS5933554A (ja) 1982-08-18 1982-08-18 オペランド供給装置

Publications (2)

Publication Number Publication Date
JPS5933554A JPS5933554A (ja) 1984-02-23
JPH0412491B2 true JPH0412491B2 (enrdf_load_stackoverflow) 1992-03-04

Family

ID=15343366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14363682A Granted JPS5933554A (ja) 1982-08-18 1982-08-18 オペランド供給装置

Country Status (1)

Country Link
JP (1) JPS5933554A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0649631B2 (ja) * 1986-10-29 1994-06-29 信越半導体株式会社 結晶径測定装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2505518A1 (de) * 1974-03-13 1975-09-18 Control Data Corp Vorrichtung zur uebertragung von daten zwischen den speicher- und rechenabschnitten eines elektronischen rechners
JPS5174534A (ja) * 1974-12-24 1976-06-28 Fujitsu Ltd Tensomeireihoshiki

Also Published As

Publication number Publication date
JPS5933554A (ja) 1984-02-23

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