JPH04120733A - Method for forming silicon nitride film - Google Patents

Method for forming silicon nitride film

Info

Publication number
JPH04120733A
JPH04120733A JP2239940A JP23994090A JPH04120733A JP H04120733 A JPH04120733 A JP H04120733A JP 2239940 A JP2239940 A JP 2239940A JP 23994090 A JP23994090 A JP 23994090A JP H04120733 A JPH04120733 A JP H04120733A
Authority
JP
Japan
Prior art keywords
silicon nitride
nitride film
film
forming
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2239940A
Other languages
Japanese (ja)
Other versions
JP2900284B2 (en
Inventor
Hisatoshi Mori
森 久敏
Naohiro Konya
紺屋 直弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP2239940A priority Critical patent/JP2900284B2/en
Priority to US07/690,816 priority patent/US5284789A/en
Priority to DE69128210T priority patent/DE69128210T2/en
Priority to EP91106621A priority patent/EP0454100B1/en
Priority to KR1019910006715A priority patent/KR940008356B1/en
Publication of JPH04120733A publication Critical patent/JPH04120733A/en
Priority to US07/975,282 priority patent/US5367179A/en
Priority to US08/004,641 priority patent/US5243202A/en
Application granted granted Critical
Publication of JP2900284B2 publication Critical patent/JP2900284B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To enable a silicon nitride film with a fully high dielectric breakdown voltage be formed efficiently at a low film-forming temperature by controlling film-forming temperature, power density of RF discharge, and flow ratio of process gas to specific conditions. CONSTITUTION:When forming a silicon nitride film onto a surface of a glass substrate using a plasma CVD device, the film-forming temperature (substrate temperature) is controlled to approximately 250 deg.C and a power density of RF discharge is controlled to 60-100mW/cm<2>, and a flow ratio of process gases (SiH4, NH4, N2) is controlled to SiH4:NH4:N2=1:1:14-1:2.7:12.3 for forming the silicon nitride film. A composition ratio (Si/N) of silicon atom Si of the silicon nitride film which is formed under these film-forming conditions to nitrogen atom N is Si/N=0.75-0.85. Then, the silicon nitride film which is formed under these film-forming conditions has a low film-forming temperature of approximately 250 deg.C, thus achieving a sufficient dielectric breakdown voltage although density of the film quality is reduced to some extent.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はシリコン窒化膜の成膜方法に関するものである
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a silicon nitride film.

〔従来の技術〕[Conventional technology]

シリコン窒化膜は、薄膜トランジスタやMOS型集積回
路素子のゲート絶縁膜等として用いられている。
Silicon nitride films are used as gate insulating films of thin film transistors, MOS type integrated circuit elements, and the like.

このシリコン窒化膜は、一般にプラズマCVD装置によ
って成膜されており、従来は、絶縁破壊耐圧特性に優れ
たシリコン窒化膜を得るため、約350℃の成膜温度で
、RF放電のパワー密度を120〜130mW/cm2
に制御してシリコン窒化膜を成膜している。
This silicon nitride film is generally formed using a plasma CVD apparatus. Conventionally, in order to obtain a silicon nitride film with excellent dielectric breakdown voltage characteristics, the power density of RF discharge was increased to 120°C at a film formation temperature of approximately 350°C. ~130mW/cm2
The silicon nitride film is deposited under controlled conditions.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上記従来のシリコン窒化膜の成膜方法で
は、膜質が緻密でかつ絶縁破壊耐圧の高いシリコン窒化
膜が得られるが、その半面、成膜温度を約350℃の高
温にする必要があるため、シリコン窒化膜の成膜を能率
よく行なうことができないという問題をもっていた。
However, although the conventional method for forming a silicon nitride film described above yields a silicon nitride film with dense film quality and high dielectric breakdown voltage, on the other hand, it is necessary to raise the film formation temperature to a high temperature of about 350°C. However, there was a problem in that the silicon nitride film could not be formed efficiently.

すなわち、プラズマCVD装置による成膜は、真空チャ
ンバ内にシリコン窒化膜を形成する基板(通常はガラス
基板)を搬入した後、この基板を所定の成膜温度に加熱
するとともに、チャンバ内の温度も基板温度に影響を与
えない程度に加熱してから開始されるが、この場合、基
板を急速に加熱すると基板に割れを発生させるおそれが
あるため、基板の加熱はある程度時間をかけて行なう必
要がある。また、シリコン窒化膜を成膜した基板は、そ
の温度を次に基板がさらされる雰囲気の温度(基板を大
気中に取出す場合は大気温度)に近くなるまで下げてか
らチャンバ外に出されるか、この場合、基板を急速に冷
却すると、基板とシリコン窒化膜とにその熱膨張係数に
違いによる熱歪みが生じて、基板およびシリコン窒化膜
に割れが発生するため、シリコン窒化膜を成膜した後の
基板の冷却は、基板の加熱時よりもさらにゆっくりと行
なう必要がある。
In other words, in film formation using a plasma CVD apparatus, a substrate (usually a glass substrate) on which a silicon nitride film is to be formed is carried into a vacuum chamber, and then this substrate is heated to a predetermined film formation temperature, and the temperature inside the chamber is also adjusted. The process starts after heating the substrate to an extent that does not affect the temperature of the substrate, but in this case, heating the substrate too quickly may cause cracks in the substrate, so it is necessary to heat the substrate over a certain amount of time. be. In addition, the temperature of the substrate on which the silicon nitride film has been formed is lowered until it is close to the temperature of the atmosphere to which the substrate will be exposed next (atmospheric temperature if the substrate is taken out into the atmosphere) before being taken out of the chamber. In this case, if the substrate is rapidly cooled, thermal distortion will occur between the substrate and the silicon nitride film due to the difference in their thermal expansion coefficients, and cracks will occur in the substrate and the silicon nitride film. It is necessary to cool down the substrate more slowly than when heating the substrate.

このため、約350℃の高い成膜温度でシリコン窒化膜
を成膜する上記従来の成膜方法では、基板の加熱に時間
を要するだけでなく、シリコン窒化膜を成膜した後の基
板の冷却にもさらに長い時間を要し、したがって、シリ
コン窒化膜の成膜を能率よく行なうことができなかった
For this reason, the conventional film forming method described above, which forms a silicon nitride film at a high film forming temperature of approximately 350°C, not only requires time to heat the substrate, but also requires cooling the substrate after forming the silicon nitride film. Therefore, the silicon nitride film could not be efficiently formed.

本発明は上記のような実情にかんがみてなされたもので
あって、その目的とするところは、従来の成膜方法に比
べてはるかに低い成膜温度で、絶縁破壊耐圧の十分高い
シリコン窒化膜を能率よく成膜することができる、シリ
コン窒化膜の成膜方法を提供することにある。
The present invention has been made in view of the above-mentioned circumstances, and its purpose is to produce a silicon nitride film with sufficiently high dielectric breakdown voltage at a much lower film-forming temperature than conventional film-forming methods. An object of the present invention is to provide a method for forming a silicon nitride film, which can efficiently form a silicon nitride film.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、プラズマCVD装置によるシリコン窒化膜の
成膜において、成膜温度を約250℃、R,F放電のパ
ワー密度を60〜100mW/cm2 プロセスガスの
流量比を5jH4:NH4:N2−1+1:14〜1:
2.7:12.3に制御することを特徴とするものであ
る。
In the present invention, when forming a silicon nitride film using a plasma CVD apparatus, the film forming temperature is approximately 250°C, and the power density of R and F discharge is 60 to 100 mW/cm2, and the process gas flow rate ratio is 5jH4:NH4:N2-1+1. :14~1:
2.7:12.3.

〔作用〕[Effect]

このように、RF放電のパワー密度を60〜100 m
 W / c m 2に制御して成膜したシリコン窒化
膜は、その成膜温度が約250℃と低くても十分な絶縁
破壊耐圧をもち、特に、プロセスガスの流量比をSt 
H4: NH4: N2−1 : 1 :14〜1:2
.7:12.3に制御して成膜したシリコン窒化膜は、
高い絶縁破壊耐圧。をもつ。そして、本発明では、約2
50℃の低い成膜温度で十分な絶縁破壊耐圧をもつシリ
コン窒化膜を成膜できるため、シリコン窒化膜の成膜に
際しての基板の加熱時間が短くてすむし、またシリコン
窒化膜を成膜した後の基板の冷却も短縮することができ
るから、シリコン窒化膜の成膜を能率よく行なうことが
できる。
In this way, the power density of RF discharge can be increased from 60 to 100 m
A silicon nitride film formed under controlled W/cm2 has sufficient dielectric breakdown voltage even when the film forming temperature is as low as approximately 250°C.
H4: NH4: N2-1: 1:14-1:2
.. The silicon nitride film formed by controlling the ratio of 7:12.3 was
High dielectric breakdown voltage. have. In the present invention, about 2
Since a silicon nitride film with sufficient dielectric breakdown voltage can be formed at a low film formation temperature of 50°C, the heating time for the substrate is shortened when forming a silicon nitride film, and the silicon nitride film can be formed easily. Since the subsequent cooling of the substrate can also be shortened, the silicon nitride film can be formed efficiently.

〔実施例〕〔Example〕

以下、本発明の一実施例を説明する。 An embodiment of the present invention will be described below.

このシリコン窒化膜の成膜方法は、プラズマCVD装置
によるガラス基板面へのシリコン窒化膜の成膜に際して
、成膜温度(基板温度)を約250℃、RF放電のパワ
ー密度を60〜100m W / c m 2に制御し
、かつプロセスガス(SI H4、NH4、N2 )の
流量比を、SI H4: NH4: N2−1 : 1
 :14〜1:2.7:12.3に制御してシリコン窒
化膜を成膜するもので、このような成膜条件で成膜した
シリコン窒化膜のシリコン原子S1と窒素原子Nとの組
成比(St /N)は、Si/N−0,75〜0.85
である。
This method of forming a silicon nitride film uses a plasma CVD apparatus to form a silicon nitride film on a glass substrate surface at a film forming temperature (substrate temperature) of approximately 250°C and an RF discharge power density of 60 to 100 m W/. cm2, and the flow rate ratio of the process gases (SI H4, NH4, N2) was set to SI H4: NH4: N2-1: 1.
:14 to 1:2.7:12.3 to form a silicon nitride film, and the composition of silicon atoms S1 and nitrogen atoms N of the silicon nitride film formed under these film formation conditions is The ratio (St/N) is Si/N-0.75 to 0.85
It is.

そして、このような成膜条件で成膜したシリコン窒化膜
は、その成膜温度が約250℃と低くいために、膜質の
緻密度はある程度低下するが、従来の成膜方法で成膜し
たシリコン窒化膜とほとんど変わらない十分な絶縁破壊
耐圧をもっている。
The silicon nitride film deposited under these deposition conditions has a low deposition temperature of approximately 250°C, so the density of the film quality decreases to some extent, but silicon nitride film deposited using conventional deposition methods does not. It has sufficient dielectric breakdown voltage, almost the same as nitride film.

これは、RF放電のパワー密度を60〜100m W 
/ c m 2にしているためであり、成膜温度を25
0℃と低くした場合、放電パワー密度を従来の成膜方法
のように120〜130mW/cm2にすると、成膜さ
れたシリコン窒化膜の絶縁破壊耐圧か悪くなるか、放電
パワー密度を60〜100 m W / c m 2と
低くすれば、成膜温度が250℃と低くても、十分な絶
縁破壊耐圧をもつシリコン窒化膜を得ることができる。
This reduces the power density of the RF discharge to 60-100mW
/cm2, and the film forming temperature was 25
If the discharge power density is set to 120 to 130 mW/cm2 as in the conventional film forming method, the dielectric breakdown voltage of the silicon nitride film formed will deteriorate, or the discharge power density will be lowered to 60 to 100 mW/cm2 when the temperature is as low as 0°C. If it is as low as mW/cm2, a silicon nitride film with sufficient dielectric breakdown voltage can be obtained even if the film formation temperature is as low as 250°C.

ここで、成膜温度を約250℃とし、RF放電のパワー
密度を60〜100 m W / c m 2に制御し
て成膜されたシリコン窒化膜の絶縁破壊耐圧について説
明すると、第1図は、 成  膜  温  度 ;  250℃ガ  ス  流
  量 ;   SiH<    30SCCMN H
360800M N2  390SCCM 圧        力 ;   0. 5TorrRF
放電周波数;  13.56MH2放電パワー密度; 
 84mW/cm2の成膜条件で1000人の膜厚に成
膜したシリコン窒化膜の絶縁破壊耐圧ヒストグラムを示
している。なお、この成膜条件で成膜したシリコン窒化
膜の組成比は、Si/N−0,83である。
Here, to explain the dielectric breakdown voltage of a silicon nitride film formed by controlling the film forming temperature to about 250°C and the power density of RF discharge to 60 to 100 mW/cm2, Fig. 1 shows , Film-forming temperature: 250℃ Gas flow rate: SiH<30SCCMNH
360800M N2 390SCCM Pressure; 0. 5TorrRF
Discharge frequency; 13.56MH2 discharge power density;
This figure shows a dielectric breakdown voltage histogram of a silicon nitride film deposited to a thickness of 1000 people under a deposition condition of 84 mW/cm2. Note that the composition ratio of the silicon nitride film formed under these film forming conditions is Si/N-0.83.

また、第2図は、上記成膜条件のうち、RF放電のパワ
ー密度だけを高くした成膜条件、例えば、成 膜 温 
度; 250℃ ガ  ス  流  量 ;   5iE4  30SC
CMN H、60SCCM N2 390SCCM 圧        力 ;   0. 5TorrRF
放電周波数;  1B、56MH2放電パワー密度; 
 127mW/cm2で1000人の膜厚に成膜したシ
リコン窒化膜の絶縁破壊耐圧ヒストグラムを示している
。なお、この成膜条件で成膜したシリコン窒化膜の組成
比は、Sj/N−0,69である。
Furthermore, FIG. 2 shows the film-forming conditions in which only the power density of RF discharge is increased among the above-mentioned film-forming conditions, for example, the film-forming temperature
Degree; 250℃ Gas flow rate; 5iE4 30SC
CMN H, 60SCCM N2 390SCCM Pressure; 0. 5TorrRF
Discharge frequency; 1B, 56MH2 discharge power density;
This figure shows a dielectric breakdown voltage histogram of a silicon nitride film formed to a thickness of 1000 people at 127 mW/cm2. Note that the composition ratio of the silicon nitride film formed under these film forming conditions is Sj/N-0.69.

この第1図および第2図の絶縁破壊耐圧ヒストグラムは
、第4図および第5図は示した被検体について、そのシ
リコン窒化膜の絶縁破壊耐圧を測定して求めたものであ
る。
The dielectric breakdown voltage histograms shown in FIGS. 1 and 2 were obtained by measuring the dielectric breakdown voltage of the silicon nitride film of the specimen shown in FIGS. 4 and 5.

この被検体は、ガラス基板1面にストライプ状の下部電
極2を多数本互いに平行に形成し、その上にシリコン窒
化膜3を成膜して、このシリコン窒化膜3の上に前記下
部電極2と直交するストライプ状の上部電極4を多数本
互いに平行に形成したもので、シリコン窒化膜3の絶縁
破壊耐圧は、各下部電極2に順次電圧を印加し、1本の
下部電極2に電圧を印加するごとに各上部電極4に流れ
る電流の有無を順次チエツクする方法により、下部電極
2と上部電極4とが交差している電極対向部の全てにつ
いて測定した。なお、この被検体としては、電極対向部
の総数が691,200、全ての電極対向部の総面積が
2.07cm2で、かつシリコン窒化膜3を、平行平板
型プラズマCVD装置により1000人の膜厚に成膜し
たものを使用した。
In this test object, a large number of striped lower electrodes 2 are formed parallel to each other on a glass substrate 1, a silicon nitride film 3 is formed thereon, and the lower electrodes 2 are formed on the silicon nitride film 3. The dielectric breakdown voltage of the silicon nitride film 3 is determined by sequentially applying a voltage to each lower electrode 2 and applying a voltage to one lower electrode 2. Measurements were made for all of the electrode opposing parts where the lower electrode 2 and the upper electrode 4 intersect by a method of sequentially checking the presence or absence of current flowing through each upper electrode 4 each time the voltage was applied. In this case, the total number of electrode facing parts was 691,200, the total area of all electrode facing parts was 2.07 cm2, and the silicon nitride film 3 was deposited on 1000 people using a parallel plate plasma CVD apparatus. A thickly formed film was used.

そして、250℃の成膜温度で、放電パワー密度を12
7 mW/ c m2に制御してシリコン窒化膜3を成
膜した被検体について、電極2,4間に印加する電界強
度を連続的に変化させながら、シリコン窒化膜3の絶縁
破壊耐圧を測定したところ、このシリコン窒化膜の各印
加電界強度での絶縁破壊発生率(電極対向部の総数に対
する絶縁破壊が発生した電極対向部の数の比率)は、第
2図の通りであった。なお、ここでは、I X 10−
6A以上の電流が流れた電極対向部を絶縁破壊を生じた
不良部と判定した。
Then, at a film formation temperature of 250°C, the discharge power density was increased to 12
The dielectric breakdown voltage of the silicon nitride film 3 was measured while continuously changing the electric field strength applied between the electrodes 2 and 4 on a test object on which the silicon nitride film 3 was deposited under a control of 7 mW/cm2. The dielectric breakdown occurrence rate (the ratio of the number of electrode facing parts where dielectric breakdown occurred to the total number of electrode facing parts) of this silicon nitride film at each applied electric field strength was as shown in FIG. In addition, here, I X 10-
The electrode facing part through which a current of 6 A or more flowed was determined to be a defective part where dielectric breakdown occurred.

この第2図の絶縁破壊耐圧ヒストグラムのように、成膜
温度を250℃とした場合、放電パワー密度を127m
W/cm2に制御して成膜されたシリコン窒化膜は、3
 M V / c m 2以下の弱い印加電界強度で発
生するAモード不良(ピンホールによる初期不良)が、
I M V / c m 2で約5%、2 M V /
 c m 2で約2.5%と大きな比率で発生し、また
3MV/cm2より大きな印加電界強度で発生するBモ
ード不良(ウィークスポットによる不良)が、5 M 
V / c m 2で約5.2%、6M V / c 
m 2で約14.3%とかなり大きな比率で発生した。
As shown in the dielectric breakdown voltage histogram in Figure 2, when the film formation temperature is 250°C, the discharge power density is 127 m
The silicon nitride film formed by controlling the rate of W/cm2 is 3
A-mode failures (initial failures due to pinholes) that occur at weak applied electric field strengths of MV/cm2 or less are
About 5% in I MV/cm2, 2 MV/cm2
B-mode defects (defects due to weak spots) occur at a large rate of approximately 2.5% at cm2 and at applied electric field strengths greater than 3MV/cm2.
Approximately 5.2% in V/cm2, 6MV/c
It occurred at a fairly large rate of about 14.3% in m2.

このように成膜されたシリコン窒化膜の絶縁破壊耐圧が
悪くなるのは、120〜130mW/cm2、の高い放
電パワー密度でシリコン窒化膜を成膜すると、特に成膜
初期に、シリコン窒化物が散在状態(板面にスプレィで
水を吹き付けたときの水滴の付着状態に似た状態)で不
均一に基板面に堆積し、そのためにシリコン窒化膜の成
長の度合が不均一になって、ピンホールやウィークスポ
ット等の欠陥が多くなるからではないかと考えられる。
The reason why the dielectric breakdown voltage of the silicon nitride film formed in this manner deteriorates is that when the silicon nitride film is formed at a high discharge power density of 120 to 130 mW/cm2, especially in the early stage of film formation, the silicon nitride film deteriorates. The silicon nitride film is deposited unevenly on the substrate surface in a scattered state (similar to the adhering state of water droplets when water is sprayed onto the board surface), and as a result, the degree of growth of the silicon nitride film becomes uneven, resulting in pins. This is thought to be due to an increase in defects such as holes and weak spots.

そして、従来の成膜方法のように成膜温度が約350℃
と高ければ、成膜されるシリコン窒化膜は、ピンホール
やウィークスポット等の欠陥のない緻密な膜となるため
、その絶縁破壊耐圧は十分であるが、成膜温度が250
℃程度では、シリコン窒化膜の膜質を緻密にすることは
できないため、上記欠陥が発生して絶縁破壊耐圧が低下
してしまう。
And, unlike the conventional film forming method, the film forming temperature is approximately 350°C.
If the temperature is higher than 250℃, the silicon nitride film formed will be a dense film without defects such as pinholes or weak spots, and its dielectric breakdown voltage will be sufficient.
If the temperature is about .degree. C., the quality of the silicon nitride film cannot be made dense, so the above-mentioned defects occur and the dielectric breakdown voltage decreases.

なお、第2図には放電パワー密度を127mW70〜2
に制御して成膜したシリコン窒化膜の絶縁破壊耐圧ヒス
トグラムを示したか、成膜温度を250℃とした場合は
、放電パワー密度を120〜1.30 mW/ c 〜
2の範囲で変えても、成膜されたシリコン窒化膜は、第
2図とほぼ同様な絶縁破壊耐圧を示した。
In addition, in Figure 2, the discharge power density is 127mW70~2
The dielectric breakdown voltage histogram of the silicon nitride film deposited under the control of
Even when the temperature was changed within the range of 2, the silicon nitride film formed showed almost the same dielectric breakdown voltage as shown in FIG.

これに対して、250℃の成膜温度で、放電パワー密度
を84 m W / c m 2に制御してシリコン窒
化膜3を成膜した被検体について、上記と同様にしてシ
リコン窒化膜3の絶縁破壊耐圧を測定したところ、この
シリコン窒化膜の各印加電界強度での絶縁破壊発生率は
第1図の通りであった。なお、ここでも、lX1O−6
A以上の電流が流れた電極対向部を絶縁破壊を生じた不
良部と判定した。
On the other hand, the silicon nitride film 3 was deposited in the same manner as described above for a test object in which the silicon nitride film 3 was deposited at a deposition temperature of 250°C and the discharge power density was controlled to 84 mW/cm2. When the dielectric breakdown voltage was measured, the dielectric breakdown occurrence rate of this silicon nitride film at each applied electric field strength was as shown in FIG. In addition, here too, lX1O-6
The electrode facing part where a current of A or more flowed was determined to be a defective part where dielectric breakdown occurred.

この第1図の絶縁破壊耐圧ヒストグラムのように、成膜
温度を250℃とした場合でも、放電パワー密度を84
 m W / c m 2に制御して成膜されたシリコ
ン窒化膜は、3 M V / c m 2以下の弱い印
加電界強度で発生するAモード不良はほぼ完全に無くな
っており、また3 M V / c m 2より大きな
印加電界強度で発生するBモード不良も、5 M V 
/ c m 2て約0.4%、6 M V / c m
 2て約0.6%と極めて小さい比率でしか発生しなか
った。
As shown in the dielectric breakdown voltage histogram in Figure 1, even when the film formation temperature is 250°C, the discharge power density is 84°C.
In the silicon nitride film deposited under the control of mW/cm2, the A-mode defects that occur at weak applied electric field strengths of 3MV/cm2 or less are almost completely eliminated, and the 3MV/cm2 or less A-mode defects are almost completely eliminated. B-mode failures that occur at applied field strengths greater than 5 MV/cm2 also
/ cm 2 and about 0.4%, 6 MV / cm
2, it occurred at a very small rate of about 0.6%.

これは、RF放電のパワー密度が84 m W /cm
2、程度に低くすると、シリコン窒化物の基板面への堆
積状態が平均化されて、シリコン窒化膜が均一に成長す
るからではないかと考えられる。
This means that the power density of RF discharge is 84 mW/cm
It is thought that this is because when the temperature is lowered to about 2.2, the deposition state of silicon nitride on the substrate surface is averaged, and the silicon nitride film grows uniformly.

そして、このようにシリコン窒化膜か均一に成長すれば
、ピンホールやウィークスポット等の欠陥はほとんど発
生しなくなるから、その成膜温度が250℃と低く、シ
たがってシリコン窒化膜の膜質を緻密にすることができ
なくても、このシリコン窒化膜の絶縁破壊耐圧を十分高
くすることができる。
If the silicon nitride film is grown uniformly in this way, defects such as pinholes and weak spots will hardly occur, so the film formation temperature is as low as 250°C, and the quality of the silicon nitride film is therefore dense. Even if this cannot be achieved, the dielectric breakdown voltage of this silicon nitride film can be made sufficiently high.

なお、第1図には放電パワー密度を84 m W /c
m2に制御して成膜したシリコン窒化膜の絶縁破壊耐圧
ヒストグラムを示したが、放電パワー密度が60〜10
0 m W / c m 2の範囲であれば、成膜温度
が約250℃と低くても、成膜されたシリコン窒化膜は
第1図の絶縁破壊耐圧ヒストグラムとほぼ同様な絶縁破
壊耐圧を示す。
In addition, in Fig. 1, the discharge power density is 84 mW/c.
The dielectric breakdown voltage histogram of the silicon nitride film formed by controlling the discharge power density is 60 to 10 m2.
In the range of 0 mW/cm2, even if the film formation temperature is as low as about 250°C, the deposited silicon nitride film exhibits a dielectric breakdown voltage almost similar to the dielectric breakdown voltage histogram shown in Figure 1. .

また、上記成膜方法においては、プロセスガスの流量比
をSi H4: NH4: N2 ”1 : 1 :1
4〜1:2.7+12.3に制御しているため、成膜し
たシリコン窒化膜は、その欠陥密度が非常に少なく、よ
り高い絶縁破壊耐圧をもつ。
Further, in the above film forming method, the flow rate ratio of the process gas is set to SiH4:NH4:N2''1:1:1.
Since the ratio is controlled to 4 to 1:2.7+12.3, the formed silicon nitride film has a very low defect density and a higher dielectric breakdown voltage.

すなわち、第3図は、前記被検体のシリコン窒化膜3を
、 成  膜  温  度 ;  250℃圧      
  力 ;   0. 5TorrRF放電周波数; 
 13.56MHz放電パワー密度;  84mW/c
m2の成膜条件で、プロセスガスの流量比を変化させて
種々の組成比のシリコン窒化膜をそれぞれ750人の膜
厚に成膜し、この各組成比のシリコン窒化膜について、
電極2,4間に3MV/cm2の高電界を印加したとき
に発生する欠陥の密度を調べた結果を示している。
That is, FIG. 3 shows the silicon nitride film 3 of the object to be tested at a deposition temperature of 250°C and a pressure of 250°C.
Power; 0. 5TorrRF discharge frequency;
13.56MHz discharge power density; 84mW/c
Silicon nitride films with various composition ratios were formed to a film thickness of 750 mm by changing the flow rate ratio of the process gas under film formation conditions of 2 m2, and for the silicon nitride films with each composition ratio,
It shows the results of examining the density of defects that occur when a high electric field of 3 MV/cm2 is applied between electrodes 2 and 4.

この第3図のように、シリコン窒化膜に高電界を印加し
たときに発生する欠陥の密度は、シリコン窒化膜の組成
比(St /N)によって異なるが、ガス流量比をsi
 H4:NH4:N2−1 : 1 :14(ガス流量
; S I H430SCCM、 N H) 30SC
CM、  N 2420 SCCM)に制御して成膜さ
れた組成比Sj/N−0,85のシリコン窒化膜も、ガ
ス流量比をSi H4: NH4: N2〜1 : 2
. 7 :12.3(ガス流量; S i H430S
CCM。
As shown in Figure 3, the density of defects that occur when a high electric field is applied to a silicon nitride film varies depending on the composition ratio (St/N) of the silicon nitride film, but when the gas flow rate ratio is
H4:NH4:N2-1: 1:14 (Gas flow rate; SI H430SCCM, NH) 30SC
The silicon nitride film with a composition ratio Sj/N-0.85 was also formed by controlling the gas flow rate to SiH4:NH4:N2~1:2.
.. 7:12.3 (Gas flow rate; S i H430S
C.C.M.

N H380SCCM、  N2370SCCM)に制
御して成膜された組成比Si/N−0,75のシリコン
窒化膜も、その欠陥密度は50個/ c m 2以下と
かなり小さく、また組成比Si/Nが0.75〜0.8
5の範囲のシリコン窒化膜は、例えばガス流量比をSi
 H4:NH4:N2−1 :2: 1B(ガス流量、
 S i H430SCCM、  NH360SCCM
A silicon nitride film with a composition ratio of Si/N-0.75, which was formed by controlling the Si/N concentration (NH380SCCM, N2370SCCM), also had a fairly small defect density of less than 50 defects/cm2, and the composition ratio Si/N was 0.75-0.8
For example, if the silicon nitride film has a gas flow rate in the range of 5.
H4:NH4:N2-1:2:1B (gas flow rate,
S i H430SCCM, NH360SCCM
.

N 2390 SCCM)に制御して成膜された組成比
St/N−0,83のシリコン窒化膜で30個/cm2
、以下というように、さらに欠陥密度が小さくなってい
る。
30 pieces/cm2 with a silicon nitride film with a composition ratio of St/N-0.83, which was formed by controlling the
, the defect density is further reduced as shown below.

このように、上記成膜方法で成膜したシリコン窒化膜は
、その絶縁破壊耐圧が極めて高く、したかって、このシ
リコン窒化膜を薄膜トランジスタやMO5型集積回路素
子のゲート絶縁膜とすれば、この薄膜トランジスタやM
O5型集積回路素子の絶縁不良の発生率を大幅に少なく
して、その製造歩留および信頼性を向上させることかで
きるし、またゲート絶縁膜(シリコン窒化膜)の絶縁破
壊耐圧が高いためにその膜厚を薄くできるから、ゲート
電極に印加するゲート電圧が同じでも、半導体層により
強い電界をかけてオン電流を大きくとることができる。
As described above, the silicon nitride film formed by the above film-forming method has an extremely high dielectric breakdown voltage. Therefore, if this silicon nitride film is used as the gate insulating film of a thin film transistor or MO5 type integrated circuit element, this thin film transistor YaM
It is possible to significantly reduce the incidence of insulation defects in O5 type integrated circuit devices, improve manufacturing yield and reliability, and also because the dielectric breakdown voltage of the gate insulating film (silicon nitride film) is high. Since the film thickness can be reduced, even if the gate voltage applied to the gate electrode is the same, a stronger electric field can be applied to the semiconductor layer to increase the on-current.

そして、この成膜方法によれば、従来の成膜方法に比べ
て約100℃も低い成膜温度(約250℃)で、絶縁破
壊耐圧の十分高いシリコン窒化膜を得ることかできるた
め、シリコン窒化膜の成膜に際しての基板の加熱時間が
短くてすむし、またシリコン窒化膜を成膜した後の基板
の冷却も短縮することができるから、シリコン窒化膜の
成膜を能率よく行なうことができる。なお、上記成膜方
法では、RF放電のパワー密度を60〜100 m W
 / c m 2としているため、シリコレ窒化膜の堆
積速度は、RF放電のパワー密度を120−130 m
 W / c m 2としている従来の成膜方法より低
下するが、この堆積速度の低下に比べれば、基板の加熱
および冷却時間の短縮分の方がはるかに大きいから、堆
積速度の低下は問題にならない。
According to this film-forming method, it is possible to obtain a silicon nitride film with sufficiently high dielectric breakdown voltage at a film-forming temperature (approximately 250°C) that is approximately 100°C lower than that of conventional film-forming methods. The heating time for the substrate during the formation of the nitride film is shortened, and the cooling of the substrate after the silicon nitride film is formed can also be shortened, so the silicon nitride film can be formed efficiently. can. In addition, in the above film forming method, the power density of RF discharge is set to 60 to 100 mW.
/cm2, the deposition rate of the silicon nitride film is 120-130 m2 with the power density of the RF discharge.
This is lower than the conventional film deposition method, which uses W/cm2, but compared to this decrease in deposition rate, the reduction in substrate heating and cooling time is much greater, so the decrease in deposition rate is not a problem. It won't happen.

また、上記成膜方法は、約250℃の成膜温度で絶縁破
壊耐圧の十分高いシリコン窒化膜を成膜するものである
ため、例えば薄膜トランジスタの製造において、ゲート
絶縁膜となるシリコン窒化膜の成膜に上記成膜方法を適
用すれば、シリコン窒化膜と半導体層との堆積に要する
時間を短縮して、薄膜トランジスタの製造能率を向上さ
せることができる。
In addition, the above film formation method forms a silicon nitride film with sufficiently high dielectric breakdown voltage at a film formation temperature of about 250°C. By applying the above film formation method to the film, the time required for depositing the silicon nitride film and the semiconductor layer can be shortened, and the manufacturing efficiency of thin film transistors can be improved.

すなわち、例えば逆スタガー型の薄膜トランジスタは、
ガラス基板面にゲート電極を形成した後、その上にシリ
コン窒化膜(ゲート絶縁膜)と1型半導体層とを連続し
て堆積させ、さらにその上にn型半導体層とソース、ド
レイン電極となる金属膜を順次堆積させて、この後前記
金属膜とその下のn型半導体層とをソース、ドレイン電
極の形状にバターニングするとともに、前記l型半導体
層をトランジスタ素子形状にバターニングする製法で製
造されている。
In other words, for example, an inverted staggered thin film transistor is
After forming a gate electrode on the glass substrate surface, a silicon nitride film (gate insulating film) and a type 1 semiconductor layer are successively deposited on top of it, and then an n-type semiconductor layer and source and drain electrodes are formed on top of that. A manufacturing method in which a metal film is sequentially deposited, and then the metal film and the n-type semiconductor layer thereunder are patterned into the shape of source and drain electrodes, and the l-type semiconductor layer is patterned into the shape of a transistor element. Manufactured.

この薄膜トランジスタの製造においては、前記シリコン
窒化膜と1型半導体層とを、シリコン窒化膜成膜用チャ
ンバと、半導体層成膜用チャンバとを連続させて配置し
たプラズマCVD装置によって成膜しており、前記シリ
コン窒化膜とl型半導体層は、基板を前記各チャンバに
順次移送することによって、この基板上に連続して成膜
されている。また、前記l型半導体層には、一般に水素
化アモルファス・シリコン(a−3iH)が使用されて
おり、この水素化アモルファス・シリコンからなる半導
体層は、約250℃の成膜温度で、RFi電のパワー密
度を40〜50 m W / c m 2に制御して成
膜されている。このように約250℃の成膜温度でl型
半導体層を成膜しているのは、その成膜温度を高くする
と、水素化アモルファス・シリコン中の水素量が少なく
なって半導体特性が悪くなるためである。
In manufacturing this thin film transistor, the silicon nitride film and the type 1 semiconductor layer are formed using a plasma CVD apparatus in which a chamber for forming a silicon nitride film and a chamber for forming a semiconductor layer are arranged in series. , the silicon nitride film and the l-type semiconductor layer are successively deposited on the substrate by sequentially transferring the substrate to each of the chambers. In addition, hydrogenated amorphous silicon (a-3iH) is generally used for the l-type semiconductor layer, and the semiconductor layer made of hydrogenated amorphous silicon is formed at a film formation temperature of about 250°C to form an RFi electrode. The film is formed by controlling the power density of 40 to 50 mW/cm2. The reason why the l-type semiconductor layer is deposited at a deposition temperature of approximately 250°C is that if the deposition temperature is increased, the amount of hydrogen in the hydrogenated amorphous silicon decreases, resulting in poor semiconductor properties. It's for a reason.

そして、上記プラズマCVD装置によってシリコン窒化
膜と1型半導体層とを、連続して成膜する場合、従来は
、シリコン窒化膜を約350℃の成膜温度で成膜してい
るため、シリコン窒化膜成膜用チャンバにおいてシリコ
ン窒化膜を成膜した基板を、その温度が1型半導体層の
成膜温度(約250℃)になるまで温度調整してから次
の半導体層成膜用チャンバに移送しなければならない。
When a silicon nitride film and a type 1 semiconductor layer are successively formed using the above-mentioned plasma CVD apparatus, conventionally the silicon nitride film is formed at a film formation temperature of about 350°C. The temperature of the substrate on which the silicon nitride film has been deposited is adjusted in the film deposition chamber until the temperature reaches the deposition temperature for type 1 semiconductor layer (approximately 250°C), and then transferred to the next semiconductor layer deposition chamber. Must.

このため、従来は、シリコン窒化膜成膜用チャンバと次
の半導体層成膜用チャンバとの間に基板冷却室を設けて
、シリコン窒化膜を成膜した基板をl型半導体層の成膜
温度まで冷却しているが、この基板の冷却は〔発明が解
決しようとする課題〕の項で説明したようにゆっくりと
行なわなければならないため、シリコン窒化膜の成膜時
に約350℃に加熱した基板を約250℃に下げるのに
、かなりの時間を要してしまう。
For this reason, in the past, a substrate cooling chamber was provided between a chamber for forming a silicon nitride film and a chamber for forming the next semiconductor layer, and the substrate on which the silicon nitride film was formed was cooled to the temperature at which the l-type semiconductor layer was formed. However, as explained in the [Problem to be Solved by the Invention] section, this substrate must be cooled slowly, so the substrate heated to approximately 350°C during the formation of the silicon nitride film is It takes a considerable amount of time to lower the temperature to about 250°C.

これに対して、上記ゲート絶縁膜となるシリコン窒化膜
を本発明の成膜方法で成膜すれば、シリコン窒化膜の成
膜温度か、i型半導体層の成膜温度とほぼ同じ約250
℃でよいため、シリコン窒化膜成膜用チャンバにおいて
シリコン窒化膜を成膜した基板を、温度調整を行なうこ
となくそのまま次の半導体層成膜用チャンバに移送する
ことができる。したがって、シリコン窒化膜と1型半導
体層との堆積に要する時間を短縮して、薄膜トランジス
タの製造能率を向上させることができるし、また、プラ
ズマCVD装置のシリコン窒化膜成膜用チャンバと次の
半導体層成膜用チャンバとの間に基板冷却室を設ける必
要もないから、プラズマCVD装置の構成も簡単にする
ことかできる。
On the other hand, if the silicon nitride film which becomes the gate insulating film is formed by the film forming method of the present invention, the film forming temperature of the silicon nitride film will be approximately 250 nm, which is approximately the same as the film forming temperature of the i-type semiconductor layer.
℃, the substrate on which the silicon nitride film is formed in the silicon nitride film forming chamber can be transferred as it is to the next semiconductor layer forming chamber without temperature adjustment. Therefore, the time required for depositing the silicon nitride film and the type 1 semiconductor layer can be shortened, and the manufacturing efficiency of thin film transistors can be improved. Since there is no need to provide a substrate cooling chamber between the layer deposition chamber and the layer deposition chamber, the configuration of the plasma CVD apparatus can also be simplified.

〔発明の効果〕〔Effect of the invention〕

本発明は、プラズマCVD装置によるシリコン窒化膜の
成膜において、成膜温度を約250℃、RF放電のパワ
ー密度を60〜100 m W 70m2 プロセスガ
スの流量比を5jH4:NH4: N2 ”1 : 1
 +14〜1:2.7:12.3に制御することを特徴
とするものであるから、従来の成膜方法に比べてはるか
に低い成膜温度で、絶縁破壊耐圧の十分高いシリコン窒
化膜を得ることができる。したがって、シリコン窒化膜
の成膜に際しての基板の加熱時間が短くてすむし、また
シリコン窒化膜を成膜した後の基板の冷却も短縮するこ
とができるから、シリコン窒化膜の成膜を能率よく行な
うことができる。
In the present invention, in forming a silicon nitride film using a plasma CVD apparatus, the film forming temperature is approximately 250°C, the power density of RF discharge is 60 to 100 mW, 70 m2, and the flow rate ratio of process gas is 5jH4:NH4:N2''1: 1
Since this method is characterized by controlling the ratio to +14 to 1:2.7:12.3, it is possible to form a silicon nitride film with sufficiently high dielectric breakdown voltage at a much lower film-forming temperature than with conventional film-forming methods. Obtainable. Therefore, the heating time for the substrate when forming the silicon nitride film is shortened, and the time required to cool the substrate after forming the silicon nitride film can also be shortened, so that the silicon nitride film can be formed efficiently. can be done.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例で成膜したシリコン窒化膜の
絶縁破壊耐圧ヒストグラムを示す図、第2図は250℃
の成膜温度でRF放電のパワー密度を高くして成膜した
シリコン窒化膜の絶縁破壊耐圧ヒストグラムを示す図、
第3図はシリコン窒化膜の組成比と高電界の印加により
発生する欠陥の密度との関係を示す図、第4図および第
5図はシリコン窒化膜の絶縁破壊耐圧の測定に用いた被
検体の平面図およびその一部分の拡大断面図である。 出願人  カシオ計算機株式会社 汀例(界鬼屋(MV/cm2) 第 ■ 図 rY力1外弦屋 (MV/cm2) 第2図 第3図
Fig. 1 is a diagram showing a dielectric breakdown voltage histogram of a silicon nitride film formed in an embodiment of the present invention, and Fig. 2 is a diagram showing a dielectric breakdown voltage histogram at 250°C.
A diagram showing a dielectric breakdown voltage histogram of a silicon nitride film formed by increasing the power density of RF discharge at a film forming temperature of
Figure 3 is a diagram showing the relationship between the composition ratio of a silicon nitride film and the density of defects generated by the application of a high electric field. Figures 4 and 5 are specimens used to measure the dielectric breakdown voltage of silicon nitride films. FIG. 2 is a plan view and an enlarged sectional view of a portion thereof. Applicant: Casio Computer Co., Ltd. (Kaikiya (MV/cm2)) Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] プラズマCVD装置によるシリコン窒化膜の成膜におい
て、成膜温度を約250℃、RF放電のパワー密度を6
0〜100mW/cm^2、プロセスガスの流量比をS
iH_4:NH_4:N_2=1:1:14〜1:2.
7:12.3に制御することを特徴とするシリコン窒化
膜の成膜方法。
When forming a silicon nitride film using a plasma CVD device, the film forming temperature is approximately 250°C, and the power density of RF discharge is set to 6.
0 to 100mW/cm^2, process gas flow rate S
iH_4:NH_4:N_2=1:1:14 to 1:2.
A method for forming a silicon nitride film characterized by controlling the ratio to 7:12.3.
JP2239940A 1990-04-25 1990-09-12 Thin film formation method Expired - Lifetime JP2900284B2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2239940A JP2900284B2 (en) 1990-09-12 1990-09-12 Thin film formation method
US07/690,816 US5284789A (en) 1990-04-25 1991-04-23 Method of forming silicon-based thin film and method of manufacturing thin film transistor using silicon-based thin film
EP91106621A EP0454100B1 (en) 1990-04-25 1991-04-24 Method of forming silicon nitride thin film and method of manufacturing thin film transistor using silicon nitride thin film
DE69128210T DE69128210T2 (en) 1990-04-25 1991-04-24 Methods of manufacturing silicon nitride thin films and methods of manufacturing a thin film transistor using silicon nitride thin films
KR1019910006715A KR940008356B1 (en) 1990-04-25 1991-04-25 Forming method of thin film using silicon meterial and manufacturing method of thin-film transistor
US07/975,282 US5367179A (en) 1990-04-25 1992-11-12 Thin-film transistor having electrodes made of aluminum, and an active matrix panel using same
US08/004,641 US5243202A (en) 1990-04-25 1993-01-12 Thin-film transistor and a liquid crystal matrix display device using thin-film transistors of this type

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007138301A (en) * 1998-10-07 2007-06-07 Lg Philips Lcd Co Ltd Thin film forming apparatus
US8211074B2 (en) 2002-02-22 2012-07-03 The Procter And Gamble Company Absorbent article including undergarment fastener adhesive having improved adhesive pattern
KR20160052654A (en) 2013-09-03 2016-05-12 유니챰 가부시키가이샤 Individually packaged absorbent article
JP2019009472A (en) * 2013-08-23 2019-01-17 株式会社半導体エネルギー研究所 Manufacturing method of semiconductor device
WO2020121697A1 (en) * 2018-12-12 2020-06-18 株式会社日立製作所 Nanopore forming method and analysis method

Citations (1)

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Publication number Priority date Publication date Assignee Title
JPH01189128A (en) * 1988-01-22 1989-07-28 Matsushita Electric Ind Co Ltd Plasma cvd method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01189128A (en) * 1988-01-22 1989-07-28 Matsushita Electric Ind Co Ltd Plasma cvd method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007138301A (en) * 1998-10-07 2007-06-07 Lg Philips Lcd Co Ltd Thin film forming apparatus
US8211074B2 (en) 2002-02-22 2012-07-03 The Procter And Gamble Company Absorbent article including undergarment fastener adhesive having improved adhesive pattern
JP2019009472A (en) * 2013-08-23 2019-01-17 株式会社半導体エネルギー研究所 Manufacturing method of semiconductor device
KR20160052654A (en) 2013-09-03 2016-05-12 유니챰 가부시키가이샤 Individually packaged absorbent article
WO2020121697A1 (en) * 2018-12-12 2020-06-18 株式会社日立製作所 Nanopore forming method and analysis method
JP2020094894A (en) * 2018-12-12 2020-06-18 株式会社日立製作所 Nanopore forming method and analysis method
CN113164899A (en) * 2018-12-12 2021-07-23 株式会社日立制作所 Nanopore formation method and analysis method

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