JPH04116826A - Formation of silicon nitride film - Google Patents
Formation of silicon nitride filmInfo
- Publication number
- JPH04116826A JPH04116826A JP2235675A JP23567590A JPH04116826A JP H04116826 A JPH04116826 A JP H04116826A JP 2235675 A JP2235675 A JP 2235675A JP 23567590 A JP23567590 A JP 23567590A JP H04116826 A JPH04116826 A JP H04116826A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon nitride
- nitride film
- dielectric breakdown
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052581 Si3N4 Inorganic materials 0.000 title claims abstract description 96
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title claims abstract description 96
- 230000015572 biosynthetic process Effects 0.000 title description 23
- 238000000034 method Methods 0.000 claims abstract description 21
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 9
- 230000015556 catabolic process Effects 0.000 abstract description 43
- 239000000758 substrate Substances 0.000 abstract description 41
- 230000007547 defect Effects 0.000 abstract description 10
- 239000011521 glass Substances 0.000 abstract description 4
- 239000010408 film Substances 0.000 description 149
- 239000004065 semiconductor Substances 0.000 description 21
- 238000000151 deposition Methods 0.000 description 15
- 230000008021 deposition Effects 0.000 description 13
- 239000010409 thin film Substances 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 7
- 238000001816 cooling Methods 0.000 description 6
- 230000005684 electric field Effects 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はシリコン・窒化膜の成膜方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of forming a silicon/nitride film.
シリコン窒化膜は、薄膜トランジスタやMO5型集積回
路素子のゲート絶縁膜等として用いられている。Silicon nitride films are used as gate insulating films for thin film transistors, MO5 type integrated circuit elements, and the like.
このシリコン窒化膜は、一般にプラズマCVD装置によ
って成膜されており、従来は、絶縁破壊耐圧特性に優れ
たシリコン窒化膜を得るため、約350℃の成膜温度で
、RF放電のパワー密度を120〜130mW/cm2
に制御してシリコン窒化膜を成膜している。This silicon nitride film is generally formed using a plasma CVD apparatus. Conventionally, in order to obtain a silicon nitride film with excellent dielectric breakdown voltage characteristics, the power density of RF discharge was increased to 120°C at a film formation temperature of approximately 350°C. ~130mW/cm2
The silicon nitride film is deposited under controlled conditions.
しかしながら、上記従来のシリコン窒化膜の成膜方法で
は、膜質が緻密でかつ絶縁破壊耐圧の高いシリコン窒化
膜が得られるが、その半面、成膜温度を約350℃の高
温にする必要があるため、シリコン窒化膜の成膜を能率
よく行なうことができないという問題をもっていた。However, although the conventional method for forming a silicon nitride film described above yields a silicon nitride film with dense film quality and high dielectric breakdown voltage, on the other hand, it is necessary to raise the film formation temperature to a high temperature of about 350°C. However, there was a problem in that the silicon nitride film could not be formed efficiently.
すなわち、プラズマCVD装置による成膜は、真空チャ
ンバ内にシリコン窒化膜を形成する基板(通常はガラス
基板)を搬入した後、この基板を所定の成膜温度に加熱
するとともに、チャンバ内の温度も基板温度に影響を与
えない程度に加熱してから開始されるが、この場合、基
板を急速に加熱すると基板に割れを発生させるおそれが
あるため、基板の加熱はある程度時間をかけて行なう必
要がある。また、シリコン窒化膜を成膜した基板は、そ
の温度を次に基板がさらされる雰囲気の温度(基板を大
気中に取出す場合は大気温度)に近くなるまで下げてか
らチャンバ外に出されるが、この場合、基板を急速に冷
却すると、基板とシリコン窒化膜とにその熱膨脹係数に
違いによる熱歪みが生じて、基板およびシリコン窒化膜
に割れが発生するため、シリコン窒化膜を成膜した後の
基板の冷却は、基板の加熱時よりもさらにゆっくりと行
なう必要がある。In other words, in film formation using a plasma CVD apparatus, a substrate (usually a glass substrate) on which a silicon nitride film is to be formed is carried into a vacuum chamber, and then this substrate is heated to a predetermined film formation temperature, and the temperature inside the chamber is also adjusted. The process starts after heating the substrate to an extent that does not affect the temperature of the substrate, but in this case, heating the substrate too quickly may cause cracks in the substrate, so it is necessary to heat the substrate over a certain amount of time. be. Furthermore, the temperature of the substrate on which the silicon nitride film has been formed is lowered until it is close to the temperature of the atmosphere to which the substrate will be exposed next (atmospheric temperature if the substrate is taken out into the atmosphere) before being taken out of the chamber. In this case, if the substrate is rapidly cooled, thermal distortion will occur between the substrate and the silicon nitride film due to the difference in their coefficients of thermal expansion, and cracks will occur in the substrate and the silicon nitride film. It is necessary to cool the substrate more slowly than when heating the substrate.
このため、約350℃の高い成膜温度でシリコン窒化膜
を成膜する上記従来の成膜方法では、基板の加熱に時間
を要するだけでなく、シリコン窒化膜を成膜した後の基
板の冷却にもさらに長い時間を要し、したがって、シリ
コン窒化膜の成膜を能率よく行なうことができなかった
。For this reason, the conventional film forming method described above, which forms a silicon nitride film at a high film forming temperature of approximately 350°C, not only requires time to heat the substrate, but also requires cooling the substrate after forming the silicon nitride film. Therefore, the silicon nitride film could not be efficiently formed.
本発明は上記のような実情にかんがみてなされたもので
あって、その目的とするところは、従来の成膜方法に比
べてはるかに低い成膜温度で、絶縁破壊耐圧の十分高い
シリコン窒化膜を能率よく成膜することができる、シリ
コン窒化膜の成膜方法を提供することにある。The present invention has been made in view of the above-mentioned circumstances, and its purpose is to produce a silicon nitride film with sufficiently high dielectric breakdown voltage at a much lower film-forming temperature than conventional film-forming methods. An object of the present invention is to provide a method for forming a silicon nitride film, which can efficiently form a silicon nitride film.
本発明は、プラズマCVD装置によるシリコン窒化膜の
成膜において、成膜温度を約250℃とし、RF放電の
パワー密度を60〜100mW/cm2に制御すること
を特徴とするものである。The present invention is characterized in that in forming a silicon nitride film using a plasma CVD apparatus, the film forming temperature is approximately 250° C., and the power density of RF discharge is controlled to 60 to 100 mW/cm 2 .
このように、RF放電のパワー密度を60〜100mW
/cm2に制御して成膜したシリコン窒化膜は、その成
膜温度が約250℃と低くても、十分な絶縁破壊耐圧を
もっている。そして、本発明では、約250℃の低い成
膜温度で十分な絶縁破壊耐圧をもつシリコン窒化膜を成
膜できるため、シリコン窒化膜の成膜に際しての基板の
加熱時間が短くてすむし、またシリコン窒化膜を成膜し
た後の基板の冷却も短縮することができるから、シリコ
ン窒化膜の成膜を能率よく行なうことができる。In this way, the power density of RF discharge is reduced to 60-100mW.
The silicon nitride film formed under the control of /cm2 has sufficient dielectric breakdown voltage even if the film forming temperature is as low as about 250°C. In addition, in the present invention, a silicon nitride film having sufficient dielectric breakdown voltage can be formed at a low film forming temperature of about 250°C, so the heating time for the substrate is shortened when forming the silicon nitride film. Since cooling of the substrate after forming the silicon nitride film can also be shortened, the silicon nitride film can be formed efficiently.
以下、本発明の一実施例を説明する。 An embodiment of the present invention will be described below.
この実施例では、シリコン窒化膜を、
基 板 温 度; 250℃
プロセスガス; SIH,30SCC14NHs
60SCCN
N2 390SCCH
圧 力; 0、5 TorrRF放電
周波数; 13.56MHz放電パワー密度+ 8
4 m W / c m 2の成膜条件でプラズマCV
D装置により成膜した。In this example, the silicon nitride film was deposited at substrate temperature: 250°C and process gas: SIH, 30SCC14NHs.
60SCCN N2 390SCCH Pressure; 0, 5 TorrRF discharge frequency; 13.56MHz discharge power density + 8
Plasma CV under film formation conditions of 4 mW/cm2
The film was formed using D apparatus.
なお、この成膜条件で成膜したシリコン窒化膜のシリコ
ン原子Slと窒素原子Nとの組成比は、S1/N−0,
83であり、化学量論比(Si/N−0,73)に近い
組成となっている。Note that the composition ratio of silicon atoms Sl and nitrogen atoms N in the silicon nitride film formed under these film forming conditions is S1/N-0,
83, and has a composition close to the stoichiometric ratio (Si/N-0.73).
このような成膜条件で成膜したシリコン窒化膜は、その
成膜温度(基板温度)が250℃と低くいために、膜質
の緻密度はある程度低下するが、従来の成膜方法で成膜
したシリコン窒化膜とほとんど変わらない十分な絶縁破
壊耐圧をもっている。Silicon nitride films formed under these conditions have a low film formation temperature (substrate temperature) of 250°C, so the density of the film quality is reduced to some extent, but compared to films formed using conventional film formation methods. It has sufficient dielectric breakdown voltage, almost the same as silicon nitride film.
これは、RF放電のパワー密度を84 m W / a
iにしているためであり、成膜温度(基板温度)を25
0℃と低くした場合、放電パワー密度を従来の成膜方法
のように120〜130mW/cm2にすると、成膜さ
れたシリコン窒化膜の絶縁破壊耐圧が悪くなるが、放電
パワー密度を84mW/cm”と低くすれば、成膜温度
が250℃と低くても、十分な絶縁破壊耐圧をもつシリ
コン窒化膜を得ることができる。This brings the power density of the RF discharge to 84 mW/a
This is because the film forming temperature (substrate temperature) is set to 25
If the discharge power density is set to 120 to 130 mW/cm2 as in the conventional film forming method, the dielectric breakdown voltage of the deposited silicon nitride film will deteriorate when the discharge power density is set as low as 0°C, but if the discharge power density is set to 84 mW/cm '', a silicon nitride film with sufficient dielectric breakdown voltage can be obtained even if the film formation temperature is as low as 250°C.
すなわち、第1図は上記成膜条件で成膜したシリコン窒
化膜の絶縁破壊耐圧ヒストグラムを示し、第2図は上記
成膜条件のうち、放電パワー密度だけを127mW/c
m2に変えて成膜したシリコン窒化膜の絶縁破壊耐圧ヒ
ストグラムを示している。この絶縁破壊耐圧ヒストグラ
ムは、第3図および第4図は示した被検体について、そ
のシリコン窒化膜の絶縁破壊耐圧を測定して求めたもの
である。That is, Fig. 1 shows the dielectric breakdown voltage histogram of the silicon nitride film formed under the above-mentioned film-forming conditions, and Fig. 2 shows the breakdown voltage histogram of the silicon nitride film formed under the above-mentioned film-forming conditions.
A dielectric breakdown voltage histogram of a silicon nitride film formed instead of m2 is shown. This dielectric breakdown voltage histogram was obtained by measuring the dielectric breakdown voltage of the silicon nitride film of the specimen shown in FIGS. 3 and 4.
この被検体は、ガラス基板1面にストライブ状の下部電
極2を多数本互いに平行に形成し、その上にシリコン窒
化膜3を成膜して、このシリコン窒化膜3の上に前記下
部電極2と直交するストライブ状の上部電極4を多数本
互いに平行に形成したもので、シリコン窒化膜3の絶縁
破壊耐圧は、各下部電極2に順次電圧を印加し、1本の
下部電極2に電圧を印加するごとに各上部電極4に流れ
る電流の有無を順次チエツクする方法により、下部電極
2と上部電極4とが交差している電極対向部の全てにつ
いて測定した。なお、この被検体としては、電極対向部
の総数が691,200、全ての電極対向部の総面積が
2.07cm2で、かつシリコン窒化膜3を、平行平板
型プラズマCVD装置により1000人の膜厚に成膜し
たものを使用した。In this test object, a large number of striped lower electrodes 2 are formed in parallel to each other on a glass substrate 1, a silicon nitride film 3 is formed on the striped lower electrodes 2, and the lower electrodes are formed on the silicon nitride film 3. The dielectric breakdown voltage of the silicon nitride film 3 is determined by sequentially applying a voltage to each lower electrode 2 and applying a voltage to one lower electrode 2. Measurements were made for all electrode facing parts where the lower electrode 2 and the upper electrode 4 intersect by a method of sequentially checking the presence or absence of current flowing through each upper electrode 4 each time a voltage was applied. In this case, the total number of electrode facing parts was 691,200, the total area of all electrode facing parts was 2.07 cm2, and the silicon nitride film 3 was deposited on 1000 people using a parallel plate plasma CVD apparatus. A thickly formed film was used.
そして、250℃の成膜温度で、放電パワー密度ヲ12
7 mW/ c m 2に制御してシリコン窒化膜3を
成膜した被検体について、電極2,4間に印加する電界
強度を連続的に変化させながら、シリコン窒化膜3の絶
縁破壊耐圧を測定したところ、このシリコン窒化膜の各
印加電界強度での絶縁破壊発生率(電極対向部の総数に
対する絶縁破壊が発生した電極対向部の数の比率)は、
第2図の通りであった。なお、ここでは、lXl0−6
A以上の電流が流れた電極対向部を絶縁破壊を生じた不
良部と判定した。At a film formation temperature of 250°C, the discharge power density was 12
The dielectric breakdown voltage of the silicon nitride film 3 was measured while continuously changing the electric field strength applied between the electrodes 2 and 4 on the test object on which the silicon nitride film 3 was deposited under a control of 7 mW/cm2. As a result, the dielectric breakdown occurrence rate of this silicon nitride film at each applied electric field strength (the ratio of the number of electrode facing parts where dielectric breakdown occurred to the total number of electrode facing parts) is:
It was as shown in Figure 2. In addition, here, lXl0-6
The electrode facing part where a current of A or more flowed was determined to be a defective part where dielectric breakdown occurred.
この第2図の絶縁破壊耐圧ヒストグラムのように、成膜
温度を250℃とした場合、放電パワー密度を127
mW/ c 〜2に制御して成膜されたシリコン窒化膜
は、3 M V / c m 2以下の弱い印加電界強
度で発生するAモード不良(ピンホールによる初期不良
)が、l M V / c m 2で約5%、2 M
V / c m 2で約2.5%と大きな比率で発生し
、また3 M V / c m 2より大きな印加電界
強度で発生するBモード不良(ウィークスポットによる
不良)が、5 M V / c m 2で約5.2%、
6M V / c m 2で約14.3%とかなり大き
な比率で発生した。なお、第2図には放電パワー密度を
127mW/cm2に制御して成膜したシリコン窒化膜
の絶縁破壊耐圧ヒストグラムを示したが、成膜温度を2
50℃とした場合は、放電パワー密度を120〜130
mW/cm2の範囲で変えても、成膜されたシリコン窒
化膜は、第2図とほぼ同様な絶縁破壊耐圧を示した。As shown in the dielectric breakdown voltage histogram in Figure 2, when the film formation temperature is 250°C, the discharge power density is 127°C.
In the silicon nitride film formed under control of mW/c ~ 2, A-mode defects (initial defects due to pinholes) that occur at weak applied electric field strengths of 3 MV/cm 2 or less are l MV/cm 2 or less. About 5% in cm 2, 2 M
B-mode failures (defects due to weak spots) occur at a large rate of about 2.5% at V/cm2 and at applied field strengths greater than 3MV/cm2, but Approximately 5.2% in m2,
At 6 MV/cm2, it occurred at a fairly large rate of about 14.3%. Note that although Fig. 2 shows the dielectric breakdown voltage histogram of the silicon nitride film formed by controlling the discharge power density to 127 mW/cm2, the film forming temperature was changed to 2.
When the temperature is 50°C, the discharge power density is 120 to 130
Even when the voltage was changed within the range of mW/cm2, the silicon nitride film formed showed a dielectric breakdown voltage almost the same as that shown in FIG. 2.
このように成膜されたシリコン窒化膜の絶縁破壊耐圧が
悪くなるのは、127mW/cm2の高い放電パワー密
度でシリコン窒化膜を成膜すると、特に成膜初期に、シ
リコン窒化物が散在状態(板面にスプレィで水を吹き付
けたときの水滴の付着状態に似た状態)で不均一に基板
面に堆積し、そのためにシリコン窒化膜の成長の度合が
不均一になって、ピンホールやウィークスポット等の欠
陥が多くなるからではないかと考えられる。そして、従
来の成膜方法のように成膜温度が約350℃と高ければ
、成膜されるシリコン窒化膜は、ピンホールやウィーク
スポット等の欠陥のない緻密な膜となるため、その絶縁
破壊耐圧は十分であるが、成膜温度が250℃程度では
、シリコン窒化膜の膜質を緻密にすることはできないた
め、上記欠陥が発生して絶縁破壊耐圧が低下してしまう
。The reason why the dielectric breakdown voltage of the silicon nitride film formed in this manner deteriorates is that when the silicon nitride film is formed at a high discharge power density of 127 mW/cm2, especially in the early stage of film formation, silicon nitride is scattered ( The silicon nitride film grows unevenly, causing pinholes and cracks. This is thought to be due to an increase in defects such as spots. If the film-forming temperature is as high as about 350°C as in the conventional film-forming method, the silicon nitride film formed will be a dense film without defects such as pinholes and weak spots, resulting in dielectric breakdown. Although the breakdown voltage is sufficient, the film quality of the silicon nitride film cannot be made dense when the film formation temperature is about 250° C., so the above-mentioned defects occur and the dielectric breakdown voltage decreases.
一方、250℃の成膜温度で、放電パワー密度を84m
W/cm2に制御してシリコン窒化膜3を成膜した被検
体について、上記と同様にしてシリコン窒化膜3の絶縁
破壊耐圧を測定したところ、このシリコン窒化膜の各印
加電界強度での絶縁破壊発生率は第1図の通りであった
。なお、ここでも、lXl0−6A以上の電流が流れた
電極対向部を絶縁破壊を生じた不良部と判定した。On the other hand, at a film formation temperature of 250°C, the discharge power density was 84 m
When the dielectric breakdown voltage of the silicon nitride film 3 was measured in the same manner as above on a specimen on which the silicon nitride film 3 was deposited under the control of W/cm2, the dielectric breakdown voltage of the silicon nitride film at each applied electric field strength was measured. The incidence rate is shown in Figure 1. In this case as well, the electrode facing part in which a current of 1X10-6 A or more flowed was determined to be a defective part where dielectric breakdown occurred.
この第1図の絶縁破壊耐圧ヒストグラムのように、成膜
温度を250℃とした場合でも、放電パワー密度を84
m W / c m 2に制御して成膜されたシリコ
ン窒化膜は、3Mv/cm2以下の弱い印加電界強度で
発生するAモード不良はほぼ完全に無くなっており、ま
た3 M V / c m 2より大きな印加電界強度
で発生するBモード不良も、5M V / c m 2
で約0.4%、6 M V / c m 2で約0.6
%と極めて小さい比率でしか発生しなかった。As shown in the dielectric breakdown voltage histogram in Figure 1, even when the film formation temperature is 250°C, the discharge power density is 84°C.
The silicon nitride film deposited under the control of mW/cm2 has almost completely eliminated the A-mode defects that occur at weak applied electric field strengths of 3Mv/cm2 or less, and has a film density of 3MV/cm2. B-mode failures that occur at higher applied field strengths are also less than 5M V/cm2
about 0.4% at 6 MV/cm2, about 0.6 at 6 MV/cm2
It occurred only at a very small percentage.
これは、RF放電のパワー密度が84 m W / c
d程度に低くすると、シリコン窒化物の基板面への堆積
状態が平均化されて、シリコン窒化膜が均一に成長する
からではないかと考えられる。そして、このようにシリ
コン窒化膜が均一に成長すれば、ピンホールやウィーク
スポット等の欠陥はほとんど発生しなくなるから、その
成膜温度が250℃と低く、したがってシリコン窒化膜
の膜質を緻密にすることができなくても、このシリコン
窒化膜の絶縁破壊耐圧を十分高くすることができる。This means that the power density of the RF discharge is 84 mW/c
It is thought that this is because, when it is as low as d, the deposition state of silicon nitride on the substrate surface is averaged, and the silicon nitride film grows uniformly. If the silicon nitride film grows uniformly in this way, defects such as pinholes and weak spots will hardly occur, so the film formation temperature will be as low as 250 degrees Celsius, thus making the silicon nitride film denser. Even if this is not possible, the dielectric breakdown voltage of this silicon nitride film can be made sufficiently high.
このように、前記実施例の成膜方法で成膜したシリコン
窒化膜は、その絶縁破壊耐圧が極めて高く、したがって
、このシリコン窒化膜を薄膜トランジスタやMOS型集
積回路素子のゲート絶縁膜とすれば、この薄膜トランジ
スタやMOS型集積回路素子の絶縁不良の発生率を大幅
に少なくして、その製造歩留および信頼性を向上させる
ことができるし、またゲート絶縁ml(シリコン窒化膜
)の絶縁破壊耐圧が高いためにその膜厚を薄くできるか
ら、ゲート電極に印加するゲート電圧が同じでも、半導
体層により強い電界をかけてオン電流を大きくとること
ができる。As described above, the silicon nitride film formed by the film forming method of the above embodiment has an extremely high dielectric breakdown voltage. Therefore, if this silicon nitride film is used as a gate insulating film of a thin film transistor or a MOS type integrated circuit element, It is possible to significantly reduce the incidence of insulation defects in thin film transistors and MOS type integrated circuit elements, improve their manufacturing yield and reliability, and also increase the dielectric breakdown voltage of the gate insulator ml (silicon nitride film). Since the film thickness is high, the film thickness can be made thinner, so even if the gate voltage applied to the gate electrode is the same, a stronger electric field can be applied to the semiconductor layer to increase the on-current.
なお、上記実施例では、RF放電のパワー密度を84
m W / c m ’としたが、この放電パワー密度
は、60〜100mW/cm2(7)範囲テアレバよく
、この範囲の放電パワー密度で成膜されたシリコン窒化
膜は、その成膜温度を約250”Cと低くしても、第1
図の絶縁破壊耐圧ヒストグラムとほぼ同様な絶縁破壊耐
圧を示す。In the above example, the power density of the RF discharge was set to 84
m W / cm ', but this discharge power density has a good tear lever in the range of 60 to 100 mW/cm2 (7), and the silicon nitride film deposited with the discharge power density in this range has a deposition temperature of approximately Even if it is as low as 250"C, the first
It shows almost the same dielectric breakdown voltage as the dielectric breakdown voltage histogram shown in the figure.
そして、この成膜方法によれば、従来の成膜方法に比べ
て約100℃も低い成膜温度(約250℃)で、絶縁破
壊耐圧の十分高いシリコン窒化膜を得ることができるた
め、シリコン窒化膜の成膜に際しての基板の加熱時間が
短くてすむし、またシリコン窒化膜を成膜した後の基板
の冷却も短縮することができるから、シリコン窒化膜の
成膜を能率よく行なうことができる。なお、上記成膜方
法では、RF放電のパワー密度を60〜100mW/c
m2としているため、シリコン窒化膜の堆積速度は、R
F放電のパワー密度を120〜130mW/cm2とし
ている従来の成膜方法より低下するが、この堆積速度の
低下に比べれば、基板の加熱および冷却時間の短縮分の
方がはるかに大きいから、堆積速度の低下は問題になら
ない。According to this film-forming method, a silicon nitride film with sufficiently high dielectric breakdown voltage can be obtained at a film-forming temperature (approximately 250°C) that is approximately 100°C lower than that of conventional film-forming methods. The heating time for the substrate during the formation of the nitride film is shortened, and the cooling of the substrate after the silicon nitride film is formed can also be shortened, so the silicon nitride film can be formed efficiently. can. In addition, in the above film forming method, the power density of RF discharge is set to 60 to 100 mW/c.
m2, the deposition rate of the silicon nitride film is R
This is lower than the conventional film formation method in which the F discharge power density is 120 to 130 mW/cm2, but compared to this reduction in deposition rate, the reduction in heating and cooling time of the substrate is much greater, so the deposition The slowdown is not an issue.
また、上記成膜方法は、約250”Cの成膜温度で絶縁
破壊耐圧の十分高いシリコン窒化膜を成膜するものであ
るため、例えば薄膜トランジスタの製造において、ゲー
ト絶縁膜となるシリコン窒化膜の成膜に上記成膜方法を
適用すれば、シリコン窒化膜と半導体層との堆積に要す
る時間を短縮して、薄膜トランジスタの製造能率を向上
させることができる。In addition, the above film formation method forms a silicon nitride film with sufficiently high dielectric breakdown voltage at a film formation temperature of about 250"C. Therefore, for example, in the manufacture of thin film transistors, the silicon nitride film that becomes the gate insulating film is used. If the above-described film formation method is applied to film formation, the time required for depositing the silicon nitride film and the semiconductor layer can be shortened, and the manufacturing efficiency of thin film transistors can be improved.
すなわち、例えば逆スタガー型の薄膜トランジスタは、
ガラス基板面にゲート電極を形成した後、その上にシリ
コン窒化膜(ゲート絶縁膜)とi型半導体層とを連続し
て堆積させ、さらにその上にn型半導体層とソース、ド
レイン電極となる金属膜を順次堆積させて、この後前記
金属膜とその下のn型半導体層とをソース、ドレイン電
極の形状にバターニングするとともに、前記i型半導体
層をトランジスタ素子形状にパターニングする製法で製
造されている。In other words, for example, an inverted staggered thin film transistor is
After forming a gate electrode on the glass substrate surface, a silicon nitride film (gate insulating film) and an i-type semiconductor layer are successively deposited on top of it, and then an n-type semiconductor layer and a source and drain electrode are formed on top of that. Manufactured by a manufacturing method in which a metal film is sequentially deposited, and then the metal film and the n-type semiconductor layer thereunder are patterned into the shape of source and drain electrodes, and the i-type semiconductor layer is patterned into the shape of a transistor element. has been done.
この薄膜トランジスタの製造においては、前記シリコン
窒化膜とi型半導体層とを、シリコン窒化膜成膜用チャ
ンバと、半導体層成膜用チャンバとを連続させて配置し
たプラズマCVD装置にょって成膜しており、前記シリ
コン窒化膜とi型半導体層は、基板を前記各チャンバに
順次移送することによって、この基板上に連続して成膜
されている。また、前記i型半導体層には、一般に水素
化アモルファス・シリコン(a−5IH)が使用されて
おり、この水素化アモルファス・シリコンからなる半導
体層は、約250’Cの成膜温度で、RF放電のパワー
密度を40〜50mW/cm2に制御して成膜されてい
る。このように約250℃の成膜温度でi型半導体層を
成膜しているのは、その成膜温度を高くすると、水素化
アモルファス・シリコン中の水素量が少なくなって半導
体特性が悪くなるためである。In manufacturing this thin film transistor, the silicon nitride film and the i-type semiconductor layer are formed using a plasma CVD apparatus in which a chamber for forming a silicon nitride film and a chamber for forming a semiconductor layer are arranged in series. The silicon nitride film and the i-type semiconductor layer are successively formed on the substrate by sequentially transferring the substrate to each of the chambers. In addition, hydrogenated amorphous silicon (a-5IH) is generally used for the i-type semiconductor layer, and the semiconductor layer made of hydrogenated amorphous silicon is formed by RF radiation at a deposition temperature of about 250'C. The film is formed by controlling the discharge power density to 40 to 50 mW/cm2. The reason why the i-type semiconductor layer is deposited at a deposition temperature of approximately 250°C is that if the deposition temperature is increased, the amount of hydrogen in the hydrogenated amorphous silicon decreases, resulting in poor semiconductor properties. It's for a reason.
そして、上記プラズマCVD装置によってシリコン窒化
膜とi型半導体層とを、連続して成膜する場合、従来は
、シリコン窒化膜を約350”Cの成膜温度で成膜して
いるため、シリコン窒化膜成膜用チャンバにおいてシリ
コン窒化膜を成膜した基板を、その温度がi型半導体層
の成膜温度(約250℃)になるまで温度調整してがら
次の半導体層成膜用チャンバに移送しなければならない
。When a silicon nitride film and an i-type semiconductor layer are successively formed using the above-mentioned plasma CVD apparatus, conventionally the silicon nitride film is formed at a film-forming temperature of about 350"C. The substrate on which the silicon nitride film has been deposited in the nitride film deposition chamber is transferred to the next semiconductor layer deposition chamber while adjusting the temperature until the temperature reaches the deposition temperature of the i-type semiconductor layer (approximately 250°C). must be transported.
このため、従来は、シリコン窒化膜成膜用チャンバと次
の半導体層成膜用チャンバとの間に基板冷却室を設けて
、シリコン窒化膜を成膜した基板をi型半導体層の成膜
温度まで冷却しているが、この基板の冷却は〔発明が解
決しようとする課題〕の項で説明したようにゆっくりと
行なわなければならないため、シリコン窒化膜の成膜時
に約350℃に加熱した基板を約250℃に下げるのに
、かなりの時間を要してしまう。For this reason, in the past, a substrate cooling chamber was provided between a chamber for forming a silicon nitride film and a chamber for forming the next semiconductor layer, and the substrate on which a silicon nitride film was formed was cooled to the temperature at which the i-type semiconductor layer was formed. However, as explained in the [Problem to be Solved by the Invention] section, this substrate must be cooled slowly, so the substrate heated to approximately 350°C during the formation of the silicon nitride film is It takes a considerable amount of time to lower the temperature to about 250°C.
これに対して、上記ゲート絶縁膜となるシリコン窒化膜
を本発明の成膜方法で成膜すれば、シリコン窒化膜の成
膜温度が、i型半導体層の成膜温度とほぼ同じ約250
℃でよいため、シリコン窒化膜成膜用チャンバにおいて
シリコン窒化膜を成膜した基板を、温度調整を行なうこ
となくそのまま次の半導体層成膜用チャンバに移送する
ことができる。したがって、シリコン窒化膜とi型半導
体層との堆積に要する時間を短縮して、薄膜トランジス
タの製造能率を向上させることができるし、また、プラ
ズマCVD装置のシリコン窒化膜成膜用チャンバと次の
半導体層成膜用チャンバとの間に基板冷却室を設ける必
要もないから、プラズマCVD装置の構成も簡単にする
ことができる。On the other hand, if the silicon nitride film which becomes the gate insulating film is formed by the film forming method of the present invention, the film forming temperature of the silicon nitride film will be approximately 250 nm, which is almost the same as the film forming temperature of the i-type semiconductor layer.
℃, the substrate on which the silicon nitride film is formed in the silicon nitride film forming chamber can be transferred as it is to the next semiconductor layer forming chamber without temperature adjustment. Therefore, the time required for depositing the silicon nitride film and the i-type semiconductor layer can be shortened, and the manufacturing efficiency of thin film transistors can be improved. Since there is no need to provide a substrate cooling chamber between the layer deposition chamber and the layer deposition chamber, the configuration of the plasma CVD apparatus can also be simplified.
本発明は、プラズマCVD装置によるシリコン窒化膜の
成膜において、成膜温度を約250℃とし、RF放電の
パワー密度を60〜100mW/cm2に制御すること
を特徴とするものであるから、従来の成膜方法に比べて
はるかに低い成膜温度で、絶縁破壊耐圧の十分高いシリ
コン窒化膜を得ることができる。したがって、シリコン
窒化膜の成膜に際しての基板の加熱時間が短くてすむし
、またシリコン窒化膜を成膜した後の基板の冷却も短縮
することができるから、シリコン窒化膜の成膜を能率よ
く行なうことができる。The present invention is characterized in that, in forming a silicon nitride film using a plasma CVD apparatus, the film forming temperature is set at approximately 250°C, and the power density of RF discharge is controlled to 60 to 100 mW/cm2. A silicon nitride film with sufficiently high dielectric breakdown voltage can be obtained at a much lower film forming temperature than the film forming method described above. Therefore, the heating time for the substrate when forming the silicon nitride film is shortened, and the time required to cool the substrate after forming the silicon nitride film can also be shortened, so that the silicon nitride film can be formed efficiently. can be done.
第1図は本発明の一実施例で成膜したシリコン窒化膜の
絶縁破壊耐圧ヒストグラムを示す図、第2図は250℃
の成膜温度でRF放電のパワー密度を高くして成膜した
シリコン窒化膜の絶縁破壊耐圧ヒストグラムを示す図、
第3図および第4図はシリコン窒化膜の絶縁破壊耐圧の
測定に用いた被検体の平面図およびその一部分の拡大断
面図である。Fig. 1 is a diagram showing a dielectric breakdown voltage histogram of a silicon nitride film formed in an embodiment of the present invention, and Fig. 2 is a diagram showing a dielectric breakdown voltage histogram at 250°C.
A diagram showing a dielectric breakdown voltage histogram of a silicon nitride film formed by increasing the power density of RF discharge at a film forming temperature of
3 and 4 are a plan view and an enlarged cross-sectional view of a portion of the test object used for measuring the dielectric breakdown voltage of a silicon nitride film.
Claims (1)
て、成膜温度を約250℃とし、RF放電のパワー密度
を60〜100mW/cm^2に制御することを特徴と
するシリコン窒化膜の成膜方法。A method for forming a silicon nitride film using a plasma CVD apparatus, characterized in that the film forming temperature is about 250° C., and the power density of RF discharge is controlled to 60 to 100 mW/cm^2.
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2235675A JPH04116826A (en) | 1990-09-07 | 1990-09-07 | Formation of silicon nitride film |
US07/690,816 US5284789A (en) | 1990-04-25 | 1991-04-23 | Method of forming silicon-based thin film and method of manufacturing thin film transistor using silicon-based thin film |
DE69128210T DE69128210T2 (en) | 1990-04-25 | 1991-04-24 | Methods of manufacturing silicon nitride thin films and methods of manufacturing a thin film transistor using silicon nitride thin films |
EP91106621A EP0454100B1 (en) | 1990-04-25 | 1991-04-24 | Method of forming silicon nitride thin film and method of manufacturing thin film transistor using silicon nitride thin film |
KR1019910006715A KR940008356B1 (en) | 1990-04-25 | 1991-04-25 | Forming method of thin film using silicon meterial and manufacturing method of thin-film transistor |
US07/975,282 US5367179A (en) | 1990-04-25 | 1992-11-12 | Thin-film transistor having electrodes made of aluminum, and an active matrix panel using same |
US08/004,641 US5243202A (en) | 1990-04-25 | 1993-01-12 | Thin-film transistor and a liquid crystal matrix display device using thin-film transistors of this type |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2235675A JPH04116826A (en) | 1990-09-07 | 1990-09-07 | Formation of silicon nitride film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04116826A true JPH04116826A (en) | 1992-04-17 |
Family
ID=16989540
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2235675A Pending JPH04116826A (en) | 1990-04-25 | 1990-09-07 | Formation of silicon nitride film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04116826A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005353766A (en) * | 2004-06-09 | 2005-12-22 | Sony Corp | Solid state imaging device and its manufacturing method |
-
1990
- 1990-09-07 JP JP2235675A patent/JPH04116826A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005353766A (en) * | 2004-06-09 | 2005-12-22 | Sony Corp | Solid state imaging device and its manufacturing method |
JP4670266B2 (en) * | 2004-06-09 | 2011-04-13 | ソニー株式会社 | Manufacturing method of solid-state imaging device |
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