JPH04114437A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable the potential in a channel region to be controlled efficiently while a large current to be fed even if the elements are miniaturized by a method wherein a gate oxide film is formed in contact with the periphery of a channel region while a gate electrode is formed in contact with the periphery of the gate oxide film. CONSTITUTION:A channel region 9 is formed between a source region 16 and a drain region 18 while a gate oxide film 8 in contact with the periphery of the channel region 9 is formed. A gate electrode 14 is formed around the gate oxide film 8. The gate electrode 14 is halfway buried in the isolation oxide film 10 on a silicon substrate 1 so as to be formed in parallel with the semiconductor surface. The silicon formed into the channel region 9 and the gate oxide film 8 formed around the silicon are taken into a bridge shape as if floating in the gate electrode 14 relative to the isolation oxide film 10. Through these procedures, the effective channel space can be widened thereby enabling the channel potential to be controlled efficiently.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly to a MOS transistor based on SOI and a method for manufacturing the same.

[Summary] The purpose of the present invention is to provide a semiconductor device, particularly an SOI-based MoS transistor, that can efficiently control the potential in the channel region and allow a large current to flow even when the element is miniaturized. an insulating film formed above, a source region and a drain region formed on the insulating film, and an insulating film formed on the insulating film;
In the semiconductor device, the semiconductor device includes a channel region formed between the source region and the train region on A, and a gate electrode formed on the channel region with a gate oxide film interposed therebetween. The gate electrode is formed in contact with the periphery of the gate oxide film, and the gate electrode is formed in contact with the periphery of the gate oxide film.

[Prior Art] A conventional Sol MOS (MOS) transistor will be explained with reference to FIG.

A silicon single crystal layer is formed on a silicon substrate 1 via an isolation oxide film 10, and a source region 16 and a drain region 18 are formed in this silicon single crystal layer. A gate electrode 14 is formed on a channel region 9 formed between a source region 16 and a drain region 18 with a gate oxide film 8 interposed therebetween.

As described above, in the conventional SOI structure MOS transistor, the gate electrode is formed only on the upper surface of the channel region.

[Problem to be solved by the invention] If the gate electrode is formed only in a part of the channel region, as in the conventional 5OI4@distant MOS) transistor, the potential in the channel region cannot be efficiently controlled by the gate. However, when R411 is used, there is a problem that a large current cannot flow.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device that can efficiently control the potential in a channel region and allow a large current to flow even when the device is miniaturized, and a method for manufacturing the same.

[Means for Solving the Problem] The above object is to provide an insulating film formed on a semiconductor substrate, a source region and a drain region formed on the insulating film,
In the semiconductor device, the semiconductor device includes a channel region formed between the source region and the train region on the insulating film, and a gate electrode formed on the channel region via a gate oxide film, the gate oxide film comprising: This is achieved by a semiconductor device characterized in that the gate electrode is formed in contact with the periphery of the channel region, and the gate electrode is formed in contact with the periphery of the gate oxide film.

Further, the above purpose is to form an insulating film on the upper surface of a semiconductor substrate,
removing a portion of the insulating film in the region where the gate is to be formed, bonding a silicon layer to the upper surface of the insulating film to form a cavity in the region where the gate is to be formed, and removing a part of the silicon layer above the cavity; exposing the periphery of the silicon layer in the gate formation area, oxidizing the surface of the silicon layer to form a gate oxide film in contact with the periphery of the silicon layer, and forming a gate oxide film in contact with the periphery of the gate oxide film. This is achieved by a method for manufacturing a semiconductor device characterized by forming a gate electrode.

Furthermore, the above object is to form a concave portion by etching away a region where a gate is to be formed on the upper surface of the semiconductor substrate, to form a cavity in the region where the gate is to be formed by bonding a silicon layer to the upper surface of the semiconductor substrate, and to form a cavity in the region where the gate is to be formed by etching the silicon layer on the upper surface of the semiconductor substrate. By removing a portion of the silicon layer, the periphery of the silicon layer in the region where the gate is to be formed is exposed, and the surface of the silicon layer is oxidized to form a gate oxide film in contact with the periphery of the silicon layer. 5. Forming a gate electrode in contact with the periphery of the gate oxide film.

[Function] According to the present invention, it is possible to easily control the potential in the channel region, and even if a small element is miniaturized, a large current can flow.

[Example] A semiconductor device according to a first example of the present invention will be described with reference to FIG.

1A is a perspective view of a semiconductor device according to a first embodiment of the present invention, and FIG. 1B is a sectional view taken along line AA in FIG.

A channel region 9 is formed between source region 16 and drain region 18, and gate oxide film 8 is formed around and in contact with channel region 9. Around the gate oxide film 8, there is a gate voltage Ii! i4 is formed.

The gate electrode 14 is formed by being half-buried in the isolation oxide film 10 of the silicon substrate 1--, and is formed parallel to the substrate surface of the semiconductor substrate 1.

As shown in FIG. 9B, the silicon forming the channel region 9 and the gate oxidation formed around it! I!
8 has a bridge shape floating in the gate electrode 14 with respect to the isolation oxide film 10.

The silicon layer 4 is a silicon layer generated during the manufacturing stage and has no important meaning in this embodiment.

In this way, in the case of the semiconductor device of this example, since the gate electrode is provided so as to surround the bridge-shaped silicon, the effective area can be increased.
Channel potential can be controlled efficiently. Furthermore 5OI41
11, there is no short channel effect and element isolation can be easily achieved.

FIG. 2 is a cross-sectional view of the manufacturing process of the conductor device according to the first embodiment of the present invention.

Silicone heavy plate 1.1. Moreover, 1 N natural oxidation! ! ! 2 [After that, buttering and silicon thermal oxidation Wi
42 is partially etched away to form a region 5 where a gate is to be formed. Next, a silicon substrate is bonded to the negative side of the substrate, and a cavity 6 is formed in the region 5 where a gate is to be formed. Next, the silicon substrate is polished to form a thin film and a silicon layer 4 is formed (FIG. 4(a)).

Next, the silicon N4 in the cavity 6''-1 was photo-photographed.
A portion of the silicon layer is removed by etching, the cavity 6 is opened 11, and a silicon layer having a bridge shape is formed in a direction perpendicular to the plane of the paper in the figure.

A gate oxide WIA8 is formed by oxidizing this bridge-shaped silicon layer. At the same time, the entire surface of the silicon substrate 1 in the silicon layer 4 and the gate formation area 5 is oxidized to form an isolation oxide WA10 (see FIG.
IX))).

Next, using the CVD method, polysilicon 12 is deposited over the entire upper surface of the substrate including the region 5 where the gate is to be formed. Next, impurities are doped into this polysilicon 12 using an ion implantation method to lower the resistance (FIG. 4(C)).

Leaving the polysilicon 12 only in the area 5 where the gate will be formed,
The gate electrode 14 is formed by etching. Ion implantation is performed using the gate electrode 14 as a "?" layer to form source and drain regions.

Thereafter, the semiconductor device is completed by opening contact holes and wiring the electrodes.

FIG. 3 is a cross-sectional view of the first manufacturing step of a semiconductor device according to a second embodiment of the present invention.

This example describes the manufacturing 1 of a semiconductor device in the first example.
In this step, the - part of the silicon substrate 1 is etched away without forming silicon thermal oxidation M2 to form a recessed part and a cavity 6 is formed.

The upper surface of the silicon substrate 1 is buttered, and the silicon substrate 1 is
Etch and remove the silicon in the area 5 where the gate will be formed on the soil surface to form a recess. 6. Next, attach the silicon substrate to the top surface of the substrate and form a cavity 6 in the area 15 where the gate will be formed. 0. Next, polish the silicon substrate. The silicon layer 4 is formed by thinning the silicon layer 1 (FIG. 1(a)).

Next, a portion of the silicon layer 4 on the cavity 6 is etched away by a photo process to open the cavity 6 and form a silicon layer having a bridge shape in the direction perpendicular to the plane of the paper in the figure.

A gate oxide film 8 is formed by oxidizing this bridge-shaped silicon layer. At the same time, the entire surface of the silicon substrate 1 in the silicon layer 4 and the gate formation area 5 is oxidized to form an isolation oxide film 10 (FIG. 2(b)).
.

Next, using the CVD method, polysilicon 12 is deposited on the entire upper surface of the substrate including the gate formation area 5. Next, this polysilicon 12 is doped with impurities using an ion implantation method to lower the resistance ( Same figure (C)).

Etching is performed, leaving polysilicon 12 only in region 5 where gate formation is planned, to form gate electrode 14. Ion implantation is performed using the gate electrode 14 as a mask to form source and drain regions.

Thereafter, contact holes are opened and electrode wiring is performed to complete the semiconductor device.

The present invention is not limited to the above embodiments, and various modifications are possible.

For example, in the above embodiment, polysilicon 1 is deposited on the entire upper surface of the substrate including the gate formation area 5 using the CVD method.
2 was deposited and then doped with impurities using an ion implantation method, but the impurities may also be doped using a diffusion method.

Alternatively, doped polysilicon may be deposited using a CVD method.

[Effects of the Invention] As described above, according to the present invention, an element having a large current driving ability can be easily manufactured with good uniformity even if the element is miniaturized. Furthermore, since extremely small channels can be formed, it can also be used as a quantum effect device.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a manufacturing process diagram of a semiconductor device according to a first embodiment of the present invention, and FIG. 3 is a diagram showing a second embodiment of the present invention. FIG. 4 is a diagram illustrating a conventional semiconductor device. In the figure, 1...Silicon substrate 2...Silicon thermal oxide film 4...Silicon layer 5...Gate formation area 6...Cavity 8...Gate oxide film 9...Channel region 10 ... Isolation oxide film 12 ... Polysilicon 14 ... Gate electrode 16 ... Source region 18 ... Drain region (b"1) Figure 1 shows
Figure 2: Manufacturing process diagram of a semiconductor device according to the first example of the present invention Figure 2: Second 5# of the present invention! Direct manufacturing process diagram for semi-441 steel by l 3 fig.

Claims (1)

[Claims] 1. An insulating film formed on a semiconductor substrate, a source region and a drain region formed on the insulating film, and an insulating film formed between the source region and the drain region on the insulating film. In the semiconductor device, the gate oxide film is formed in contact with the periphery of the channel region, and the gate electrode includes: A semiconductor device, characterized in that the semiconductor device is formed in contact with the periphery of the gate oxide film. 2. forming an insulating film on the upper surface of the semiconductor substrate; removing a portion of the insulating film in the region where the gate is to be formed; bonding a silicon layer to the upper surface of the insulating film to form a cavity in the region where the gate is to be formed; By removing a portion of the silicon layer above, the periphery of the silicon layer in the region where the gate is to be formed is exposed, and the surface of the silicon layer is oxidized to form a gate oxide film in contact with the periphery of the silicon layer. and forming a gate electrode in contact with the periphery of the gate oxide film. 3. Etching and removing the gate formation area on the top surface of the semiconductor substrate to form a recess, bonding a silicon layer to the top surface of the semiconductor substrate to form a cavity in the gate formation area, and removing the silicon layer on the cavity. exposing the periphery of the silicon layer in the region where the gate is to be formed by removing a portion; oxidizing the surface of the silicon layer to form a gate oxide film in contact with the periphery of the silicon layer; and oxidizing the gate. A method for manufacturing a semiconductor device, comprising forming a gate electrode in contact with a periphery of a film.