JPH04107980U - Closed-capture broadcast receiver - Google Patents

Abstract

(57) [Summary] [Purpose] Capture caption data of closed caption broadcasting into a shift register without any omissions. [Structure] The present invention is a closed caption broadcast receiving device that decodes caption data multiplexed into a television signal and displays text information on a television screen, and extracts caption data from the television signal. a first integrated circuit comprising a slice circuit for taking out caption data from the slice circuit; a shift register for taking in caption data from the slice circuit; a second integrated circuit for taking in and decoding caption data from the shift register;
It consists of an integrated circuit.

Description

[Detailed explanation of the idea]

0001

[Industrial application field]

This invention is based on closed-caption broadcasting for deaf people conducted in the United States. This is related to improvements in receiving equipment, especially closed captioning that is suitable for IC implementation. The present invention relates to a broadcast receiving device.

0002

[Conventional technology]

Conversations and announcements during TV broadcasts are displayed on the TV screen for the deaf and hard of hearing. Closed caption broadcasting that is displayed as subtitles (CLOSED CAPTIO) N) is being carried out in the United States. This is similar to teletext broadcasting in Japan. Yes, data is transmitted superimposed on the vertical retrace period of the video signal. of said data Transmission is by code method, and when displaying characters, a character generator (cabinet) is installed inside the receiver. Prepare a character generator) and prepare the characters. As a result, the broadcast station It is possible to display it instantly just by sending a code. The display mode is There are two main types: text mode (TEXT MODE) and capsule mode. There is a CAPTION MODE. In text mode, the TV screen It is possible to display up to 15 lines x 32 characters in the center of the screen, and in caption mode. In the above display range, that is, between columns 1 to 4 and columns 12 to 15. It is possible to display only the interval. Closed caption broadcast data is It is superimposed on the 21st H (H is the horizontal scanning period) of the previous period, and that part is enlarged. The diagram is as shown in FIG. 2. The 21H composite signal shown in Figure 2 (a) is 3.58MH z color burst signal, 503KHz run-in clock, and caption The caption data consists of 3-bit data as shown in Figure 2 (b). Start bit of bit, 7 bits of data, parity bit of the data, 7 bits , and the parity bit of the data. Parity in Figure 2 (b) 8-bit data (1 byte) containing bits is taken as one unit, and the character code described above is In addition, commands that determine the position (row and column) and color of the character are transmitted. There is.

0003 As a receiver for this closed caption broadcasting, something like the one shown in Figure 3 can be considered. It will be done. Television broadcast signal with closed caption broadcast data superimposed on it is received by the antenna (101) in Fig. 3 and tuned by the tuner (102). , and are amplified and detected by an IF (intermediate frequency) amplification circuit (103). Detected video The signal is processed by a Y/C (luminance/chroma) processing circuit (104) and then sent to the R.C. G. B The primary color signal of R. G. It is applied to the B switching circuit (105).

0004 Also, the video signal from the IF amplifier circuit (103) is captured by a sampling circuit (106). Only the option data is extracted and the data and clock are sent to the decoder (107). applied. The decoder (107) performs a parity check on caption data. Performs display judgment, decoding, etc. The decoded caption data is The voltage is applied to the generator (108) and processed so that the desired character can be displayed at the desired position. be done. Then, according to the process, the R. G. B primary color signal is generated, and the R. G. Mark on B switching circuit (105) The caption text will be displayed on the original TV screen. Decoder (1 07), when performing processing such as decoding, It is necessary to read caption data at an appropriate speed. Therefore, the caption A means to temporarily store data is required, and the decoder (107) contains 16 bits. A shift register (110) is built-in.

[0005]

[Problem that the idea aims to solve]

When converting the circuit of FIG. 3 into an IC, a sampling circuit (106) and a decoder (107) are separately integrated into ICs. A bypass circuit is used to configure the extraction circuit (106). A polar type IC is suitable, and a MOS type is suitable for configuring the decoder (107). This is because IC is suitable. In this way, when creating two ICs with different structures, M For the input voltage of the OS type IC, a relatively large amplitude signal such as 5V is applied. It is necessary to set the output current of the sampling circuit (106) to a value that meets the standard. be. Therefore, the sampling circuit (106) is required to output the clock and data. It is necessary to flow. Also, the clock and data are very high frequency signals. be. In this way, signals with high frequencies and high levels must be transmitted between ICs. Must be. However, between ICs, between the pin and ground, or when the IC is attached Since there is capacitance on the printed circuit board, the slew rate of the transmitted signal deteriorates, resulting in In the bad case, there was a problem that the signal would be lost.

[0006]

[Means to solve the problem]

The present invention has been developed in view of the above-mentioned points, and the present invention has been developed in view of the above points. Caption data is decoded and text information is displayed on the TV screen. A closed caption broadcast receiving device that converts a television signal into a closed caption broadcast receiver. A slice circuit that extracts and retrieves the slice data, and a capacitor from the slice circuit. a first integrated circuit comprising: a shift register that takes in operation data; a second integrated circuit that captures and decodes caption data from the register; It is characterized by having the following.

[0007]

[Effect]

According to the present invention, the shift register for temporarily storing caption data is It is built into the integrated circuit for data extraction. Therefore, signals transmitted between integrated circuits frequency can be significantly lowered. Also, there is a collection for decoding clock signals. By generating data from an integrated circuit, data can be generated at any timing of the integrated circuit. It can be decoded.

[0008]

【Example】

FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which (1) shows an IF amplifier circuit (103). a separation circuit (2) that separates the horizontal and vertical synchronization signals from the television signal from the , a PLL circuit (3) that locks to the horizontal synchronization signal from the separation circuit (2), and Counts the output of the LL circuit (3) as a clock and resets it according to the vertical synchronization signal a counter (4) that is output, and a caption decoder according to the output signal of the counter (4) A slice circuit (5) that slices and extracts the data, and a slice circuit (5) that slices and extracts the data. 16-bit shift register (6) that temporarily holds the caption data of and (7) a key from the 16-bit shift register (6). A capture circuit (8) that captures caption data, and a capture circuit (8) that captures caption data. a decoding circuit (9) that decodes option data and a clock signal source (10) A second integrated circuit comprising:

In FIG. 1, circuit elements that are the same as those in FIG. 3 are denoted by the same reference numerals, and explanations thereof will be omitted. The video signal from the IF amplifier circuit (103) is applied to the separation circuit (2), where the horizontal synchronization signal and vertical synchronization signal are separated and applied to the PLL circuit (3) and the counter (4). is applied to the slice circuit (5). The PLL circuit (3) clocks the horizontal synchronization signal, and a signal with a frequency f _H (horizontal synchronization signal frequency) is applied to the counter (4) as a clock signal. Further, the counter (4) is reset by the vertical synchronizing signal, generates a gate pulse for extracting the 21H caption data, and applies it to the slice circuit (5). The slicing circuit (5) slices and extracts the 21H-th caption data in the video signal based on the 503 KHz run-in clock, and transfers the 2-byte (16-bit) data as shown in Figure 2 (b) to a 16-bit shift register. (6) is applied serially. The 16-bit shift register (6) takes in the data in response to a 503 KHz clock signal from the PLL circuit (3). The size of this input data may be an appropriate signal level inside the first integrated circuit (1), as well as a throughput between circuit blocks (between the slice circuit (5) and the 16-bit shift register (6)). No need to consider rates. Therefore, data can be stably captured even if the data and clock frequencies are high.

0010 On the other hand, the data stored in the 16-bit shift register (6) is transferred to the second integration circuit. (7) is read by the clock signal from the internal clock signal source (10) . The reading speed is sufficiently slow compared to writing, so the frequency of the clock signal is The numbers are low. Therefore, it is read out using a low frequency clock signal. The captured caption data is printed from the first integrated circuit (1) to the second integrated circuit (7). will be added. The capacitor is read out using a low frequency clock signal. The frequency of the application data is also correspondingly lower. Therefore, the output pin and input pin There is no need to consider the effect of slew rate between the

[0011] Therefore, according to the circuit shown in Figure 1, caption data can be stably processed without data loss. can be transferred from the first integrated circuit (1) to the second integrated circuit (7), and the correct Data can be decoded accurately.

0012

[Effect of the idea]

As described above, according to the present invention, caption data can be stably transferred to a shift register. It can be incorporated into. Also, according to the present invention, a second accumulation for decoding Caption data is imported according to the output clock signal of the circuit. Therefore, the caption data is downloaded at the optimal timing required by the second integrated circuit. I can run the code.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a closed caption broadcast receiving apparatus according to the present invention.

FIG. 2 is a waveform diagram for explaining closed caption broadcasting.

FIG. 3 is a block diagram of a conventional closed caption broadcast receiving device.

[Explanation of symbols]

(1) First integrated circuit (5) Slice circuit (6) 16-bit shift register (7) Second integrated circuit

Claims (2)

[Scope of utility model registration request] [Claim 1] A closed caption broadcast receiving device that decodes caption data multiplexed on a television signal and displays text information on a television screen, the device extracting caption data from the television signal. A first integrated circuit including a slice circuit to take out, a shift register to take in caption data from the slice circuit, and a second integrated circuit to take in and decode caption data from the shift register. A closed caption broadcast receiving device. 2. The closed caption broadcast receiving apparatus according to claim 1, wherein the read clock of the shift register is applied from the second integrated circuit to the first integrated circuit.