JPH04105313A - Manufacture of quantum box - Google Patents

Manufacture of quantum box

Info

Publication number
JPH04105313A
JPH04105313A JP22292790A JP22292790A JPH04105313A JP H04105313 A JPH04105313 A JP H04105313A JP 22292790 A JP22292790 A JP 22292790A JP 22292790 A JP22292790 A JP 22292790A JP H04105313 A JPH04105313 A JP H04105313A
Authority
JP
Japan
Prior art keywords
layer
laminated
wire pattern
atom
quantum box
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22292790A
Other languages
Japanese (ja)
Inventor
Nobukazu Takado
高堂 宣和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22292790A priority Critical patent/JPH04105313A/en
Publication of JPH04105313A publication Critical patent/JPH04105313A/en
Pending legal-status Critical Current

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  • Recrystallisation Techniques (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To obtain a manufacturing method of a quantum box which has fineness sufficient to make quantum effect explicit and is free from working damage, by a method wherein a semiconductor substrate surface having an atom step is selectively eliminated by maskless etching, a wire pattern is formed, and semiconductors whose compositions are different in the inclination direction are laminated along the wire pattern. CONSTITUTION:At least the following are contained; a process wherein the surfaces of semiconductor substrates 10, 11 having atom steps are selectively eliminated by maskless etching, and a wire pattern 14 having an atom step is formed, and a process wherein semiconductors 15, 16 whose compositions are different in the inclination direction of the above atom step are laminated along the wire pattern 14. For example, an AlAs layer 11 is laminated on a (001) GaAs substrate 10 off by 2 deg. in [-110] direction, and while supplying Cl2 12, a convergent electron beam 13 is so projected on the AlAs layer 11 that the wire pattern 14 is left, thereby performing maskless etching. Next, 1/2 atom layer of a GaAs layer 15 is laminated, and then 1/2 layer of an AlAs layer 16 are laminated. By repeating the lamination, a three-dimensional superlattice of a (GaAs)1/2 (AlAs)1/2 is formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は量子効果デバイスの製造方法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a quantum effect device.

〔従来の技術〕[Conventional technology]

電子を3次元的に閉じ込める3次元超格子(量子箱)は
製作か困難であるため報告例は少ないか、有機金属気相
成長法(MOVPE法)、ホロクラフィク・リソグラフ
ィー、ウェットエツチング、液相成長法(LPE法)に
よる再成長技術を用いてpn接合とオプティカル・ガイ
ド構造を備えたInGaAs/InP量子箱構造をIn
上た例がジャパニーズ・ジャーナル・オブ・アプライド
 フィジックス(Japanese Journal 
of AppliedPhysics)第26巻4号、
1987年、L225−227にある。この例では、3
次元量子サイズ効果として発光波長のシフトが観測され
ていることが報告されている。
Three-dimensional superlattices (quantum boxes) that confine electrons three-dimensionally are difficult to fabricate, so there are few reports, or metal-organic vapor phase epitaxy (MOVPE), holographic lithography, wet etching, and liquid phase epitaxy. An InGaAs/InP quantum box structure with a pn junction and an optical guide structure was fabricated using regrowth technology (LPE method).
The above example is the Japanese Journal of Applied Physics.
of Applied Physics) Volume 26 No. 4,
1987, L225-227. In this example, 3
It has been reported that a shift in emission wavelength has been observed as a dimensional quantum size effect.

〔発明が解決りようとする課題〕[Problem that the invention seeks to solve]

しかしながら、現状ではウェットエツチング等を用いて
いるために量子箱のサイズや界面の急峻性等に問題か有
り完全な量子箱は実現されていない。
However, since wet etching is currently used, there are problems with the size of the quantum box, the steepness of the interface, etc., and a perfect quantum box has not been realized.

本発明の目的は、量子効果を顕在化させるに十分な微細
度を有し、かつ加工ダメージかない量子箱の製造方法を
提供することにある。
An object of the present invention is to provide a method for manufacturing a quantum box that has sufficient fineness to make quantum effects apparent and is free from processing damage.

〔課題を解決するための手段〕[Means to solve the problem]

本発明による量子箱の製造方法は、原子ステップを有す
る半導体基板表面をマスクレスエツチングにより前記原
子ステップを選択的に除去して原子ステップを有する細
線パターンを形成する工程と、前記原子ステップの傾斜
方向に組成の異なる半導体を前記細線パターンに沿って
積層する工程とを少くとも含むことを特徴とする製造方
法である。
A method for manufacturing a quantum box according to the present invention includes a step of selectively removing the atomic steps on the surface of a semiconductor substrate having atomic steps by maskless etching to form a thin line pattern having the atomic steps, and a step of forming a thin line pattern having the atomic steps; The manufacturing method is characterized in that it includes at least the step of: laminating semiconductors having different compositions along the thin line pattern.

〔作用〕[Effect]

本発明では、マスクレスエツチングにより原子ステップ
を有する数100人幅の細線を形成し、さらにこの細線
上に有機金属気相成長法等を用いたステップ・フロー成
長と行う事によって、数100人幅の細線内に100Å
以下の周期構造、言い替えれは3次元超格子構造を作製
することかできる。従って本発明によれば、原子ステッ
プを有する半導体基板上にステップ・フロー成長を行う
だけで従来作製困難な3次元超格子(量子箱)構造が得
られる。
In the present invention, a thin line with a width of several hundreds of nanometers having atomic steps is formed by maskless etching, and then step-flow growth using metal organic vapor phase epitaxy or the like is performed on this thin line. 100Å within the thin line of
The following periodic structure, in other words, can produce a three-dimensional superlattice structure. Therefore, according to the present invention, a three-dimensional superlattice (quantum box) structure, which is conventionally difficult to produce, can be obtained by simply performing step-flow growth on a semiconductor substrate having atomic steps.

〔実施例〕〔Example〕

以下、図面を用いて本発明の実施例を詳細に説明する。 Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図は本発明の第一の実施例を説明する量子箱の製造
方法の工程説明図である。第1図(a)に示すように、
rx1o]方向へ2°オフした(001 )GaAs基
板10に有機金属気相成長法により200人厚0圧lA
slAs全11した。
FIG. 1 is a process explanatory diagram of a method for manufacturing a quantum box explaining a first embodiment of the present invention. As shown in Figure 1(a),
A (001) GaAs substrate 10 with a 2° off angle in the direction of
There were 11 slAs in total.

この時、積層したAlAslAs全11は下地基板と同
じく2°オフに対応する80人間隔の原子ステップを有
する。次に第1図(b)の如く、AlAslAs全11
したGaAs基板10の基板温度を65°Cとしてガス
圧lX1O−5Torrの塩素ガス(C12)12を供
給しなから5KeVの集束電子ヒーム13を、AlAs
lAs全110人幅の細線パターン14が残るように照
射してマスクレスエツチングを行った。この時、前記G
aAs基板10上で[110]方向に電子ヒームのドー
ズ量を1μmあたりOから2.6X1017C11−2
へ変化させて前記マスクレスエツチングを行い、細線パ
ターン14以外の原子ステップを除去した。このように
して形成した細線パターン14に、有機金属気相成長装
置を用いて成長速度0.5人/ s e cでGaAs
層15を1/2原子層、次いで0.5人/ s e c
でAlAs層16を1/2原子層それぞれ積層した。こ
れを繰り返して第1図(c)に示すように層厚200人
、周期が80人の(GaAs ) l/2  (A I
 As ) l/23次元超格子を作製した。この時の
有機金属気相成長はトリエチルアルミニウム(TEA)
、)リエチルガリウム(TEG)、アルシン(AsH3
)を原料とし、基板温度600 ’Cで行った。尚、子
ステップでないとこには混晶層17か形成された。この
陵、有機金属気相成長装置を用いてGaAs基板10の
全面にAlAslAs全1800人、さらにキャップ層
としてGaAs層19を500人積層上た。これにより
第1図(d)に示すような量子箱が形成できた。
At this time, all the laminated AlAslAs 11 have 80 atomic steps corresponding to 2° off, like the base substrate. Next, as shown in Figure 1(b), all 11 AlAslAs
The substrate temperature of the GaAs substrate 10 was set at 65°C, chlorine gas (C12) 12 at a gas pressure of 10-5 Torr was supplied, and a focused electron beam 13 of 5 KeV was applied to the AlAs substrate.
Maskless etching was performed by irradiating lAs so that a fine line pattern 14 having a total width of 110 lines remained. At this time, the G
The dose of the electron beam in the [110] direction on the aAs substrate 10 was varied from O to 2.6X1017C11-2 per 1 μm.
The above-mentioned maskless etching was performed to remove the atomic steps other than the thin line pattern 14. The thin line pattern 14 thus formed is coated with GaAs at a growth rate of 0.5 persons/sec using a metal organic vapor phase growth apparatus.
Layer 15 is 1/2 atomic layer, then 0.5 people/sec
The AlAs layer 16 was laminated to have a thickness of 1/2 atomic layer. By repeating this process, as shown in Figure 1(c), the layer thickness was 200 and the period was 80.
As ) l/2 three-dimensional superlattice was created. At this time, the organometallic vapor phase epitaxy is triethylaluminum (TEA).
) ethyl gallium (TEG), arsine (AsH3
) was used as a raw material, and the substrate temperature was 600'C. Incidentally, a mixed crystal layer 17 was formed in areas other than child steps. A total of 1,800 layers of AlAslAs were deposited on the entire surface of the GaAs substrate 10 using a metal organic vapor phase epitaxy apparatus, and a further 500 layers of GaAs layer 19 were deposited as a cap layer. As a result, a quantum box as shown in FIG. 1(d) was formed.

第2の実施例として、第1の実施例のマスクレスエツチ
ングで集束電子ヒームの代わりにGaの集束イオンビー
ムを用いても同様の量子箱が形成できた。
As a second example, a similar quantum box could be formed by using a Ga focused ion beam instead of the focused electron beam in the maskless etching of the first example.

本実施例ではAlAsとGaAsの成長の周期m、nを
1/2原子層ずつにしたがm+n=1を満たせば1/2
原子層以外でもよい。
In this example, the growth periods m and n of AlAs and GaAs are set to 1/2 atomic layer each, but if m+n=1 is satisfied, then
It may be other than an atomic layer.

本実施例ではGaAs系のAlAs、GaAsによる3
次元超格子を作製したが、InP系等他の材料系にも適
用可能であり、結晶成長法としては有機金属気相成長法
の例を示したが、その他の結晶成長法、例えば有機金属
分子線エピタキシャル成長法、原子層エピタキシャル成
長法等にも適用できる。
In this example, GaAs-based AlAs, 3
Although we have created a dimensional superlattice, it can also be applied to other material systems such as InP, and although we have shown an example of organometallic vapor phase epitaxy as a crystal growth method, other crystal growth methods, such as organometallic molecules, can also be applied. It can also be applied to line epitaxial growth methods, atomic layer epitaxial growth methods, etc.

また本実施例では半導体基板として(001,)面を用
いたか、他の面方位を用いても良い。
Further, in this embodiment, the (001,) plane is used as the semiconductor substrate, but other plane orientations may be used.

〔発明の効果〕〔Effect of the invention〕

本発明による量子箱の製造方法では、結晶作製時に3次
元構造を作り付けることができるため加工ダメージのな
い3次元超格子(量子箱)構造が作製できる。
In the method for manufacturing a quantum box according to the present invention, a three-dimensional structure can be created during crystal production, so a three-dimensional superlattice (quantum box) structure without processing damage can be manufactured.

また本発明は、レジストマスクのフォトリソグラフィに
伴なう現像液によるウェット処理を必要としないのでマ
スクレスエツチングからステップ・フロー選択成長まで
真空−貫プロセスで行うことができ、特に化合物半導体
には表面の大気からの汚染を回避でき有効である。
Furthermore, since the present invention does not require wet processing using a developer that accompanies resist mask photolithography, it is possible to perform everything from maskless etching to step-flow selective growth using a vacuum-through process. It is effective in avoiding pollution from the atmosphere.

細線パターン、15・・・ステ・ツブ フロー成長によ
るG a A s層、16 ・ステ・ツブ フロー成長
によるAlAs層、17 、、、混晶層、18− A 
I A s層、19− G a A s層。
Fine line pattern, 15...G a As layer by step-tube flow growth, 16 - AlAs layer by step-tube flow growth, 17...Mixed crystal layer, 18-A
IAs layer, 19-GaAs layer.

Claims (1)

【特許請求の範囲】 1、原子ステップを有する半導体基板表面をマスクレス
エッチングにより前記原子ステップを選択的に除去して
原子ステップを有する細線パターンを形成する工程と、
前記原子ステップの傾斜方向に組成の異なる半導体を前
記細線パターンに沿って積層する工程とを少くとも含む
ことを特徴とする量子箱の製造方法。 2、マスクレスエッチングは、反応性ガスもしくはラジ
カル雰囲気中で集束電子ビームを半導体基板表面に照射
して行う特許請求の範囲第1項に記載の量子箱の製造方
法。 3、マスクレスエッチングは反応性ガスもしくはラジカ
ル雰囲気中で集束イオンビームを半導体基板表面に照射
して行う特許請求の範囲第1項に記載の量子箱の製造方
法。
[Claims] 1. Selectively removing the atomic steps on the surface of a semiconductor substrate having atomic steps by maskless etching to form a thin line pattern having atomic steps;
A method for manufacturing a quantum box, comprising at least the step of laminating semiconductors having different compositions in the direction of inclination of the atomic steps along the thin line pattern. 2. The method for manufacturing a quantum box according to claim 1, wherein the maskless etching is performed by irradiating the surface of the semiconductor substrate with a focused electron beam in a reactive gas or radical atmosphere. 3. The method for manufacturing a quantum box according to claim 1, wherein the maskless etching is performed by irradiating the surface of the semiconductor substrate with a focused ion beam in a reactive gas or radical atmosphere.
JP22292790A 1990-08-24 1990-08-24 Manufacture of quantum box Pending JPH04105313A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22292790A JPH04105313A (en) 1990-08-24 1990-08-24 Manufacture of quantum box

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22292790A JPH04105313A (en) 1990-08-24 1990-08-24 Manufacture of quantum box

Publications (1)

Publication Number Publication Date
JPH04105313A true JPH04105313A (en) 1992-04-07

Family

ID=16790045

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22292790A Pending JPH04105313A (en) 1990-08-24 1990-08-24 Manufacture of quantum box

Country Status (1)

Country Link
JP (1) JPH04105313A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296390A (en) * 1990-04-09 1994-03-22 Fujitsu Limited Method for fabricating a semiconductor device having a vertical channel of carriers
WO1994023445A1 (en) * 1993-04-07 1994-10-13 Hitachi, Ltd. Method and apparatus for forming fine structure
CN111934200A (en) * 2020-08-20 2020-11-13 湖南科莱特光电有限公司 Vertical III-V group superlattice material, InGaAsSb quaternary alloy with superlattice distribution and preparation method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296390A (en) * 1990-04-09 1994-03-22 Fujitsu Limited Method for fabricating a semiconductor device having a vertical channel of carriers
WO1994023445A1 (en) * 1993-04-07 1994-10-13 Hitachi, Ltd. Method and apparatus for forming fine structure
CN111934200A (en) * 2020-08-20 2020-11-13 湖南科莱特光电有限公司 Vertical III-V group superlattice material, InGaAsSb quaternary alloy with superlattice distribution and preparation method
CN111934200B (en) * 2020-08-20 2021-10-15 湖南科莱特光电有限公司 Vertical III-V group superlattice material, InGaAsSb quaternary alloy with superlattice distribution and preparation method

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