JPH0410434U - - Google Patents
Info
- Publication number
- JPH0410434U JPH0410434U JP5178890U JP5178890U JPH0410434U JP H0410434 U JPH0410434 U JP H0410434U JP 5178890 U JP5178890 U JP 5178890U JP 5178890 U JP5178890 U JP 5178890U JP H0410434 U JPH0410434 U JP H0410434U
- Authority
- JP
- Japan
- Prior art keywords
- frequency dividing
- oscillation
- frequency
- dividing means
- circuit section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
Description
第１図は本考案によるクロツク出力回路装置の
実施例の構成を示すブロツク図である。第２図は
発振パルス及び各出力端子Ａ，Ｂ，Ｃに出力され
るクロツクパルスの波形を示すタイミングチヤー
トである。第３図は従来のクロツク出力回路装置
の構成を示すブロツク図である。
符号の説明、１……水晶発振子、２，３……コ
ンデンサー、４，５……インバータ回路、６……
第１段分周回路、７……第２段分周回路、８……
第３段分周回路、９……マルチプレクサ、Ａ，Ｂ
，Ｃ……出力端子、Ｔ……テスト用端子。
FIG. 1 is a block diagram showing the structure of an embodiment of a clock output circuit device according to the present invention. FIG. 2 is a timing chart showing waveforms of oscillation pulses and clock pulses output to each output terminal A, B, and C. FIG. 3 is a block diagram showing the configuration of a conventional clock output circuit device. Explanation of symbols, 1... Crystal oscillator, 2, 3... Capacitor, 4, 5... Inverter circuit, 6...
1st stage frequency divider circuit, 7... 2nd stage frequency divider circuit, 8...
3rd stage frequency divider circuit, 9...Multiplexer, A, B
, C... Output terminal, T... Test terminal.
Claims (1)
発振パルスを所定周波数のクロツクパルスに変換
すべき分周回路部とを備えたクロツク出力回路装
置において、 前記分周回路部には前記発振パル
スが順次通過すべき複数の分周手段が設けられ、
これらの分周手段のうち少なくとも一組の分周手
段間に、前記発振回路部から出力される発振パル
スと前段の分周手段から出力されるクロツクパル
スとを端子入力に応じて選択的に後段の分周手段
に入力すべき選択手段を備えていることを特徴と
するクロツク出力回路装置。 (2) 前記選択手段の前段側と後段側に分けられ
若しくは前記選択手段の間に挟まれた分周手段の
分周比、又は複数の分周手段が存在する場合には
それらの分周比の積が、前記分周回路部全体の分
周比に対してほぼ等分配された値となつているこ
とを特徴とする請求項第１項に記載のクロツク出
力回路装置。[Claims for Utility Model Registration] (1) A clock output circuit device comprising an oscillation circuit section that outputs an oscillation pulse and a frequency division circuit section that converts the oscillation pulse into a clock pulse of a predetermined frequency, The circuit section is provided with a plurality of frequency dividing means through which the oscillation pulses sequentially pass,
Between at least one set of frequency dividing means among these frequency dividing means, the oscillation pulse outputted from the oscillation circuit section and the clock pulse outputted from the previous stage frequency dividing means are selectively transmitted to the latter stage according to the terminal input. 1. A clock output circuit device comprising a selection means for inputting to a frequency dividing means. (2) The frequency division ratio of the frequency dividing means that is divided into the front stage side and the rear stage side of the selection means or sandwiched between the selection means, or if there is a plurality of frequency division means, their frequency division ratios. 2. The clock output circuit device according to claim 1, wherein the product of the clock output circuit has a value that is approximately equally distributed with respect to the frequency division ratio of the entire frequency dividing circuit section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5178890U JPH0410434U (en) | 1990-05-18 | 1990-05-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5178890U JPH0410434U (en) | 1990-05-18 | 1990-05-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0410434U true JPH0410434U (en) | 1992-01-29 |
Family
ID=31571527
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5178890U Pending JPH0410434U (en) | 1990-05-18 | 1990-05-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0410434U (en) |
-
1990
- 1990-05-18 JP JP5178890U patent/JPH0410434U/ja active Pending
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