JPH0410429A - Semiconductor device - Google Patents

Abstract

PURPOSE:To alleviate positional deviation due to a stress of a conductor wiring of a semiconductor element by introducing the wiring between a oonductor pad and the element through a roundabout. CONSTITUTION:A semiconductor device is formed of a semiconductor pad 1 and a semiconductor element 2. The element is formed of a base 2b, a collector 2c and an emitter 2e connected with a scribing lane, and roundabout conductor wirings 4a, 5a, 6a and 7a are disposed between the pad 1 and the element 2. Accordingly, even if a rightward stress Fa is applied to the pad 1, it not almost applied to the wiring 4a. Even if a downward stress Fb is applied, the stress is applied directly to the 4a, but the stress is dispersed to the 5a, 6a, and not almost applied to the 7a and the element 2. Thus, the stress due to the positional deviation of the pad 1 is not almost applied to the element 2.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device, and more particularly to a wiring method for a semiconductor integrated circuit.

2. Description of the Related Art Conventionally, when manufacturing a semiconductor integrated circuit device, in order to electrically connect a semiconductor circuit board and a comb with a metal wire, conductive pads are provided on the semiconductor circuit board, and at the same time, conductive pads are provided adjacent to the pads. Therefore, it is widely practiced to arrange semiconductor elements for the purpose of overvoltage protection of semiconductor circuits.

FIG. 7 shows a conventional wiring configuration.

As shown in FIG. 7, the distance between the conductor pad 1 and the adjacent semiconductor element 2 is usually the length of the side of the conductor pad 1 or the collector 2c (or base 2b) of the semiconductor element 2.
Alternatively, they were directly electrically connected by a conductor wiring 4g having a width approximately equal to the width of the emitter 2e).

Problems to be Solved by the Invention In such conventional semiconductor devices, when stress is applied to the conductor pad 1 due to thermal strain due to thermal shock or mechanical strain due to wire bonding, the stress is applied to the conductor wiring. 4g
The configuration was such that the signal was directly transmitted to the collector 2c, base 2b, or emitter 2e of the semiconductor element 2 via the .

Therefore, these stresses cause misalignment of the conductor wiring 4g, causing a short circuit between the collector 2c (or base 2b or collector 2e) and base 2b (or emitter 2e or collector 2c) of the semiconductor element 2, or
Alternatively, even if the circuit is not completely short-circuited, it causes leakage current to flow.

The present invention is intended to solve these drawbacks, and aims to reduce positional displacement due to stress in conductor wiring of a semiconductor element.

Means for Solving the Problem In order to solve this problem, the present invention bypasses the conductor wiring between the conductor pad and the semiconductor element.

Further, all or part of the conductor wiring is provided in a layer different from the conductor pad.

Effect: With this configuration, the misalignment stress applied to the conductor pad is not directly applied to the semiconductor element via the conductor wiring, so short circuits caused by misalignment or misalignment of the conductor wiring provided on the semiconductor element can be avoided. Alternatively, the occurrence of leakage current can be reduced.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to FIG.

As shown in FIG. 1, the semiconductor device of this embodiment is composed of a semiconductor pad 1 and a semiconductor element 2. The semiconductor element consists of a base 2b, a collector 2c, and an emitter 2e connected to a scribe lane (GVD), and is conductive. Between the body pad 1 and the semiconductor element 2, detoured conductor arrangements 4a, 5a,
6a and 7a are the arrangements.

In the conductor wiring having this configuration, even if a stress Fa directed to the left in the figure is applied to the conductor pad 1, almost no stress Fa is transmitted to the portion 4a of the conductor wiring. Also, when downward stress Fb is applied in the figure, direct stress is applied to 4a, but
The stress is dispersed and relaxed in the portions 5a and 6a, and 7
Almost no stress is transmitted to the portion a and the semiconductor element 2.

In this way, according to the semiconductor device of the embodiment of the present invention, stress due to misalignment of the conductive pad 1 is hardly transmitted to the semiconductor element 2. Further, even if the conductor pad 1 and the portion 6a of the conductor wiring are short-circuited due to positional displacement due to stress of the conductor pad 1, there is no change in characteristics.
This can prevent short circuits in the semiconductor element 2 or occurrence of leakage current.

Other embodiments of the invention are shown in FIGS. 2, 3 and 4.

As shown in the figure, various types of conductor wiring for detouring can be considered.

In addition, as shown in FIGS. 5 and 6, the conductor arrangement H8e,
8f is provided in a wiring layer different from the conductor pad 1, and the connecting portion 9
It may also be connected by

Effects of the Invention As is clear from the description of the embodiments above, according to the present invention, the structure is such that almost no stress applied to the conductive pad is transmitted to the semiconductor element, so that the stress applied to the conductive pad is hardly transmitted to the semiconductor element. It is possible to reduce short circuits and leakage current, and improve the performance of semiconductor integrated circuits.

[Brief explanation of drawings]

FIG. 1 is a plan view of a main part of a wiring pattern of an embodiment of a semiconductor device according to the present invention, FIGS. 2 and 3. FIGS. 4, 5, and 6 are plan views of main parts of wiring patterns of other embodiments of the semiconductor device according to the present invention, and FIG. 7 is a plan view of main parts of a conventional wiring pattern. 1...Conductor pad, 2...Semiconductor element, 2b...Base, 2c...Collector, 2e...Emitter, 4. 5.6.7...
...Conductor wiring, 8...Conductor pad and conductor wiring on another wiring layer. Name of agent: Patent attorney Shigetaka Awano (1 person) Figure Figure 5 Figure 6 Figure 7 Figure 3 Figure = 14

Claims (2)

[Claims] (1) A semiconductor device in which a conductor pad and a semiconductor element are provided on a semiconductor substrate, and a detoured conductor wiring is provided between the conductor pad and the adjacent semiconductor element. (2) The semiconductor device according to claim 1, wherein all or part of the conductor wiring is provided in a layer different from the conductor pad.