JPH04103635U - Chip type multilayer ceramic capacitor with fuse - Google Patents
Chip type multilayer ceramic capacitor with fuseInfo
- Publication number
- JPH04103635U JPH04103635U JP1319691U JP1319691U JPH04103635U JP H04103635 U JPH04103635 U JP H04103635U JP 1319691 U JP1319691 U JP 1319691U JP 1319691 U JP1319691 U JP 1319691U JP H04103635 U JPH04103635 U JP H04103635U
- Authority
- JP
- Japan
- Prior art keywords
- fuse
- chip
- multilayer ceramic
- electrode
- type multilayer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003985 ceramic capacitor Substances 0.000 title claims abstract description 23
- 239000011521 glass Substances 0.000 claims abstract description 11
- 229910000679 solder Inorganic materials 0.000 abstract description 9
- 238000005476 soldering Methods 0.000 abstract description 9
- 238000010586 diagram Methods 0.000 description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
(57)【要約】
【目的】 形状とサイズを大きくすることなく、基板回
路上、搭載体積も少なくチップ型積層セラミックコンデ
ンサのメリットを十分生かし、保護回路の必要のない安
全性の高い部品を提供すること。
【構成】 チップの内部電極と接合する外部電極１の片
側にヒューズ２を接続しこの片側の電極をヒューズの引
き出し部を除いた全面に絶縁層となるガラス３で被覆す
る。この表面にヒューズと接続する電極層４を設け最外
層には部品半田付時のための半田層５を形成したヒュー
ズ付チップ型積層セラミックコンデンサ。
(57) [Summary] [Purpose] To provide a highly safe component that does not require a protection circuit by taking full advantage of the advantages of chip-type multilayer ceramic capacitors, which require less mounting space on the circuit board and without increasing the shape and size. to do. [Structure] A fuse 2 is connected to one side of an external electrode 1 which is connected to an internal electrode of a chip, and the entire surface of this one side electrode except for the lead-out portion of the fuse is covered with a glass 3 serving as an insulating layer. This chip type multilayer ceramic capacitor with a fuse has an electrode layer 4 connected to a fuse on its surface, and a solder layer 5 for soldering components on the outermost layer.
Description
【０００１】0001
本考案は、ヒューズ付チップ型積層セラミックコンデンサの構造に関するもの である。 This invention relates to the structure of a chip-type multilayer ceramic capacitor with a fuse. It is.
【０００２】0002
従来この種のチップ型積層セラミックコンデンサは、構造が単純で小型となる ため、搭載体積が小さくできるメリットがあったが積層セラミックコンデンサに おいては、故障モードが短絡となるため、回路上に保護回路を設ける必要があっ た。 Conventionally, this type of chip-type multilayer ceramic capacitor has a simple structure and is small. Therefore, it had the advantage of being able to reduce the mounting volume, but multilayer ceramic capacitors In this case, the failure mode is short circuit, so it is necessary to provide a protection circuit on the circuit. Ta.
【０００３】0003
本考案は、これらの欠点を除くため、チップ型積層セラミックコンデンサ部品 自体にヒューズ機能を付加したもので、チップの外部電極片側にヒューズを接続 し、この片側の電極をヒューズの引き出し部を除いた全面について、ガラスにて 被覆する。さらにこの表面にヒューズと接続する様、電極層を設け、最外層には 半田付のための半田層を設ける。この様な構造のヒューズ付チップ型積層セラミ ックコンデンサは、従来形状と同サイズに設計することが容易で、電極形成後の 量産ラインをそのまま利用できる上に、基板回路上、搭載体積も少なくチップ型 積層セラミックコンデンサのメリットを十分生かすことが可能な保護回路の必要 のない、安全性の高い部品の提供を目的とする。 In order to eliminate these drawbacks, the present invention has developed a chip-type multilayer ceramic capacitor component. It has a fuse function added to itself, and the fuse is connected to one side of the external electrode of the chip. Then, cover the entire surface of the electrode on one side, excluding the fuse lead-out part, with glass. Cover. Furthermore, an electrode layer is provided on this surface to connect with the fuse, and the outermost layer is A solder layer for soldering is provided. Chip-type laminated ceramic with fuse of this kind of structure It is easy to design a capacitor with the same size as a conventional shape, and after electrode formation, The mass production line can be used as is, and the mounting area on the board circuit is small and the chip type Need for a protection circuit that can take full advantage of the benefits of multilayer ceramic capacitors The aim is to provide highly safe parts that are free of defects.
【０００４】0004
本考案は、チップ型積層セラミックコンデンサの外部電極端子にヒューズを接 続し、このヒューズ引き出し部以外の電極部を絶縁層となるガラスでおおい、さ らにこのヒューズと接続する電極層を設け、この表面に基板等への半田付のため の半田層を設けるよう構成したもので、チップ型積層セラミックコンデンサの故 障時、ヒューズの断線により開路状態となる安全機能をもち、かつ、ヒューズを 付けない部品形状とほとんど同じ形状に構成できることにより、量産性が高いこ とを特徴とする。すなわち本考案は、チップ型積層セラミックコンデンサにおい て、外部電極端子にヒューズを接続し、接続した電極面をガラスでおおい絶縁層 とし、さらにこの上に電極を形成し内側電極との間にヒューズ機能をもたせたこ とを特徴とするヒューズ付チップ型積層セラミックコンデンサである。 This invention connects a fuse to the external electrode terminal of a chip-type multilayer ceramic capacitor. Next, cover the electrode part other than this fuse extraction part with glass that will serve as an insulating layer, and then Furthermore, an electrode layer is provided to connect to this fuse, and this surface is used for soldering to a board, etc. It is configured to have a solder layer of It has a safety function that opens when the fuse breaks in the event of a fault, and the fuse Since it can be configured to have almost the same shape as the part that is not attached, mass productivity is high. It is characterized by. In other words, the present invention can be applied to chip-type multilayer ceramic capacitors. Connect a fuse to the external electrode terminal, and cover the connected electrode surface with a glass insulating layer. Furthermore, an electrode is formed on top of this to provide a fuse function between it and the inner electrode. This is a chip-type multilayer ceramic capacitor with a fuse.
【０００５】[0005]
チップ型積層セラミックコンデンサでは、故障モードが短絡となるため、回路 上に保護回路を設ける必要があったがチップ型積層セラミックコンデンサ部品自 体にヒューズを取りつけ、ヒューズ機能をもたせることにより、チップ型積層セ ラミックコンデンサの外部電極片側にヒューズを接続し、ここを絶縁ガラスで被 覆し、この表面にヒューズと接続するために電極層を設けて、半田付のための半 田層を設ける構造とするヒューズ付チップ型積層セラミックコンデンサで、基板 回路上に保護回路を設ける必要がなく、ヒューズ付チップ型積層セラミックコン デンサで搭載体積も少なく、このメリットを十分生かすことができる。 For chip-type multilayer ceramic capacitors, the failure mode is short circuit, so the circuit It was necessary to install a protection circuit on top of the chip-type multilayer ceramic capacitor component. By attaching a fuse to the body and giving it a fuse function, it is possible to create a chip-type multilayer cell. Connect a fuse to one side of the external electrode of the Ramic capacitor and cover it with insulating glass. Then, an electrode layer is provided on this surface to connect with the fuse, and a solder for soldering is provided. This is a chip-type multilayer ceramic capacitor with a fuse, which has a structure with two layers. There is no need to install a protection circuit on the circuit, and the chip type multilayer ceramic capacitor with a fuse Since it is a sensor, the mounting volume is small, and this advantage can be fully utilized.
【０００６】[0006]
本考案によるチップ型積層セラミックコンデンサ断面図を図１に示す。すなわ ち図１は、１が内部電極と接合する外部電極、２がヒューズ、３が絶縁層となる ガラス、４がヒューズと接続する電極層、５が部品半田付時のための半田層等の 構成からなるチップ型積層セラミックコンデンサである。前記チップ型セラミッ クコンデンサの構成は、図２（ａ）に示すように、チップ型セラミックコンデン サの端面に内部電極と接合する外部電極１の銀を、従来方法の焼付法にて形成す る。これに図２（ｂ）に示すようにヒューズ２をスポット溶着にて取付ける。こ のヒューズ２は、部品の基板付温度に耐え、かつ、部品故障によって断線する材 質、太さを選定する必要がある。本実施例ではスズおよびニッケルφ０．１細線 を用いた。図２（ｃ）に示すように次に絶縁層となるガラス３をヒューズ引き出 し部にかからない様マスクし、スパッタリングにて取付ける。このとき下地の電 極がすべて隠れる様にする。このあと図２（ｄ）に示すようにヒューズ線を引き 出しまたはガラス面に沿わせた状態にて接続がとれる様ヒューズと接続する電極 層４を形成する。この電極層はスパッタリングにてＣｎを用いた。図２（ｅ）に 示すようにヒューズの端部６を切断調整してこのままでは部品として基板付性が 悪いため、さらに表面にすず層の部品半田付時のための半田層５をスパッタリン グにて設ける。この場合のすず層は半田付性を確保する目的なので他の方法も適 用できる。ヒューズのつかない片側は、内部電極と接合する外部電極１にヒュー ズと接続する電極層４と部品半田付時のための半田層５のみ同様の方法で設ける 。 FIG. 1 shows a cross-sectional view of a chip-type multilayer ceramic capacitor according to the present invention. Sunawa In Figure 1, 1 is the external electrode that connects to the internal electrode, 2 is the fuse, and 3 is the insulating layer. Glass, 4 is the electrode layer to connect with the fuse, 5 is the solder layer etc. for soldering parts. This is a chip-type multilayer ceramic capacitor consisting of: The chip type ceramic The structure of the capacitor is a chip-type ceramic capacitor, as shown in Figure 2(a). The silver of the outer electrode 1, which is to be bonded to the inner electrode, is formed on the end face of the sensor using the conventional baking method. Ru. A fuse 2 is attached to this by spot welding as shown in FIG. 2(b). child Fuse 2 is made of a material that can withstand the temperature at which the component is attached to the board and that will break if the component fails. It is necessary to select the quality and thickness. In this example, tin and nickel φ0.1 fine wires are used. was used. As shown in Figure 2(c), the glass 3 that will become the insulating layer is then pulled out for the fuse. Mask it so that it does not touch the surface and attach it by sputtering. At this time, the underlying electrical Make sure all the poles are hidden. After this, draw the fuse wire as shown in Figure 2(d). Electrode connected to the fuse so that the connection can be made when it is exposed or along the glass surface. Form layer 4. This electrode layer was made of Cn by sputtering. In Figure 2(e) As shown, the end 6 of the fuse is cut and adjusted, and as it is, it is difficult to attach it to the board as a component. Since the solder layer 5 is bad, we also sputtered a tin layer on the surface for soldering parts. It will be set up in Google. In this case, the purpose of the tin layer is to ensure solderability, so other methods are also suitable. Can be used. On one side without a fuse, a fuse is attached to the outer electrode 1 that connects to the inner electrode. Only the electrode layer 4 to be connected to the wire and the solder layer 5 for soldering the components are provided in the same manner. .
【０００７】[0007]
この様に構成された、ヒューズ付チップ型積層セラミックコンデンサは、部品 の故障異常により、大電流が流れると、外部電極内に設けたヒューズの溶断によ り、回路を開いた状態とする。よって従来の保護回路等必要のない安全性の高い 部品の供給が可能となった。 A chip-type multilayer ceramic capacitor with a fuse constructed in this way is a component If a large current flows due to an abnormality in the and open the circuit. Therefore, it is highly safe and does not require conventional protection circuits. It became possible to supply parts.
【図１】本校案によるヒューズ付チップ型積層セラミッ
クコンデンサの断面図。FIG. 1 is a cross-sectional view of a chip-type multilayer ceramic capacitor with a fuse proposed by our school.
【図２】ヒューズ側電極の構成順に分解した説明図。
（ａ）チップ型積層セラミックコンデンサの端面に外部
電極の銀を焼付法により形成した説明図。
（ｂ）外部電極の銀にヒューズをスポット溶着にて取付
ける説明図。
（ｃ）ガラス層をヒューズ引き出し部にかからない様に
マスクして、スパックリングにて取付けする説明図。
（ｄ）ヒューズと接続する電極層４を形成する説明図。
（ｅ）ヒューズの端部を切断調整する説明図。
（ｆ）ずず層の部品半田付時のための半田層をスパッタ
リングで設ける説明図。FIG. 2 is an explanatory diagram disassembled in the order of configuration of fuse-side electrodes. (a) An explanatory diagram in which silver for external electrodes is formed on the end face of a chip-type multilayer ceramic capacitor by a baking method. (b) An explanatory diagram of attaching a fuse to the silver of the external electrode by spot welding. (c) An explanatory diagram showing how to mask the glass layer so that it does not cover the fuse drawer and attach it using spackling. (d) An explanatory diagram of forming an electrode layer 4 connected to a fuse. (e) An explanatory diagram for cutting and adjusting the end of the fuse. (f) An explanatory view of providing a solder layer by sputtering for soldering parts of a tin layer.
１ 内部電極と接合する外部電極 ２ ヒューズ ３ 絶縁層となるガラス ４ ヒューズと接続する電極層 ５ 部品半田付時のための半田層 ６ ヒューズの端部 1 External electrode connected to internal electrode 2 Fuse 3 Glass that serves as an insulating layer 4 Electrode layer connected to fuse 5 Solder layer for soldering parts 6 Fuse end
Claims (1)
いて、外部電極端子にヒューズを接続し、接続した電極
面をガラスでおおい絶縁層とし、さらにこの上に電極を
形成し内側電極との間にヒューズ機能をもたせたことを
特徴とするヒューズ付チップ型積層セラミックコンデン
サ。Claim 1: In a chip-type multilayer ceramic capacitor, a fuse is connected to an external electrode terminal, the connected electrode surface is covered with glass as an insulating layer, and an electrode is further formed on this to provide a fuse function between it and the inner electrode. A chip-type multilayer ceramic capacitor with a fuse, which is characterized by its long life.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1319691U JPH04103635U (en) | 1991-02-15 | 1991-02-15 | Chip type multilayer ceramic capacitor with fuse |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1319691U JPH04103635U (en) | 1991-02-15 | 1991-02-15 | Chip type multilayer ceramic capacitor with fuse |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04103635U true JPH04103635U (en) | 1992-09-07 |
Family
ID=31747512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1319691U Pending JPH04103635U (en) | 1991-02-15 | 1991-02-15 | Chip type multilayer ceramic capacitor with fuse |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04103635U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007007654A1 (en) * | 2005-07-07 | 2007-01-18 | Toshiba Lighting & Technology Corporation | Discharge lamp operation device and bulb-shaped fluorescent lamp |
-
1991
- 1991-02-15 JP JP1319691U patent/JPH04103635U/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007007654A1 (en) * | 2005-07-07 | 2007-01-18 | Toshiba Lighting & Technology Corporation | Discharge lamp operation device and bulb-shaped fluorescent lamp |
| JP4784772B2 (en) * | 2005-07-07 | 2011-10-05 | 東芝ライテック株式会社 | Discharge lamp lighting device and bulb-type fluorescent lamp |
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