JPH0410218B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device in which a metal material forming silicide is used and connections of electrode wiring are formed in a self-aligned manner.

An example of a method for forming electrical wiring connections on a silicon substrate or a silicon thin film electrode in a conventional semiconductor device will be described with reference to FIGS. 1a to 1e. First, as shown ⁱⁿ FIG.
, a PSG film (phosphorus glass film) 13 is deposited, and a photoresist pattern 14 is further formed.

Next, using the photoresist 14 as a mask, plasma etching is performed using, for example, a mixed gas of CF ₄ (tetrafluoromethane) and H ₂ (hydrogen) to form a contact hole 15 (FIG. 1b). After removing this photoresist pattern 14, FIG.
A polysilicon film 16 is deposited as shown in FIG.

Further, as shown in FIG. 1d, after forming the photoresist pattern 17, using the photoresist pattern 17 as a mask, the polysilicon film 16 is
For example, plasma etching is performed using a mixed gas of CF ₄ and O ₂ (oxygen) to form an electrode wiring pattern. (Figure 1e).

In the above method for forming electrode wiring connections, the photoresist pattern 17 on the polysilicon film 16 is
If the contact hole 15 is not completely covered (FIG. 2a), the bottom of the contact hole 15 will be exposed during etching of the polysilicon film 16.
There is a problem that the N ⁺ region 12 is etched and the electrical characteristics of the device are deteriorated (Fig. 2b).
In order to completely cover the contact hole, the electrode wiring pattern should be approximately smaller than the contact hole, taking into consideration misalignment and differences in electrode wiring pattern conversion.
It was necessary to design the device to be larger than 1 μm, which hindered high integration.

The present invention was made in order to eliminate the above-mentioned conventional drawbacks, and an object of the present invention is to provide a method for manufacturing a semiconductor device that can reduce the allowance for electrode wiring with respect to a contact hole and improve the degree of integration. shall be.

Embodiments of the method for manufacturing a semiconductor device of the present invention will be described below with reference to the drawings. FIGS. 3a to 3e are process explanatory diagrams of this embodiment. In this Fig. 3a to Fig. 3e, Fig. 1a to Fig. 1e
The same parts as in FIGS. 2a and 2b will be described with the same reference numerals.

First, as shown in FIG. 3a, an N ⁺ region 12 for electrical connection is formed by implanting an N-type impurity, such as arsenic, onto a P-type silicon substrate 11, and a PSG film (phosphorus A glass film) 13 is deposited to a thickness of 0.6 μm (microns), and then a photoresist such as AZ1350 is applied on top to a thickness of 1 μm.
A resist mask pattern 14 for contact holes is formed.

Next, using this resist mask pattern 14 as an etching mask, the PSG film 1 is etched as shown in FIG.
3 is etched to open a contact hole 15, and the resist mask pattern 14 is removed.

Next, as the electrode wiring material, as shown in Figure 3c,
A molybdenum film 19 with a thickness of 0.6 μm is deposited, and a silicon nitride film 20 with a thickness of 0.2 μm is deposited thereon,
Furthermore, a resist mask pattern 21 for electrode wiring having a thickness of 1 μm is formed using a photoresist such as AZ1370.

Next, the silicon nitride film 20 is etched and the resist mask pattern 21 is removed (FIG. 3d). When this is heat-treated at, for example, 1000°C for about 1 hour in a high-temperature oxidation furnace with oxygen flowing at 5/min, the molybdenum film 19 in contact with the N ⁺ region 12 reacts with silicon and becomes molybdenum. The molybdenum film 19 forming the silicide 22 but not in contact with the N ⁺ region 12 and not covered with the silicon nitride film 20 is thermally oxidized and sublimed.

Through the above steps, an electrode wiring pattern consisting of molybdenum silicide 22 and molybdenum film 19 electrically connected to N ⁺ region 12 is formed.

As explained above, in the first embodiment, after forming the contact hole 15, the molybdenum film 1
9 was applied. When molybdenum is thermally oxidized, it becomes molybdenum oxide, and molybdenum oxide sublimates at about 800°C. In addition, molybdenum that comes into contact with the silicon film reacts with silicon at a temperature of about 500°C or higher to form molybdenum silicide 22, but even if molybdenum silicide 22 is thermally oxidized, a silicon oxide film is formed on the surface. Molybdesilicide does not change.

Therefore, when the structure shown in FIG. 3d is subjected to high temperature treatment in an oxygen atmosphere, molybdenum and silicon react at the bottom of the contact hole 15 to form molybdenum silicide 22. The molybdenum film 19 covered with the silicon nitride film 20 is not oxidized, but the molybdenum not covered with the silicon nitride film 20 is oxidized and sublimated.

According to the manufacturing method of the present invention, for example, the fourth
As shown in the figure, even if the resist mask pattern 21 for forming electrode wiring does not completely cover the contact hole 15 (FIG. 4a), the bottom of the contact hole 15 is covered with molybdenum silicide 22.
is formed, and then a silicon oxide film 23 is formed on the exposed surface of the molybdenum silicide film 22 as shown in ^FIG . There is no such thing.

Therefore, since the allowance for the electrode wiring relative to the contact hole can be reduced, the line width of the electrode wiring above the contact hole can be reduced by about 1 μm compared to the conventional method, and higher integration of the device can be achieved.

Furthermore, since molybdenum has a resistivity that is approximately one-tenth or less of that of polysilicon, it also has the advantage of reducing electrode wiring resistance.

As a second embodiment of the invention, an example in which the invention is applied to electrode wiring of a MOS transistor is shown in FIG.
As shown in FIG. 5a, on the P-type silicon substrate 11
Thermal oxide film (silicon oxide film) 2 with a thickness of 0.05μm
3 is formed, a gate electrode 24 with a thickness of 0.2 μm is formed using polysilicon, arsenic is implanted onto the P-type silicon substrate 11 to form an N ⁺ region 12, and a gate electrode 24 with a thickness of 0.6 μm is formed on it. A PSG film 13 is deposited and a contact hole 15 is opened.

Next, a molybdenum film 19 with a thickness of 0.6 μm is deposited on the entire surface, and then a molybdenum film 19 with a thickness of 0.2 μm is deposited on the molybdenum film 19.
A silicon nitride film 20 is formed, and the silicon nitride film 20 is patterned (FIG. 5b).

Next, this is heated at 1000° C. for 1 hour in an oxygen atmosphere. The molybdenum film 19 in contact with the N ⁺ region 12 and the polysilicon gate electrode 24 reacts with the silicon nitride film 20, and the molybdenum silicide 2
At the same time, the molybdenum film 19, which is not covered with the silicon nitride film 20 and is exposed on the surface, is oxidized and sublimated. Then, the silicon nitride film 20 is removed to form an electrode wiring pattern (FIG. 5c).

In this second embodiment, as in the first embodiment, the resist pattern for forming the electrode wiring does not need to completely cover the contact hole 15, so the line width of the electrode wiring pattern can be reduced and the element High integration is achieved.

As described above, according to the method of manufacturing a semiconductor device of the present invention, holes are formed in the insulating layer formed on the surface of the silicon layer to form the openings, and silicon elements and compounds are formed on the upper surface including the openings. A metal layer is formed that forms a silicon compound, and an oxidation-resistant layer is selectively formed on the surface of this metal layer, and heat treatment is performed to convert the metal layer inside the opening into a silicon compound. Since the layer is removed by oxidation and evaporation, even if a mask shift occurs, the silicon layer at the bottom of the contact hole can be prevented from being exposed, and as a result, the electrode wiring pattern can be removed. The line width can be reduced, allowing higher integration of devices.

[Brief explanation of drawings]

1a to 1e are process explanatory diagrams of a conventional semiconductor device manufacturing method, and FIGS. 2a and 2b are cross sections of a semiconductor device showing problems in the conventional semiconductor device manufacturing method, respectively. 3a to 3e and 4a and 4b are process explanatory diagrams of an embodiment of the method for manufacturing a semiconductor device of the present invention, and FIGS. 5a to 5c are process explanatory diagrams, respectively. FIGS. 3A and 3B are process explanatory diagrams of other embodiments of the method for manufacturing a semiconductor device according to the present invention; FIGS. 11...P-type silicon substrate, 12...N ⁺ region,
13...PSG film, 14...Resist mask pattern, 15...Contact hole, 16...Polysilicon film, 19...Molybdenum film, 20...Silicon nitride film, 21...Resist mask pattern, 22...Molybdenum Silicide, 23... silicon oxide film, 24... polysilicon gate electrode.

Claims (1)

[Claims] 1. A step of forming an insulating layer on the surface of the silicon layer;
forming an opening in the insulating layer to expose the surface of the silicon layer; and a metal layer forming a compound with silicon element on the surface of the insulating layer and the exposed surface of the silicon layer in the opening. a step of selectively forming an oxidation-resistant layer on the surface of the metal layer in the electrode wiring forming portion including above the opening, and heating the structure obtained in the step in an oxygen atmosphere. A method for manufacturing a semiconductor device, comprising the steps of: converting the metal layer in the opening into a silicon compound; and simultaneously oxidizing, sublimating, and removing the metal layer not covered by the oxidation-resistant layer. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the metal layer is made of molybdenum, and the oxidation-resistant layer is made of silicon nitride.