JPH0397710U - - Google Patents
Info
- Publication number
- JPH0397710U JPH0397710U JP357790U JP357790U JPH0397710U JP H0397710 U JPH0397710 U JP H0397710U JP 357790 U JP357790 U JP 357790U JP 357790 U JP357790 U JP 357790U JP H0397710 U JPH0397710 U JP H0397710U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- control device
- sequence control
- controls
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Programmable Controllers (AREA)
Description
第１図Ａはこの考案の一実施例によるシーケン
ス制御装置のブロツク図、第１図Ｂは他の実施例
によるシーケンス制御装置のブロツク図、第２図
はこの考案の一実施例によるシーケンス制御装置
の外観を示す斜視図、第３図は従来のシーケンス
制御装置のブロツク図である。
７……１チツプマイクロコンピユータ、７ａ…
…ＣＰＵ、７ｂ……ＲＯＭ、７ｃ……ＲＡＭ、７
ｅ……内部バスライン、１０……入力回路、１２
……外部バスライン、１４……出力回路。
FIG. 1A is a block diagram of a sequence control device according to an embodiment of this invention, FIG. 1B is a block diagram of a sequence control device according to another embodiment, and FIG. 2 is a block diagram of a sequence control device according to an embodiment of this invention. FIG. 3 is a block diagram of a conventional sequence control device. 7...1 chip microcomputer, 7a...
...CPU, 7b...ROM, 7c...RAM, 7
e... Internal bus line, 10... Input circuit, 12
...External bus line, 14...Output circuit.
Claims (1)
回路からの信号に対応して、出力回路を制御する
中央処理回路、 を備え、入力回路に与えられる信号に応じて、
出力回路からの出力信号を変化させ、出力回路に
接続された外部機器を制御するシーケンス制御装
置において、 前記記憶回路と前記中央処理回路とを１つの１
チツプ集積回路として形成したことを特徴とする
シーケンス制御装置。[Claims for Utility Model Registration] An input circuit for inputting signals from the outside, a memory circuit for storing programs and data, and an output circuit in response to signals from the input circuit according to the program stored in the memory circuit. a central processing circuit that controls, depending on the signal applied to the input circuit,
In a sequence control device that changes an output signal from an output circuit and controls an external device connected to the output circuit, the storage circuit and the central processing circuit are combined into one unit.
A sequence control device characterized in that it is formed as a chip integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP357790U JPH0397710U (en) | 1990-01-18 | 1990-01-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP357790U JPH0397710U (en) | 1990-01-18 | 1990-01-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0397710U true JPH0397710U (en) | 1991-10-08 |
Family
ID=31507390
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP357790U Pending JPH0397710U (en) | 1990-01-18 | 1990-01-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0397710U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01260466A (en) * | 1988-04-12 | 1989-10-17 | Canon Inc | Image forming device |
| JPH01316755A (en) * | 1988-06-17 | 1989-12-21 | Canon Inc | Integrated circuit for image forming device and its manufacture |
-
1990
- 1990-01-18 JP JP357790U patent/JPH0397710U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01260466A (en) * | 1988-04-12 | 1989-10-17 | Canon Inc | Image forming device |
| JPH01316755A (en) * | 1988-06-17 | 1989-12-21 | Canon Inc | Integrated circuit for image forming device and its manufacture |