JPH01316755A - Integrated circuit for image forming device and its manufacture - Google Patents

Abstract

PURPOSE:To change the logic of the output of a control circuit to positive or negative logic without altering the constitution of hardware by integrating switching means which switch the output of a holding to the positive or negative logic with a signal on the same chip. CONSTITUTION:A comparator 1, the holding means 4 which holds the output signal of the comparator 1, and the switching means 18-20 which switch the output of the holding means 4 to the positive or negative logic with the signal are integrated on the same chip together with a microcomputer, its peripheral memories ROM and RAM 6, and digital circuits such as counters 10-12. Consequently, the positive or negative logic matching a load is selected an outputted with the signal and it is not necessary to use another circuit according to the logic of the load and provide another terminal, so that the same integrated circuit can be used.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an integrated circuit for image forming apparatuses such as copying machines and printers, and a method for manufacturing the same.

[Conventional technology]

Conventionally, image forming devices such as copying machines and printers have motors,
A sequence controller circuit that controls on/off of a load such as a solenoid and a low voltage/exposure/charging power supply circuit and the low voltage/exposure/charging power supply circuit are formed on completely separate boards. On the other hand, it has also been proposed to integrate control circuits such as a sequence controller circuit and a power supply circuit on the same chip. Furthermore, the logic of the control output of the PWM circuit of the power supply, etc., has been fixed in accordance with the logic of the controlled object, as shown in FIG. 6, for example.

[Problem to be solved by the invention]

However, in the conventional example described above, the logic of the output of the control circuit such as the PWM circuit is fixed, so if the output of the opposite logic is required due to a change in the load, etc., the hardware configuration must be changed. The problem was that it didn't.

The present invention has been made under these circumstances, and provides an integrated circuit for an image forming apparatus that can change the output logic of a control circuit to positive logic or negative logic without changing the hardware configuration, and a method for manufacturing the same. It provides:

[Means for Solving the Problem] In order to achieve the above object, the present invention switches between positive logic and negative logic according to a signal. ~(3),(5)
The manufacturing method is as shown in (4) below.

(1) An integrated circuit for an image forming apparatus includes a microcomputer, peripheral memory ROM RAM, digital circuits such as a counter, a comparator, a holding means for holding the output signal of the comparator, and a holding means for correcting the output of the holding means. A switching means for switching between logic and negative logic by a signal is integrated on the same chip.

(2) In the integrated circuit of (1) above, the switching means is switched by a signal from a microcomputer.

(3) The integrated circuit of (1) above includes a ROM that generates a signal for switching the switching means.

(4) When manufacturing the integrated circuit for an image forming apparatus as described in (3) above, a mask pattern for writing a program into the ROM around the microcomputer is used to write the program into the ROM around the microcomputer.
Write at the same time as writing to M.

(5) The integrated circuit for the image forming apparatus is a microcomputer and its peripheral memory ROM RAM.

In addition to a digital circuit such as a counter, there is a comparator, a switching means that switches the input circuit to the comparator using a signal from the microcomputer to make the output of the comparator positive logic or negative logic, and a holding means that holds the output signal of the comparator. and integrated on the same chip.

(Function) With the configurations (1) to (3) and (5) above, the output logic can be changed to positive logic or negative logic according to the load without changing the hardware configuration of the integrated circuit for the image forming device. With the configuration (4) above, a desired integrated circuit for an image forming apparatus can be manufactured without increasing the number of steps.

(Example) The present invention will be described below with reference to Examples. FIG. 1(a) is a configuration diagram showing an rA/D-D/A controller which is a main part of an integrated circuit for an image forming apparatus which is a first embodiment of the present invention. A/D - D/A controller,
It is integrated on the same chip with a microcomputer that controls the operation of an image forming apparatus (not shown) and peripheral digital circuits such as ROM, RAM, and a counter. FIG. 1(b) shows a circuit diagram of a comparator used in the A/D-D/A controller, and FIG. 2 is a timing chart of the controller.

The wood A/D-D/A controller uses PWM (Puls
There are two to four modes: operation as a control circuit (Width Modulation, pulse width modulation) and operation as an A/D converter.

The PWM control circuit is a circuit used in a low-voltage power supply, a high-voltage power supply, a fluorescent lamp dimming control circuit, etc., and includes a comparator 1 and a D/A converter 5 as a reference voltage generator. D/A
RAM6 containing conversion data and pJ p X (M
utiplexer? multiplexer) circuit 3. It is composed of a latch 4 that holds the result of the comparator.

Comparator 1. The RAMP, MPX circuit 3° latch 4 operates according to a timing signal generated by the timing generator 2.

The operation of the PWM control circuit will be explained with reference to the timing chart of FIG. Timing generator 2 inputs external detection data that will serve as a comparison value.
Switch MPX circuit 3. Next, comparator 1 SWI
By turning on SW3 and turning off SW2, the detection value selected by the MPX circuit 3 is input to the comparator 1. At the same time, data for D/A conversion is selected from the D/A conversion table on the RAM 5 and set in the D/A converter 5. Next, by turning on SW2 and turning off SWl and SW3,
The value selected by the PX circuit 3 and the comparison reference D/A conversion value are compared and the result is held in the latch 4.

Next, one of the outputs of the latch 4 is directly supplied to the MAIN/PWM circuit 9, and the other output is exclusive, which is a switching means that switches the output to positive logic or negative logic according to a signal.
e SUB-PW via OR gates 18, 19.20
Supplied to M13, 14.15. exclusive
The other input of the OR gate is provided by a latch 16 which receives a signal from a decoder 17.

Therefore, the signal from the microcomputer (CPU) is decoded by the decoder 17, and at the gate that receives a 1 signal from the latch 16 that holds this signal, the output is 0 when the human power is 1, and the output is 0 when the human power is 0. becomes 1, the logic is reversed and S
At the gate that is supplied to the UB-PWM circuit and receives a 0 signal from the latch 16, the logic is not inverted (SUB-
Supplied to the PWM circuit. In this way, a logical control signal suitable for the load can be obtained.

The A/D converter includes a comparator 1, a D/A converter 5, an arithmetic unit 8 that performs numerical conversion, a RAM 6 that has A/D conversion data, and a comparator that converts analog values to A/D according to predetermined timing. MPX circuit 3 for human power
It consists of In A/D conversion, the analog value selected by the MPX circuit 3 and the reference voltage from the D/A converter 5 are compared by the comparator 1, and based on this result, the next reference voltage to be compared with the input is determined by the calculator. 8 and compare it with the analog value. This comparison is made by the calculator 8 from the most significant bit to the least significant bit until the reference voltage generated by the D/A converter 5 comes closest to the human analog value.

Data is exchanged between this A/D-D/A controller and the CPU via the registers (register A, register B, register C) shown in FIG. 1(a). Register A is
This is a register for setting data on the D/A conversion table, and register B is used to send the results of A/D conversion to the CPU.
- This is a register for reading on 5OB, and register C is a register for setting the status of A/D - D/A conversion operation etc.
6. MPX circuit 3. This register is used to set each address of the latch 4 and the like.

As mentioned above, this A/D-D/A controller has PW
It has two modes: operation as an M control circuit and operation as an A/D converter, and its timing is controlled by a timing generator, and data exchange with the CPU-5UB is via each register. The logic of the output is switched by an exclusive OR gate which is a switching means.

FIG. 3 is a configuration diagram showing the main parts of the second embodiment.

In this embodiment, from the latch 4 to each SυB-PWM circuit 1
The control signals to 3 to 15 are supplied from each output terminal of latch 4 directly to one input terminal of selectors 21 to 23, and via inverters 24 to 26 to the other input terminal of selectors 21 to 23. Based on the data from the microcomputer, each selector 21 to 23 selects the control signal at one of the input terminals, and the output terminal of each selector selects the control signal for each SOB/PW.
It is supplied to M circuits 13-15. Therefore, if you switch the selector using a signal from the microcomputer and select the input terminal that does not go through the inverter, the logic will not change, but if you select the input end that goes through the inverter, the logic will be reversed from positive to negative or from negative to positive. . The configuration other than this essential part is the same as that of the first embodiment.

FIG. 4 is a configuration diagram showing the main parts of the third embodiment.

In this embodiment, MPX circuit 3. An analog switch 28 is provided between the D/A converter 5 and the comparator 1 to change the connection according to the logic of the load of the SUB-PWM circuits 13 to 15.
29, the logic data of the load of the next operating SUB-PWM circuit obtained by the decoder 17 is synchronized with the output timing by the data selector 2,
Input to the strobe terminal of analog switch 28, 29, switch the input polarity to comparator 1, SUB -P
An output suitable for the logic of the load of the WM circuit can be obtained from the latch 4. The configuration other than this essential part is the same as that of the first embodiment.

FIG. 5 is a configuration diagram showing the main parts of the fourth embodiment.

In this embodiment, each output terminal of the latch 4 and the SUB-PWM
Between circuits 13 to 15, as in the first embodiment,
Although usive OR gates 18 to 20 are provided, in this embodiment, these gates 18 to 20 are connected to each SUB
-RO that generates a signal according to the logic of the load of the PWM circuit
It is controlled by M30.

Then, a mask ROM is used as the ROM 30, and when manufacturing a chip, a mask pattern is used to write a program into the ROM around the microcomputer so that the program can be written at the same time as writing into the peripheral ROM. According to this manufacturing method, the output logic can be changed without increasing the number of steps, and changing the logic does not require any cost. As the ROM 30, a P ROM (paograusa) is used instead of the mask ROM.
If you use bleROM), you can write when using it,
Furthermore, if an EPROM (erasable ROM) is used, it is possible to erase and write according to the logic of the load.In this embodiment, the logic of the control output is determined by a dedicated ROM, and the logic is not determined by the program. Even if the microcomputer goes out of control, the logic is stable, and positive feedback will not occur when the minimum output is set to produce the maximum output.

Also in this embodiment, the configuration other than this essential part is the same as that in the first embodiment.

(Effects of the Invention) As explained above, the integrated circuit for an image forming apparatus of this embodiment can select and output either positive logic or negative logic suitable for the load depending on the signal, so that it can be output to another circuit according to the logic of the load. In addition, there is no need to provide separate terminals, and the same integrated circuit can be used, so mass production effects can be expected.

Further, according to the method for manufacturing an integrated circuit for an image forming apparatus of the present invention,
An integrated circuit with the desired logic can be obtained without increasing the number of steps, and there is no cost involved in changing the logic.

[Brief explanation of the drawing]

FIG. 1(a) is a configuration diagram of the main part of the first embodiment of the present invention.
Figure (b) is a circuit diagram of the comparator, Figure 2 is a timing chart of the main parts of the same embodiment, Figure 3 is a block diagram of the main parts of the second embodiment, and Figure 4 is a block diagram of the main parts of the third embodiment. , Figure 5 is the fourth
FIG. 6 is a block diagram of the main part of the embodiment, and FIG. 6 is a block diagram of a conventional example. 1...-Comparator 4--Latch 18-20 ・=-exclusive OR gate 2
8.29----Analog switch 30---- ROM

Claims (5)

[Claims] (1) Microcomputer and its peripheral memory ROM
In addition to digital circuits such as a RAM and a counter, a comparator, a holding means for holding the output signal of the comparator, and a switching means for switching the output of the holding means between positive logic and negative logic by a signal are integrated on the same chip. Features of an integrated circuit for image forming devices. (2) The integrated circuit for an image forming apparatus according to claim 1, wherein the switching means is switched by a signal from a microcomputer. (3) The integrated circuit for an image forming apparatus according to claim 1, further comprising a ROM that generates a signal for switching the switching means. (4) When manufacturing the integrated circuit for an image forming apparatus according to claim 3, a mask pattern for writing a program into the ROM around the microcomputer is used to write the program into the ROM around the microcomputer.
A method for manufacturing an integrated circuit for an image forming apparatus, characterized in that writing is performed simultaneously with writing to M. (5) Microcomputer and its peripheral memory ROM
In addition to digital circuits such as a RAM and a counter, a comparator, a switching means that switches the input circuit to the comparator using a signal from the microcomputer to make the output of the comparator positive logic or negative logic, and holds the output signal of the comparator. An integrated circuit for an image forming apparatus in which a holding means is integrated on the same chip.