JPH039705B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase shift device, and more particularly to a phase shift device suitable for a motor drive device or the like that requires a signal shifted by a constant phase with respect to an input signal whose frequency changes.

FIG. 1 shows a conventional phase shifting device. In this phase shifter, a sawtooth wave generation circuit 4 generates a sawtooth wave that follows an input signal applied to an input terminal 2, and a DC cut filter 10 consisting of a capacitor 6 and a resistor 8 cuts the DC component. A method is adopted in which a phase shift signal is extracted from an output terminal 16 by comparing the generated sawtooth wave with a DC level set by a reference power source 12 using a comparator 14.
FIG. 2A shows the sawtooth wave output, and FIGS. 2B and C show the outputs passed through the filter 10, where B shows the case where the time constant is large and C shows the case where the time constant is small. In this phase shifter, when the period of the sawtooth wave changes and the DC level fluctuates, the ability to follow this DC level fluctuation is determined by the time constant of the filter 10. For this reason, when the time constant is increased as shown in Figure 2B, the original waveform can be maintained, but the followability is poor, and when the time constant is decreased to improve the followability, the second As shown in Figure C, the sawtooth waveform collapses into a differentiated shape, and while tracking performance improves, the original waveform cannot be maintained. Therefore, in the case of such a phase shift device, the accuracy is relatively good when the time constant of the filter 10 is sufficiently small compared to the fluctuation period of the input signal frequency, but when the time constant of the filter 10 is equal to or at that time, It has the disadvantage that it cannot follow a high-speed fluctuation period that exceeds a constant.

Other phase shifting devices include one that uses a one-shot multivibrator triggered by an input signal to shift the phase by the pulse width of the trigger pulse. In this case, it works as a phase shifter for signals with a constant frequency, but it is not suitable as a phase shifter for signals with frequency fluctuations because it is necessary to vary the delay time of the multivibrator according to frequency fluctuations. .

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a phase shifter that generates a phase-shifted output that follows an input signal and maintains a constant phase shift angle regardless of the frequency fluctuation of the input signal.

That is, the phase shift device of the present invention includes a sawtooth wave generation circuit 22 that generates a sawtooth wave that is synchronized with an input signal and has a peak value that corresponds to the frequency of the input signal, and a sawtooth wave generation circuit that generates the sawtooth wave from this sawtooth wave generation circuit. are added sequentially, and the sample hold circuit 2 holds the latest one.
4, and a comparator 28 that compares the sawtooth wave with a divided input provided by dividing the output of the sample and hold circuit at a predetermined division ratio, and the phase of the input signal depends on the division ratio. It is characterized in that a phase-shifted output having a phase shift angle is obtained.

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 3 shows an embodiment of the phase shifting device of the present invention. In the figure, an input signal whose frequency (period) changes is applied to an input terminal 20, and this input signal is applied to a sawtooth wave generation circuit 22 as a trigger signal and simultaneously applied to a sample hold circuit 24 as a sample pulse. Ru. The sawtooth wave generation circuit 22 generates a sawtooth wave output that is synchronized with the input signal and has a peak value proportional to its frequency, or period. A sample and hold circuit 24 is provided with this sawtooth wave output and holds the sawtooth wave level at the time set by the input signal. That is, the sawtooth wave generation circuit 22 and the sample hold circuit 24 generate a frequency-voltage conversion output.

The output terminal of this sample hold circuit 24,
A variable resistor 26 is inserted between the sawtooth wave generation point level terminal of the sawtooth wave generation circuit 22 as a dividing resistor for setting the phase shift angle using a voltage division ratio.
The phase setting output and the sawtooth wave output outputted from the variable terminal of the variable resistor 26 are output by a comparator 28, which gives the phase setting output to the inverting terminal (-) and the sawtooth wave output to the non-inverting terminal (+). They are compared and a phase-shifted output shifted by a set phase is taken out from the output terminal 30. That is, since the inverting terminal (-) is given a voltage set by the divided resistance ratio of the variable resistor 26, and the non-inverting terminal (+) is given a sawtooth wave output, the comparator 28 is equivalent to When the phase determined by the level of the sawtooth wave exceeds the set phase, the output of the comparator 28 is inverted, and in this case, a high level output is taken out from the output terminal.

FIG. 4A shows an input signal pulse applied to the input terminal 20, and FIG. 4B shows a sawtooth wave formed in synchronization with this input signal pulse and according to its frequency. The peak value of the sawtooth wave is proportional to the pulse period of A, and in B, V1 is the sawtooth wave generation point level, Vph is the peak level held by the sample and hold circuit 24, and Vφ is the variable value of the variable resistor 26. It shows the set phase level determined by the terminal position. Here, if the resistance value on the H side is Rh and the resistance value on the L side is R1 with respect to the variable terminal of the variable resistor 26, then Vφ is (Vph−V1)・R1/(Rh+
R1). By comparing this Vφ with the sawtooth voltage, the comparator 28 can obtain the pulse output shown in FIG. 4C.

FIG. 5 shows a part of the waveforms shown in FIG. 4 A, B, and C, in which a sawtooth wave shown in B is formed in synchronization with the rise of the input signal pulses A ₁ and A ₂ shown in A and within that section. has been done. In this sawtooth wave, a phase shift angle of 0 to 360 degrees is given corresponding to the section from the lowest level V1 to the peak level Vph, and the phase shift angle φ is set within 0 to 360 degrees.
Now, if this angle is φ°, then the pulse shown at C is delayed from the leading edge of pulse _A1 by φ°, and the comparator 2
8, and the pulse width of this pulse is (360−
φ)゜. Here, the relationship between the phase shift angle φ° for the total phase (360°) and the resistance division ratio by the variable resistor 26 is given by φ/360=R1/(R1+Rh).
Rh/R1=(360/φ)-1, and it can be seen that the desired phase shift can be realized by the resistance division ratio Rh/R1.

As explained above, it is possible to generate a signal output that follows an input signal and shifts by an arbitrarily set phase angle φ based on the input signal. In particular, in this case, since the comparison level set at the inverting terminal (-) of the comparator 28 is based on the peak hold output given by the sample hold circuit 24, the value of the comparison level is one cycle of the sawtooth wave. Since it is sampled every time and the latest one is always held, a comparison level suitable for the set phase is always formed after one cycle at the latest.
Therefore, an output signal based on the set phase is reliably generated one cycle immediately after the fluctuation of the input signal frequency. In other words, the phase shift angle φ to be set is set relative to the input frequency fluctuation based on the resistance division ratio, so the set value is highly accurate.
Excellent followability.

FIG. 6 shows an embodiment of a phase shift device that optimizes the sampling and holding of the sawtooth wave voltage and keeps the generation point level (starting level) V1 of the sawtooth wave voltage constant. In the figure, in this embodiment, an input signal such as an AC signal is applied to an input terminal 20, and a waveform conversion circuit 32 is installed to convert this input signal into a pulse waveform. The pulse obtained by this waveform conversion circuit 32 is applied to a T flip-flop circuit 34 as a trigger input T, and the sample pulse formed by this T flip-flop circuit 34 is applied to a sample hold circuit 24. In this embodiment, the sample and hold circuit 24 is composed of a sampling circuit, a holding capacitor 38, and a buffer circuit 40, and while the sampling circuit 36 is in the operating state by the sample pulse, the sawtooth wave generating circuit 22 is applied to the holding capacitor 38. A sawtooth voltage is applied. Buffer circuit 40 and sawtooth wave generation circuit 22
Each output is compared by a window comparator 42, and the window width of this window comparator 42 is narrow enough to be considered equivalent to a matching circuit, and this window comparator 42 is provided for sample and hold optimization. There is. The output of the window comparator 42, together with the reset input R of the T flip-flop circuit 34, forms the trigger input T of the T flip-flop circuit 44 which forms the trigger signal for the sawtooth wave generating circuit 22. The sawtooth wave generating circuit 22 has a capacitor 46
, a constant current source 48 that provides a charging current to this capacitor 46 , a switching circuit 50 that controls charging and discharging of the capacitor 46 , and a buffer circuit that outputs a sawtooth wave voltage formed by charging and discharging the capacitor 46 . 52. On/off control of the switching circuit 50 is performed by the output pulse of the T flip-flop circuit 44, and the reset input R of the T flip-flop circuit 44 is given by the output of the comparator 54. Comparator 54
is installed to set the generation point level V1 of the sawtooth wave voltage, the inverting terminal (-) is the output of the sawtooth wave generating circuit 22, and the non-inverting terminal (+) is the reference power supply 56 that provides the level V1. is supplied.
The variable resistor 26 is inserted between the output of the buffer circuit 40 and the reference power source 56, and the non-inverting terminal of the comparator 54 whose phase setting voltage level is set to the inverting terminal (-) by the variable resistor 26. The output sawtooth wave of the buffer circuit 52 is applied to (+).

FIG. 7 shows the operation waveforms of each part in this case, where A is the input signal applied to the input terminal 20, and B is the waveform conversion output by the waveform conversion circuit 32. C shows the output pulse of the T flip-flop circuit 34, the leading edge of which is formed by the leading edge of the pulse shown in B, and the trailing edge formed by the leading edge of the pulse shown in D, ie the output of the window comparator 42. ing. That is, sampling begins with the leading edge of the pulse shown at C and ends with the trailing edge.
Since the output of the window comparator 42 that determines this trailing edge is generated based on the match between the charging voltage of the hold capacitor 38 and the level of the sawtooth wave voltage, the peak hold of the sawtooth wave voltage can be optimized. It has become possible. E indicates a pulse formed by the T flip-flop circuit 44 based on the output of the window comparator 42 shown in D and the reset input from the comparator 54, and the switching circuit 5 of the sawtooth wave generation circuit 22 is activated with this pulse width.
0 becomes on state. Since the trailing edge of this pulse is given by the output of the comparator 54 based on the comparison between the reference voltage V1 and the sawtooth wave voltage output, the generation point level V1 of the sawtooth wave voltage is always constant. F indicates the sawtooth wave voltage generated by the sawtooth wave generation circuit 22, and in this F,
Vph, Vφ and V1 correspond to FIG. 4B.
G indicates a phase-shifted output generated from the comparator 54 at the output terminal 30 based on each of the above waveforms. In this embodiment, a highly accurate phase shift output can be obtained by optimizing the sample hold and stabilizing the sawtooth wave voltage level.

FIG. 8 shows a specific IC circuit of the embodiment shown in FIG. 60 is a signal source that generates the input signal, and in this embodiment, the waveform conversion circuit 62 includes a transistor 64 and resistors 66, 68,
It consists of 70. The sampling circuit 36 includes transistors 72, 74, 76, 78, 80, 8
2 and a resistor 84, and the hold capacitor 38 is connected to an external terminal 86. A transistor 82 that charges and discharges this capacitor 38
is a lateral type transistor on an IC, the base B, the emitter E and the first collector C ₁ are formed in an epitaxial layer on the semiconductor substrate, and the second collector C ₂ is filled with the isolation region and the semiconductor substrate. There is. The buffer circuit 40 includes a transistor 88,
The window comparator 42 is composed of transistors 92, 94, 95, 96, 98, 10.
0, 102, 103, 104, resistance 106, 10
8, 109, 110, 111, 112, inverters 114, 116, 118, and NAND circuit 1
It consists of 20. The sawtooth wave generating circuit 22 includes transistors 122, 124, 126, 128,
130, 132, 134, Zener diode 13
6, resistors 138 and 140, and a capacitor 46, and the resistor 140 and capacitor 46 are connected to external terminals 142 and 144. In this sawtooth wave generation circuit 22, the transistor 12
2, 124, 126, 128, a Zener diode 136, and a resistor 140 constitute a constant current source 48,
Transistor 130 constitutes switching circuit 50, and transistors 132 and 134 constitute buffer circuit 52. Further, the comparator 54 includes transistors 146, 148, 150, 1
The reference power supply 56 is composed of a transistor 156 and a resistor 158.
In this embodiment, a constant current circuit 160 is added, and this constant current circuit 160 includes a transistor 1.
62, 164, diodes 166, 168, and resistors 170, 172.
Transistor 7 of each circuit due to the current flowing through 2
A constant current is applied to 2, 92, 94, 95, 96, 122, and 146. In addition, the power supply terminal 17
DC voltage Vcc is applied to 4.

As is clear from the above configuration, the present invention can be configured as an IC with a small number of external terminals (pins), and can provide a high-speed phase shifter that is highly accurate and can follow input signals with frequency fluctuations.

The phase shift device of the present invention can be used in a motor drive device, and FIG. 9 shows a three-phase motor drive signal formed by the phase shift output, and FIG. 10 shows a three-phase motor driven by the drive signal. The configuration is shown below.
That is, A, B, and C in FIG. 9 indicate ideal motor drive signals φ ₁ , φ ₂ , and φ ₃ formed by the motor drive device based on the phase-shifted output, and each motor drive signal φ The phase shift angles of ₁ , φ ₂ and φ ₃ are set to 120°.
This is because it is necessary to keep the rotating magnetic field constant even if the rotational speed of the motor changes, so the phase shift angle is set to 120° in a three-phase motor. Then, a motor drive signal φ ₁ is formed as a reference signal, and a phase shifter is used to shift a phase shift angle of 120° from this motor drive signal φ ₁ to form other motor drive signals φ ₂ and φ ₃ . . Each motor drive signal φ ₁ , φ ₂ , φ ₃ is an ideal sine wave, but in reality it consists of a step wave whose level changes step by step, as shown by the broken line on the motor drive signal φ ₁ . A simulated sine wave is used, and this step wave, that is, a pseudo sine wave, can be easily formed by performing waveform processing such as addition on the phase shift output of the phase shift device of the present invention using a logic circuit.

Each motor drive signal φ ₁ obtained in this way,
φ ₂ and φ ₃ are applied from the motor drive device to the field coils L ₁ , L ₂ , and L ₃ of the three-phase motor shown in FIG.
For a three-phase motor, its motor drive signals φ ₁ , φ ₂ , φ ₃
With this, a predetermined motor rotation can be obtained.

As explained above, according to the present invention, input 5
Even if the signal frequency fluctuates, it is possible to obtain a phase-shifted output that follows the input signal and maintains a constant phase shift angle regardless of the fluctuation, and can be applied to motor drive devices to maintain stable motor rotation. can do.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional phase shift device, and FIGS. 2 A, B, and C are explanatory diagrams showing its operating waveforms.
FIG. 3 is a block diagram showing an embodiment of the phase shift device of the present invention, FIGS. 4A, B, and C are explanatory diagrams showing its operating waveforms, and FIGS. 5A, B, and C similarly show operating waveforms. 6 is a block diagram showing a specific embodiment of the present invention, FIGS. 7A to 7G are explanatory diagrams showing its operating waveforms, and FIG. 8 is a circuit diagram showing a specific embodiment of the present invention. FIG. 9 is a diagram showing a drive signal for a three-phase motor obtained by applying the phase shift device of the present invention, and FIG. 10 is a circuit diagram showing the configuration of the three-phase motor. 22... sawtooth wave generation circuit, 24... sample hold circuit, 28... comparator.

Claims (1)

[Claims] 1. A sawtooth wave generation circuit that generates a sawtooth wave that is synchronized with an input signal and has a peak value corresponding to the frequency of the input signal; and a sawtooth wave generation circuit that sequentially applies the sawtooth wave from this sawtooth wave generation circuit. , a sample-and-hold circuit that holds the latest one, and a comparator that compares the sawtooth wave with a divided input obtained by dividing the output of this sample-and-hold circuit at a predetermined division ratio, and the input signal A phase shifting device characterized in that it obtains a phase shifted output having a phase shift angle that depends on the division ratio with respect to the phase of the phase.