JPH0395958A - Ceramic package with heat sink - Google Patents

Ceramic package with heat sink

Info

Publication number
JPH0395958A
JPH0395958A JP23367289A JP23367289A JPH0395958A JP H0395958 A JPH0395958 A JP H0395958A JP 23367289 A JP23367289 A JP 23367289A JP 23367289 A JP23367289 A JP 23367289A JP H0395958 A JPH0395958 A JP H0395958A
Authority
JP
Japan
Prior art keywords
chip
heat sink
ceramic substrate
cap
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23367289A
Other languages
Japanese (ja)
Other versions
JP2718203B2 (en
Inventor
Sakae Hojo
栄 北城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP23367289A priority Critical patent/JP2718203B2/en
Publication of JPH0395958A publication Critical patent/JPH0395958A/en
Application granted granted Critical
Publication of JP2718203B2 publication Critical patent/JP2718203B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Abstract

PURPOSE:To improve cooling effect and enhance reliability by enabling a heat sink which is adhered to a cap which blocks a chip and is adhered onto a ceramic substrate in a structure that a large fin and a small fin are mounted on a post at the center alternately. CONSTITUTION:A chip 2 is mounted onto an alumina ceramic substrate 1 which is formed in plane shape using an adhesion agent and a plurality of pins 5 are provided at the periphery part of lower surface of the ceramic substrate 1. A connection pad 3 is provided at the periphery part of the central hole, is connected to the pins 5 through the surface or inner surface of the ceramic substrate 1 electrically, and is connected to the terminal part of the chip 2 by a wiring member 4 such as a wire. With the upper surface of the ceramic substrate 1, the internal airtightness is maintained by adhering a gap 6 with an adhesive such as a low melting-point glass so that the chip 2 is covered. An aluminum heat sink 7 which is adhered onto the upper surface of the cap is in a structure where a large and small disc-shaped fins are aligned alternately at the central cylinder.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はICチップやLSIチップなどのチップを搭載
したヒートシンク付セラミックパッケージに関する. 〔従来の技術〕 高度な半導体素子技術は理論素子から理解されるように
、ゲート当りのスピード、電力積が逐次減少していると
共に、微細加工技術の発達により、ゲート当りの占有面
積も次第に減少している.このため、半導体チップは高
速化ならびに高集積化される傾向にある.一方、この半
導体チップを保護し、信頼性を向上させるパッケージは
半導体チップのボンディング技術などを考慮して実装の
領域へと発展してきている.これに伴い、近年のコンピ
ュータ装置などにおいては、装置の処理性能や信頼性の
向上などのためにLSI化された半導体素子や高密度で
且つ小型化されたLSIチップ搭載用の各種セラミック
ケースが次第に取り入れられるようになってきた. ところで、このように素子の高集積化の度合が大きくな
ると、半導体チップの消費電力も増大することになる.
そのため、消費電力の大きなLSIチップはプラスチッ
クに比べ熱伝導率の大きいセラミックなどのケースに搭
載される.しかしセラミックボードのみによる放熱では
当然LSIチップの冷却に対して限界がある. そこで、前述の高速でかつ高集積化されたLSIチップ
を搭載する従来のセラミックパッケージにおいては、L
SIチップからの放熱に対し冷却の観点から、放熱効率
の高いアルミニウムや銅の材料からなるヒートシンクを
、セラミックパッケージの上面に、熱伝導性の優れた半
田や接着剤により一体的に固着させ放熱させるようにし
ている。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a ceramic package with a heat sink mounted with a chip such as an IC chip or an LSI chip. [Conventional technology] As can be understood from theoretical elements in advanced semiconductor device technology, the speed and power product per gate are gradually decreasing, and with the development of microfabrication technology, the area occupied by each gate is also gradually decreasing. are doing. For this reason, semiconductor chips tend to become faster and more highly integrated. On the other hand, packages that protect semiconductor chips and improve their reliability are being developed into the field of packaging, taking into consideration semiconductor chip bonding technology. Along with this, in recent years computer equipment, etc., have gradually been using various types of ceramic cases for mounting LSI semiconductor elements and high-density and miniaturized LSI chips in order to improve the processing performance and reliability of the equipment. It has become possible to incorporate it. By the way, as the degree of integration of elements increases, the power consumption of semiconductor chips also increases.
Therefore, LSI chips with large power consumption are mounted in cases made of materials such as ceramics, which have higher thermal conductivity than plastic. However, heat dissipation using only the ceramic board naturally has a limit to cooling the LSI chip. Therefore, in the conventional ceramic package mounted with the aforementioned high-speed and highly integrated LSI chip,
From the perspective of cooling the heat dissipated from the SI chip, a heat sink made of aluminum or copper, which has high heat dissipation efficiency, is integrally fixed to the top surface of the ceramic package using solder or adhesive with excellent thermal conductivity to dissipate heat. That's what I do.

第3図は従来のヒートシンク付セラミックパッケージの
一例の斜視図である. 第3図において、1はセラミック基板、5はビン、6は
キャップ、7はヒートシンクである.第4図は従来のヒ
ートシンク付セラミックパッケージの一例の断面図であ
る. 第4図において、1はセラミック基板で、その上にはチ
ップ固着剤を用いてチツブ2が搭載されている.チップ
2は、セラミック基板l上の接続パッド3と配線部材4
によって結線されている.セラミック基板1の下側には
複数個のビン5が付けられている。セラミック基板の上
面にはチップ2を覆うようにキャップ6が接着されてお
り、中の気密を保っている。キャップ6の上面には、ヒ
ートシンク7がヒートシンク固着剤によって接着されて
いる.ヒートシンク7は、中央に円柱があり、円柱上に
円板型のフィンが数個付いている構造をとる.現在、こ
のような構造のヒートシンク付セラミックパッケージが
製作されている.〔発明が解決しようとする課題〕 しかしながら、上述のような構造のヒートシンク付セラ
ミックパッケージでは、ヒートシンクの放熱効率があま
りよくなく、十分な冷却効果が得られないという欠点を
有していた。これにより、チップそのものの温度上昇に
よりデバイスの動作速度が低下するなどの問題が生ずる
Figure 3 is a perspective view of an example of a conventional ceramic package with a heat sink. In Fig. 3, 1 is a ceramic substrate, 5 is a bottle, 6 is a cap, and 7 is a heat sink. Figure 4 is a cross-sectional view of an example of a conventional ceramic package with a heat sink. In Fig. 4, 1 is a ceramic substrate, on which a chip 2 is mounted using a chip fixing agent. The chip 2 has connection pads 3 and wiring members 4 on a ceramic substrate l.
It is connected by. A plurality of bottles 5 are attached to the lower side of the ceramic substrate 1. A cap 6 is bonded to the top surface of the ceramic substrate so as to cover the chip 2 to keep the inside airtight. A heat sink 7 is adhered to the upper surface of the cap 6 using a heat sink adhesive. The heat sink 7 has a structure in which there is a cylinder in the center and several disk-shaped fins are attached to the cylinder. Ceramic packages with heat sinks with this type of structure are currently being manufactured. [Problems to be Solved by the Invention] However, the ceramic package with a heat sink having the above-described structure has the disadvantage that the heat sink does not have very good heat dissipation efficiency, and a sufficient cooling effect cannot be obtained. This causes problems such as a decrease in the operating speed of the device due to an increase in the temperature of the chip itself.

本発明の目的は、発熱量の大きな高集積化LSIチップ
を搭載しても放熱効果が十分であるような信頼性の高い
ヒートシンク付セラミックパッケージを提供することに
ある。
An object of the present invention is to provide a highly reliable ceramic package with a heat sink that has a sufficient heat dissipation effect even when a highly integrated LSI chip that generates a large amount of heat is mounted.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のヒートシンク付セラミックパッケージは、セラ
ミック基板と、該セラミック基板上に接着されたチップ
と、該チップを塞ぐように前記セラミック基板上に接着
されたキャップと、該キャップ上に接着され大型のフィ
ンと小型のフィンが交互に中央の支柱に取付けられてな
るヒートシンクとを含んで構戒される. 〔作用〕 超LSIのように素子の高集積化の度合が大きくなると
、半導体チップの消費電力が増大し、そのため、消費電
力の大きなLSIチップはプラスチックに比べ熱伝導率
の大きいセラミックなどのパッケージに搭載する必要が
ある。さらにLSIチップからの放熱に対する冷却の観
点から、放熱効率の高いアルミニウムや銅の材料からな
るヒートシンクを、LSIチップの固着面と対向する反
対側の表面に、熱伝導性の優れた半田や接着剤により一
体的に固着させ放熱させるようにしている。ヒートシン
クの形状は様々であるが、強制空冷時の風の方向依存性
のなさとヒートシンク単独での放熱効率の高さから数個
の円盤状のフィンを支柱で接続している構造のものが用
いられる。
The ceramic package with a heat sink of the present invention includes a ceramic substrate, a chip bonded to the ceramic substrate, a cap bonded to the ceramic substrate to cover the chip, and a large fin bonded to the cap. The structure includes a heat sink consisting of small fins and small fins attached alternately to the central column. [Function] As the degree of integration of elements increases, as in VLSIs, the power consumption of semiconductor chips increases. Therefore, LSI chips with high power consumption are packaged in materials such as ceramics, which have higher thermal conductivity than plastic. Must be installed. Furthermore, from the perspective of cooling the heat dissipated from the LSI chip, a heat sink made of aluminum or copper material with high heat dissipation efficiency is placed on the surface opposite to the fixed surface of the LSI chip using solder or adhesive with excellent thermal conductivity. This allows them to be fixed together and to dissipate heat. Although there are various shapes of heat sinks, one with a structure of several disc-shaped fins connected by supports is used because of the lack of dependence on wind direction during forced air cooling and the high heat dissipation efficiency of the heat sink alone. It will be done.

本発明のヒートシンク付セラミックパッケージでは、ヒ
ートシンクが数個の大型の円盤状フィンと小型の円盤状
フィンが交互に中心の支柱に付いている構造のヒートシ
ンクであるために、小型のフィンが付いている分だけ表
面積が大きくなり、しかも小型であるためにフィン隙間
の流速を低下させることもなく放熱効率は大きくなる。
In the ceramic package with a heat sink of the present invention, the heat sink has a structure in which several large disc-shaped fins and small disc-shaped fins are alternately attached to a central pillar, so the small fins are attached. The surface area increases accordingly, and since it is small, the heat dissipation efficiency increases without reducing the flow velocity in the fin gaps.

この構造により、上述のように高放熱性で高信頼性のヒ
ートシンク付セラミックパッケージが実用可能となる. 〔実施例〕 次に、本発明の実施例について図面を参照して説明する
. 第1図は本発明の一実施例の斜視図である。
This structure makes it possible to put into practical use a ceramic package with a heat sink that has high heat dissipation and high reliability as described above. [Example] Next, an example of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view of an embodiment of the present invention.

第1図において、lはセラミック基板、5はピン、6は
キャップ、7はヒートシンクである。
In FIG. 1, 1 is a ceramic substrate, 5 is a pin, 6 is a cap, and 7 is a heat sink.

第2図は本発明の一実施例の断面図である。FIG. 2 is a sectional view of one embodiment of the present invention.

第2図において、1は平板状に形或されたアルミナのセ
ラミック基板で、その上にはチップ固着剤を用いてチッ
プ2が搭載されている.5は前記チップ2のボードに接
続するための複数個のビンで、このピン5は前記セラミ
ック基板1の下面周縁部に立設されている.セラミック
基板1の中央の穴の周辺部にはピン5とチップ2とを接
続する接続パッド3が設けられており、この接続パッド
3と前記ビン5とはセラミック基板1の表面あるいは内
層を通じて電気的に接続されている.チップ2の端子部
はワイヤなどの配線部材4でビン5に接続された接続パ
ッド3に接続されている。セラミック基板1の上面は、
チップ2を覆うように低融点ガラス等の接着剤によりキ
ャップ6が接着されており、中の気密を保っている.キ
ャップ6の上面には、アルミニウムのヒートシンク7が
ヒートシンク固着剤によって接着されている。ヒートシ
ンク7は、中央に円柱があり、円柱上に大型の円盤状フ
ィンと小型の円盤状フィンが交互に並んだ構造をしてい
る。
In FIG. 2, reference numeral 1 denotes an alumina ceramic substrate shaped like a flat plate, on which a chip 2 is mounted using a chip fixing agent. Reference numeral 5 designates a plurality of pins for connection to the board of the chip 2, and these pins 5 are erected at the periphery of the lower surface of the ceramic substrate 1. A connection pad 3 for connecting the pin 5 and the chip 2 is provided around the hole in the center of the ceramic substrate 1, and the connection pad 3 and the via 5 are electrically connected through the surface or inner layer of the ceramic substrate 1. It is connected to the. The terminal portion of the chip 2 is connected to a connection pad 3 connected to a vial 5 by a wiring member 4 such as a wire. The top surface of the ceramic substrate 1 is
A cap 6 is bonded to cover the chip 2 with an adhesive such as low-melting point glass to maintain airtightness inside. An aluminum heat sink 7 is bonded to the top surface of the cap 6 with a heat sink adhesive. The heat sink 7 has a cylinder in the center, and has a structure in which large disc-shaped fins and small disc-shaped fins are alternately arranged on the cylinder.

本実施例による大型と小型の円盤状フィンが交互に並ん
だ構造のヒートシンクと、従来の大型の円盤状フィンの
みが並んだヒートシンクの熱抵抗を実験で比較した.本
実施例では、風速5 m / sのとき熱抵抗は2.O
K/Wであった。これに対して従来のパッケージでは、
風速5 m / sのとき熱抵抗は2.2K/Wであっ
た.以上より、大型のフィンのみから成るヒートシンク
が搭載されているパッケージよりも、大型と小型のフィ
ンが交互に並んだヒートシンクが搭載されているパッケ
ージの方が、熱抵抗が小さくなることがわかった. なお、上記実施例においては、ヒートシンク材料として
はアルミニウムの場合の例を説明してきたが、これに限
らず熱伝導率の良い材料であれば本発明の効果を十分に
満足できることは明かである. 〔発明の効果〕 以上説明したように本発明によれば、通電した時の発熱
によるチップ及びセラミックパッケージの温度上昇を抑
えることが可能となるため、高速動作で高信頼性のセラ
ミックパッケージが得られるという効果がある。
The thermal resistance of a heat sink with a structure in which large and small disc-shaped fins are arranged alternately in accordance with this example and a conventional heat sink in which only large disc-shaped fins are arranged in an arrangement was experimentally compared. In this example, when the wind speed is 5 m/s, the thermal resistance is 2. O
It was K/W. In contrast, traditional packaging
The thermal resistance was 2.2 K/W when the wind speed was 5 m/s. From the above, it was found that a package equipped with a heat sink consisting of alternating large and small fins has a lower thermal resistance than a package equipped with a heat sink consisting only of large fins. In the above embodiments, aluminum is used as the heat sink material, but it is clear that any material with good thermal conductivity can sufficiently achieve the effects of the present invention. [Effects of the Invention] As explained above, according to the present invention, it is possible to suppress the temperature rise of the chip and the ceramic package due to heat generation when energized, so a high-speed operation and highly reliable ceramic package can be obtained. There is an effect.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本発明の一実施例の斜視図及び断面
図、第3図及び第4図は従来のヒートシンク付セラミッ
クパッケージの一例の斜視図及び断面図である. 1・・・セラミック基板、2・・・チップ、3・・・接
続パッド、4・・・配線部材、5・・・ピン、6・・・
キャップ、7・・・ヒートシンク。 第1 図
1 and 2 are a perspective view and a sectional view of an embodiment of the present invention, and FIGS. 3 and 4 are a perspective view and a sectional view of an example of a conventional ceramic package with a heat sink. DESCRIPTION OF SYMBOLS 1... Ceramic board, 2... Chip, 3... Connection pad, 4... Wiring member, 5... Pin, 6...
Cap, 7... heat sink. Figure 1

Claims (1)

【特許請求の範囲】[Claims] セラミック基板と、該セラミック基板上に接着されたチ
ップと、該チップを塞ぐように前記セラミック基板上に
接着されたキャップと、該キャップ上に接着され大型の
フィンと小型のフィンが交互に中央の支柱に取付けられ
てなるヒートシンクとを含むことを特徴とするヒートシ
ンク付セラミックパッケージ。
A ceramic substrate, a chip bonded to the ceramic substrate, a cap bonded to the ceramic substrate to cover the chip, and large fins and small fins bonded to the cap alternately arranged in the center. A ceramic package with a heat sink, characterized in that the package includes a heat sink attached to a pillar.
JP23367289A 1989-09-07 1989-09-07 Ceramic package with heat sink Expired - Lifetime JP2718203B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23367289A JP2718203B2 (en) 1989-09-07 1989-09-07 Ceramic package with heat sink

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23367289A JP2718203B2 (en) 1989-09-07 1989-09-07 Ceramic package with heat sink

Publications (2)

Publication Number Publication Date
JPH0395958A true JPH0395958A (en) 1991-04-22
JP2718203B2 JP2718203B2 (en) 1998-02-25

Family

ID=16958724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23367289A Expired - Lifetime JP2718203B2 (en) 1989-09-07 1989-09-07 Ceramic package with heat sink

Country Status (1)

Country Link
JP (1) JP2718203B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07183432A (en) * 1993-12-24 1995-07-21 Nec Corp Semiconductor package provided with heat sink
EP1288345A2 (en) * 2001-08-24 2003-03-05 Commissariat A L'energie Atomique Apparatus for homogenising the temperature of two solid loads in a solidification cartridge
US9353746B2 (en) 2009-08-14 2016-05-31 Edwards Limited Scroll pump
US9353748B2 (en) 2009-08-14 2016-05-31 Edwards Limited Scroll pump having tip seal containing engaging portions intermediate nonengaging portions that interface with a scroll base

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07183432A (en) * 1993-12-24 1995-07-21 Nec Corp Semiconductor package provided with heat sink
EP1288345A2 (en) * 2001-08-24 2003-03-05 Commissariat A L'energie Atomique Apparatus for homogenising the temperature of two solid loads in a solidification cartridge
EP1288345A3 (en) * 2001-08-24 2005-03-30 Commissariat A L'energie Atomique Apparatus for homogenising the temperature of two solid loads in a solidification cartridge
US9353746B2 (en) 2009-08-14 2016-05-31 Edwards Limited Scroll pump
US9353748B2 (en) 2009-08-14 2016-05-31 Edwards Limited Scroll pump having tip seal containing engaging portions intermediate nonengaging portions that interface with a scroll base

Also Published As

Publication number Publication date
JP2718203B2 (en) 1998-02-25

Similar Documents

Publication Publication Date Title
US5227663A (en) Integral dam and heat sink for semiconductor device assembly
US5175612A (en) Heat sink for semiconductor device assembly
US5777847A (en) Multichip module having a cover wtih support pillar
KR950024313A (en) High heat dissipation semiconductor package
KR960000222B1 (en) Package with heat sink
JPH02276264A (en) Ceramic package provided with heat sink
JPH0395958A (en) Ceramic package with heat sink
JPH04234153A (en) Semiconductor package provided with heat sink
JPH04127562A (en) Package provided with heat sink
JP2961976B2 (en) Semiconductor package with heat sink
JP3157541B2 (en) Semiconductor package with heat sink
JPH04269855A (en) Semiconductor package provided with heat sink
JPH06232294A (en) Semiconductor integrated circuit device
JPH04267547A (en) Semiconductor package with heat sink
JPH0521665A (en) Semiconductor package provided with heat sink
JPS60226149A (en) Ceramic package with heat sink
JPH04155944A (en) Ceramic package with heat sink
JPH0621283A (en) Semiconductor package with heat sink
JPH07183432A (en) Semiconductor package provided with heat sink
JPS6129158A (en) Semiconductor device
JPH02291154A (en) Ceramic package provided with heat sink
JPH02288255A (en) Semiconductor device
JPH03214762A (en) Ceramic package with heat sink
JPH03211863A (en) Ceramic package with heat sink
JPH0290555A (en) Semiconductor device