JPH0394900U - - Google Patents
Info
- Publication number
- JPH0394900U JPH0394900U JP404790U JP404790U JPH0394900U JP H0394900 U JPH0394900 U JP H0394900U JP 404790 U JP404790 U JP 404790U JP 404790 U JP404790 U JP 404790U JP H0394900 U JPH0394900 U JP H0394900U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- operation switch
- stored
- constant
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 claims 3
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 1
Landscapes
- Fittings On The Vehicle Exterior For Carrying Loads, And Devices For Holding Or Mounting Articles (AREA)
Description
第１図は本考案の一実施例である音場構成装置
１の簡略化した電気的構成を示すブロツク図、第
２図はストア領域ｍａ１のストア内容を示す図、
第３図は処理回路６における操作スイツチ群７か
らの入力操作の判別処理を説明するためのフロー
チヤート、第４図は音場切換スイツチＥＦＣの操
作に基づく音場切換処理を説明するためのフロー
チヤート、第５図はメモリ操作スイツチＳｍｉの
操作に基づく登録処理を説明するためのフローチ
ヤート、第６図はメモリ操作スイツチＳｍｉの操
作に基づく読出処理を説明するためのフローチヤ
ート、第７図は時間選択スイツチＴＩＭＥの操作
に基づく時間選択処理を説明するためのフローチ
ヤート、第８図は時間延長スイツチ＋の操作に基
づく時間延長処理を説明するためのフローチヤー
トである。
１……音場構成装置、４……デジタルジグナル
プロセツサ、６……処理回路、９……リードオン
リメモリ（ＲＯＭ）、１０……ランダムアクセス
メモリ（ＲＡＭ）、Ｆ……定数、Ｃ……モードカ
ウンタ値、ＥＦＣ……音場切換スイツチ、Ｓｍ１
〜Ｓｍ４……メモリ操作スイツチ、ＴＩＭＥ……
時間選択スイツチ、ＦＵＮＣＴＩＯＮ……レベル
選択スイツチ、＋……時間延長スイツチ、−……
時間短縮スイツチ、ＵＰ……レベル上昇スイツチ
、ＤＯＷＮ……レベル降下スイツチ、Ｍ１〜Ｍ３
……サブメモリ、ｍａ〜ｍｄ……副メモリ、ｍａ
１〜ｍｄ４，９ａ〜９ｄ……ストア領域、Ｔ……
基準音場、Ｙ……調整音場。
FIG. 1 is a block diagram showing a simplified electrical configuration of a sound field configuration device 1 which is an embodiment of the present invention, and FIG. 2 is a diagram showing the stored contents of the store area ma1.
FIG. 3 is a flowchart for explaining the processing for determining input operations from the operation switch group 7 in the processing circuit 6, and FIG. 4 is a flowchart for explaining the sound field switching processing based on the operation of the sound field switching switch EFC. 5 is a flowchart for explaining the registration process based on the operation of the memory operation switch Smi, FIG. 6 is a flowchart for explaining the readout process based on the operation of the memory operation switch Smi, and FIG. 7 is a flowchart for explaining the readout process based on the operation of the memory operation switch Smi. FIG. 8 is a flowchart for explaining the time selection process based on the operation of the time selection switch TIME. FIG. 8 is a flowchart for explaining the time extension process based on the operation of the time extension switch +. DESCRIPTION OF SYMBOLS 1...Sound field configuration device, 4...Digital signal processor, 6...Processing circuit, 9...Read only memory (ROM), 10...Random access memory (RAM), F...Constant, C... ...Mode counter value, EFC...Sound field selection switch, Sm1
~Sm4...Memory operation switch, TIME...
Time selection switch, FUNCTION... Level selection switch, +... Time extension switch, -...
Time reduction switch, UP...Level increase switch, DOWN...Level decrease switch, M1 to M3
...Sub memory, ma~md...Sub memory, ma
1~md4, 9a~9d...Store area, T...
Reference sound field, Y...Adjustment sound field.
Claims (1)
数を、各音場毎にストアする基準メモリと、 前記基準となる音場を切換えるために操作され
る第１操作スイツチと、 前記定数を変化するために操作される第２操作
スイツチと、 第１操作スイツチの出力に応答して、第１メモ
リから選択的に切換えて読出された定数をストア
する再生メモリと、 第２操作スイツチの出力に応答して前記再生メ
モリにストアされる定数を変化させる定数変化手
段と、 前記再生メモリにストアされる定数に応答して
、入力音響信号から音場を構成する音響信号を演
算して出力する音場構成演算回路と、 前記再生メモリにストアされる定数を保存のた
めにストアする登録メモリであつて、前記基準と
なる音場毎に対応して予め定める領域数のストア
領域をそれぞれ有する登録メモリと、 前記領域数のストア領域に個別に対応して設け
られ、前記ストア領域のいずれかを選択するため
に操作される第３操作スイツチと、 前記第１操作スイツチからの出力と第３操作ス
イツチからの出力とに応答して、前記登録メモリ
のストア内容を選択し、前記選択されたストア領
域から再生メモリへのストア内容の読出し、もし
くは再生メモリから前記選択されたストア領域へ
のストア内容の書込を行う領域選択手段とを含む
ことを特徴とする音場構成装置。[Claims for Utility Model Registration] A reference memory that stores constants for configuring a plurality of types of reference sound fields for each sound field, and a first memory that is operated to switch between the reference sound fields. an operation switch; a second operation switch operated to change the constant; and a reproduction memory for storing the constant selectively switched and read from the first memory in response to the output of the first operation switch. , constant changing means for changing a constant stored in the playback memory in response to the output of the second operation switch; a sound field configuration calculation circuit that calculates and outputs a signal; and a registration memory that stores constants stored in the playback memory for storage, the number of areas being predetermined corresponding to each of the reference sound fields. a registration memory each having storage areas of; a third operation switch provided individually corresponding to the number of storage areas and operated to select one of the storage areas; and the first operation switch. and in response to the output from the third operation switch, the stored contents of the registered memory are selected, and the stored contents are read from the selected storage area to the playback memory, or the stored contents are read from the playback memory. A sound field configuring device comprising: area selection means for writing storage contents into a stored storage area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP404790U JPH0394900U (en) | 1990-01-20 | 1990-01-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP404790U JPH0394900U (en) | 1990-01-20 | 1990-01-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0394900U true JPH0394900U (en) | 1991-09-27 |
Family
ID=31507816
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP404790U Pending JPH0394900U (en) | 1990-01-20 | 1990-01-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0394900U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101527285B1 (en) * | 2013-09-23 | 2015-06-09 | 최종일 | Toy top |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6249635A (en) * | 1985-08-28 | 1987-03-04 | Nec Kyushu Ltd | Semiconductor device |
| JPS6387000A (en) * | 1986-09-30 | 1988-04-18 | Yamaha Corp | Reproduction characteristic control circuit |
| JPH01231099A (en) * | 1988-03-10 | 1989-09-14 | Matsushita Electric Ind Co Ltd | Electronic musical instrument |
-
1990
- 1990-01-20 JP JP404790U patent/JPH0394900U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6249635A (en) * | 1985-08-28 | 1987-03-04 | Nec Kyushu Ltd | Semiconductor device |
| JPS6387000A (en) * | 1986-09-30 | 1988-04-18 | Yamaha Corp | Reproduction characteristic control circuit |
| JPH01231099A (en) * | 1988-03-10 | 1989-09-14 | Matsushita Electric Ind Co Ltd | Electronic musical instrument |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101527285B1 (en) * | 2013-09-23 | 2015-06-09 | 최종일 | Toy top |
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