JPH0391990A - Bonding device for semiconductor device - Google Patents

Bonding device for semiconductor device

Info

Publication number
JPH0391990A
JPH0391990A JP22820689A JP22820689A JPH0391990A JP H0391990 A JPH0391990 A JP H0391990A JP 22820689 A JP22820689 A JP 22820689A JP 22820689 A JP22820689 A JP 22820689A JP H0391990 A JPH0391990 A JP H0391990A
Authority
JP
Japan
Prior art keywords
conductive pattern
wiring board
printed wiring
semiconductor device
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22820689A
Other languages
Japanese (ja)
Other versions
JP2803211B2 (en
Inventor
Junichiro Yoshie
吉江 潤一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP1228206A priority Critical patent/JP2803211B2/en
Publication of JPH0391990A publication Critical patent/JPH0391990A/en
Application granted granted Critical
Publication of JP2803211B2 publication Critical patent/JP2803211B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3415Surface mounted components on both sides of the substrate or combined with lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To mount semiconductor devices on both the sides of a printed wiring board with a small pressure making them confront each other in a short time by a method wherein a conductive pattern on which solder is applied and outer leads are heated and connected together by a single bonding tool at the same time. CONSTITUTION:A semiconductor device 10 is placed on a printed wiring board 11, and outer leads 3 of the semiconductor device 10 are aligned with a conductive pattern 12. Keeping them in this state, when a bonding tool 13a heated by a heater 17 is made to descend, a first bearing part 14a approaches to or comes into contact with a conductive pattern on which solder is applied and a second bearing part 15 is made to come into contact with a carrier film 1. When the bonding tool 13a is pressured, solder applied onto the conductive pattern 1 is fused. By this setup, outer leads 3 are connected to the conductive pattern 12 in a short time, and when semiconductor devices 10 and 10a are mounted on both the sides of the printed wiring board 11 at symmetrical positions, the mounting concerned can be carried out by combining a bonding device with a printed wiring board reversing device.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は、半導体装置を基板に実装する場合のボンディ
ング装置に係り、さらに詳しくは該半導体装置のアウタ
ーリードをプリント配線基板の導電パターン等にボンデ
ィングする装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bonding device for mounting a semiconductor device on a board, and more specifically, for bonding an outer lead of the semiconductor device to a conductive pattern or the like of a printed wiring board. This invention relates to a bonding device.

[従来の技術] 半導体装置は、一般にリードフレームに設けたダイバッ
ドに半導体素子を取付け、半導体素子の外部電極とリー
ドフレームの端子とをそれぞれワイヤで接続し、これを
エボキシ樹脂の如き熱硬化性樹脂でパッケージしたのち
各端子を切断し、製造している。
[Prior Art] Generally, in a semiconductor device, a semiconductor element is attached to a die pad provided on a lead frame, the external electrodes of the semiconductor element and the terminals of the lead frame are connected with wires, and these are made of thermosetting resin such as epoxy resin. After packaging, each terminal is cut and manufactured.

ところで、最近では電子機器の小形化、薄形化に伴ない
、これに使用する半導体装置も高密度実装するため、薄
くかつ小形の半導体装置の出現が望まれている。このよ
うな要請に答えるべく、ポリイミドフィルムの如きキャ
リアフィルムのデバイスホールに半導体素子を配設し、
この半導体素子の電極とキャリアフィルムのインナーリ
ードに設けた端子とを直接接続し、これに液状の樹脂(
例えばエポキシ樹脂)からなる封止材を印刷あるいはポ
ッティングしてパッケージした方式の半導体装置が使用
されるようになった。
Nowadays, as electronic devices become smaller and thinner, the semiconductor devices used therein are also packaged in higher density, so there is a desire for thinner and smaller semiconductor devices. In order to meet these demands, semiconductor elements are placed in device holes of carrier films such as polyimide films,
The electrodes of this semiconductor element are directly connected to the terminals provided on the inner leads of the carrier film, and liquid resin (
For example, semiconductor devices packaged by printing or potting a sealant made of epoxy resin have come into use.

第4図はキャリャフィルムを用いた従来の半導体装置を
説明するための平面図、第5図はそのA一A拡大断面図
である。図において、1は長さ方向に等間隔に、後述の
半導体素子6,6a,6b,・・・の表面積より大きい
面積のデバイスホール2,2a,2b,・・・が設けら
れた厚さ75〜100IIm程度のキャリャフィルムで
ある。3はキャリャフィルム1に設けらたれ銅の如き導
電率の高い厚さ30〜4〇四、幅50〜30〇一程度の
金属箔からなる多数の導電パターン(以下アウターリー
ドという)で、その一部はデバイスホール2内に突出し
てインナーリード3aを形成しており、その先端部には
半導体素子6〜6bの電極と接続する端子4が設けられ
ている。5はキャリャフィルム1を搬送するためのスプ
ロケット穴である。
FIG. 4 is a plan view for explaining a conventional semiconductor device using a carrier film, and FIG. 5 is an enlarged sectional view taken along line A--A. In the figure, 1 indicates a thickness 75 in which device holes 2, 2a, 2b, . . . having an area larger than the surface area of semiconductor elements 6, 6a, 6b, . It is a carrier film of about ~100 IIm. Numeral conductive patterns (hereinafter referred to as outer leads) 3 are provided on the carrier film 1 and are made of metal foil such as copper with high conductivity and have a thickness of about 30 to 40 mm and a width of about 50 to 300 mm. A portion thereof protrudes into the device hole 2 to form an inner lead 3a, and a terminal 4 connected to the electrodes of the semiconductor elements 6 to 6b is provided at the tip thereof. 5 is a sprocket hole for conveying the carrier film 1.

上記のようなキャリャフィルム1のインナーリード3a
を半゜導体素子6の電極にボンディングするには、半導
体素子6をボンディングステージ(図示せず)上に載置
し、半導体素子6に設けた多数の電極と各インナーリー
ド3aの端子4とをそれぞれ整合させる。ついでヒータ
を内蔵したボンディングツール(図示せず)を下降させ
、各インナーリード3aに当接させて圧下し、各インナ
ーリード3aを所定の角度にフォーミングすると共に、
各端子4をそれぞれ電極に融着させ、接続する。ボンデ
ィングが終ったときは半導体素子6の能動面を樹脂等に
より封止し、アウターリード3の基部を切断すれば半導
体装置10の製造が完了する。
Inner lead 3a of carrier film 1 as described above
To bond the semiconductor element 6 to the electrodes of the semiconductor element 6, the semiconductor element 6 is placed on a bonding stage (not shown), and the numerous electrodes provided on the semiconductor element 6 and the terminal 4 of each inner lead 3a are bonded. Match each. Next, a bonding tool (not shown) with a built-in heater is lowered, brought into contact with each inner lead 3a, and pressed down to form each inner lead 3a at a predetermined angle.
Each terminal 4 is fused to an electrode and connected. When bonding is completed, the active surface of the semiconductor element 6 is sealed with a resin or the like, and the base of the outer lead 3 is cut to complete the manufacture of the semiconductor device 10.

上記のような半導体装置10をプリント配線基板に実装
するには、第6図に示すように、プリント配線基板1l
をヒータ8を内蔵した加熱台7上に載置し、下から導電
パターンt2を加熱する。そして、プリント配線基板1
1上に半導体装置10を栽置し、各アウターリード3を
はんだが塗布された導電パターンl2とそれぞれ整合さ
せる。次に、内蔵したヒータl7により加熱されたボン
ディングツール13を下降させて、その先端部14をキ
ャリャフィルム1を介してアウターリード3に当接し、
加熱かつ加圧してはんだを溶融させ、導電パターン12
にアウターリード3を接続する。
In order to mount the semiconductor device 10 as described above on a printed wiring board, as shown in FIG.
is placed on a heating table 7 having a built-in heater 8, and the conductive pattern t2 is heated from below. And printed wiring board 1
A semiconductor device 10 is placed on top of the semiconductor device 10, and each outer lead 3 is aligned with a conductive pattern l2 coated with solder. Next, the bonding tool 13 heated by the built-in heater 17 is lowered and its tip 14 is brought into contact with the outer lead 3 via the carrier film 1,
The conductive pattern 12 is melted by heating and pressurizing the solder.
Connect outer lead 3 to.

[発明が解決しようとする課題] 上記のような従来の実装方式では、プリント配線基板1
lの下部から予備加熱(約150℃)しなければならな
いので、装置が大型かつ高価になるばかりでなく、実装
密度を高めるためにプリント配線基板1lの両面に対向
して半導体装置IOを実装することができなかった。
[Problem to be solved by the invention] In the conventional mounting method as described above, the printed wiring board 1
Since it is necessary to preheat (approximately 150° C.) from the bottom of the printed wiring board 1l, not only does the device become large and expensive, but also the semiconductor device IO must be mounted facing both sides of the printed wiring board 1l in order to increase the packaging density. I couldn't.

また、ボンディングツール13は熱伝導率の低いキャリ
アフィルム1を介してアウターリード3及び導電パター
ンl2を加熱するため、高温(先端部の温度350 〜
400℃)かつ重加圧( 10〜30kg / cd 
)で、長時間(冷却を含めて15〜20秒)圧着しなけ
ればならない等の問題があった。なお、圧着時間を短縮
するためには、ボンディングッールl3を更に高温に加
熱することも考えられるが、そうするとキャリャフィル
ム1が溶解するおそれがあるので、350〜400℃が
限度である。
In addition, since the bonding tool 13 heats the outer lead 3 and the conductive pattern l2 via the carrier film 1 with low thermal conductivity, the bonding tool 13 has a high temperature (the temperature of the tip part is 350 ~
400℃) and heavy pressure (10-30kg/cd
), there were problems such as having to press-bond for a long time (15 to 20 seconds including cooling). In order to shorten the pressure bonding time, it may be possible to heat the bonding tool 13 to a higher temperature, but if this is done, there is a risk that the carrier film 1 will melt, so the temperature is limited to 350 to 400°C.

本発明は、上記の課題を解決すべくなされたもので、下
からの予備加熱を必要とせず、プリント配線基板の両面
に対向して半導体装置を実装することができ、しかも軽
加圧かつ短時間で実装を可能とした半導体装置のボンデ
ンイング装置を得ることを目的としたものである。
The present invention was made in order to solve the above problems, and it is possible to mount semiconductor devices facing both sides of a printed wiring board without requiring preheating from below, and in addition, with light pressure and a short time. The purpose of this invention is to obtain a bonding device for semiconductor devices that can be mounted in a short period of time.

[課題を解決するための手段] 本発明に係る半導体装置のボンデンイグ装置は、ボンデ
ィングッールの先端部外周に導電パターンに当接する第
1の当接部を設けると共に、該第lの当接部の内側にア
ウターリード又はキャリアフィルムに当接する第2の当
接部を設けたものである。
[Means for Solving the Problems] A bonding device for a semiconductor device according to the present invention includes a first contact portion that contacts a conductive pattern on the outer periphery of a tip of a bonding tool, and a first contact portion that contacts a conductive pattern. A second abutting part that abuts the outer lead or the carrier film is provided inside the part.

また、ボンデングツールの先端部の中央部に第1の当接
部を設けると共に、該第1の当接部の両側に第2の当接
部を設けたものである。
Further, a first contact portion is provided at the center of the tip of the bonding tool, and second contact portions are provided on both sides of the first contact portion.

[作用] ヒータを内蔵したボンディングッールを下降させると、
第1の当接部がはんだを塗布した導電パターンに当接し
、第2の当接部がキャリャフィルム又はアウターリード
に当接してそれぞれ加熱す。
[Operation] When the bonding tool with a built-in heater is lowered,
The first contact portion contacts the conductive pattern coated with solder, and the second contact portion contacts the carrier film or the outer lead and heats them.

るついでボンディングツールを加圧すれば、はんだが溶
融してアウターリードは導電パターンに接続される。
When the bonding tool is applied with pressure after soldering, the solder melts and the outer lead is connected to the conductive pattern.

[実施例] 第1図は本発明実施例の縦断面図、第2図はそのボンデ
ィングツールの底面図である。なお、第6図で説明した
従来例と同じ部分には同じ符号を付し、説明を省略する
。図において、13aはボンディングツールで、その下
面の外周にはボンディング時にプリント配線基板1lの
導電パターンl2に当接する第1の当接部14aが設け
られており、その内側にはボンディング時にキャリアフ
ィルム1に当接する第1の当接部14aよりdだけ深く
形成された第2の当接部l5が形成されている。
[Embodiment] FIG. 1 is a longitudinal sectional view of an embodiment of the present invention, and FIG. 2 is a bottom view of the bonding tool. Note that the same parts as in the conventional example explained in FIG. 6 are denoted by the same reference numerals, and the explanation will be omitted. In the figure, reference numeral 13a denotes a bonding tool, and a first contact part 14a is provided on the outer periphery of the lower surface of the tool to come into contact with the conductive pattern l2 of the printed wiring board 1l during bonding. A second abutting portion l5 is formed which is deeper by d than the first abutting portion 14a that abuts on.

ここに、第2の当接部15の深さdは、キャリャフィル
ム1の厚さをt ,アウターリード3の厚1 さをt2とすれば、d≦tt+t2に設定する。
Here, the depth d of the second contact portion 15 is set to d≦tt+t2, where t is the thickness of the carrier film 1 and t2 is the thickness 1 of the outer lead 3.

例えば、t  = 100 us St 2 − 40
−とすれば、d1 は140μm又はこれより僅かに浅くする。lBは第2
の当接NL5に続いてボンディングッール13aの中央
部に形成された、半導体装置10との干渉を避けるため
の凹部である。
For example, t = 100 us St 2 - 40
-, d1 should be 140 μm or slightly shallower. lB is the second
This is a recess formed in the center of the bonding tool 13a following the contact NL5 to avoid interference with the semiconductor device 10.

次に、本発明の作用を説明する。先ず、半導体装置10
をプリント配線基板1l上に載置して、アウターリード
3をそれぞれ導電パターンl2に整合させる。この状態
でヒータl7により加熱(先端部の温度は350〜40
0℃)されたボンディングッール13aを下降させると
、第1の当接部14.aははんだが塗布された導電パタ
ーン12に近接又は当接し、第2の当接部l5はキャリ
ャフィルム1に当接する。
Next, the operation of the present invention will be explained. First, the semiconductor device 10
are placed on the printed wiring board 1l, and the outer leads 3 are aligned with the conductive patterns 12, respectively. In this state, heat with heater l7 (temperature at the tip is 350 to 40
When the bonding tool 13a that has been heated to 0° C. is lowered, the first contact portion 14. a is close to or in contact with the conductive pattern 12 coated with solder, and the second contact portion l5 is in contact with the carrier film 1.

そしてボンディングツール13aを加圧( 3 kg 
/ cd以下)すると、導電パターンl2に塗布したは
んだが溶融し、アウターリード3は短時間(1〜2,5
秒)で導電パターン12に接続される。
Then, pressurize the bonding tool 13a (3 kg
/ cd or less), the solder applied to the conductive pattern l2 melts, and the outer lead 3 is heated for a short time (1 to 2,5
seconds) to connect to the conductive pattern 12.

また、プリント配線基板l1の両面の対称位置に半導体
装置10.10aを実装する場合は、ボンディング装置
にプリント配線基板1lの反転装置を組合せ、プリント
配線基板11の一方の面に半導体装置(例えば10a)
を装着したのちプリント配線基板11を反転させれば、
他方の面に別の半導体装置10を装着することができる
。さらに、プリント配線基板L1の一方の面(下面)に
半導体装置IOを仮付けすることにより、2台のボンデ
ィングツールを使用して両面同時に半導体装置10.l
ogを装着することも可能であり、あるいは既に装着さ
れている半導体装置の裏側に半導体装置を装着すること
もできる等、高密度実装を行なうことができる。
In addition, when mounting semiconductor devices 10.10a at symmetrical positions on both sides of the printed wiring board 11, a reversing device for the printed wiring board 1l is combined with the bonding device, and the semiconductor device 10.10a is mounted on one side of the printed wiring board 11 (for example, )
If the printed wiring board 11 is reversed after mounting the
Another semiconductor device 10 can be mounted on the other surface. Further, by temporarily bonding the semiconductor device IO to one surface (lower surface) of the printed wiring board L1, the semiconductor device 10 is simultaneously bonded to both sides using two bonding tools. l
OG can be mounted, or a semiconductor device can be mounted on the back side of a semiconductor device that has already been mounted, allowing high-density mounting.

第3図は本発明の別の実施例を示す断面図である。本実
施例においてはボンディングツールtabの底面中央部
に第1の当接部14bを設けると共に、その両側に第2
の当接部15a. 15bを設けたものである。
FIG. 3 is a sectional view showing another embodiment of the present invention. In this embodiment, a first contact part 14b is provided at the center of the bottom surface of the bonding tool tab, and second contact parts 14b are provided on both sides of the first contact part 14b.
contact portion 15a. 15b is provided.

上記のように構成した本実施例においては、第3図(a
)に示すように、先ず、ボンディングツール13bによ
り一方の側(図では右側)の導電パターンl2とアウタ
ーリード3とを接続し、次にボンデンイングツール13
bを矢印方向に移動させ、第3図(b)に示すように他
方の側(図では左側)の導電パターン12とアウターリ
ード13とを接続するようにしたもので、これは形状の
異なるパッケージの半導体装置を多数実装する場合に、
特に有効である。
In this embodiment configured as described above, FIG.
), first, the conductive pattern l2 on one side (the right side in the figure) and the outer lead 3 are connected using the bonding tool 13b, and then the bonding tool 13
b is moved in the direction of the arrow to connect the conductive pattern 12 on the other side (the left side in the figure) and the outer lead 13 as shown in FIG. 3(b). When mounting a large number of semiconductor devices,
Particularly effective.

上記の実施例では、本発明をキャリャフィルムを使用し
た半導体装置を実装する例について説明したが、リード
フレームを使用した半導体装置など、他の半導体装置を
基板に実装する場合にも実施することができる。
In the above embodiment, the present invention was explained as an example of mounting a semiconductor device using a carrier film, but the present invention can also be implemented when mounting other semiconductor devices on a board, such as a semiconductor device using a lead frame. I can do it.

[発明の効果] 以上詳述したように、本発明は1台のボンディングツー
ルで、はんだが塗布された導電パターンとアウターリー
ドとを同時に加熱して接続するようにしたので、次のよ
うな顕著な効果を得ることができる。
[Effects of the Invention] As detailed above, the present invention uses one bonding tool to heat and connect the conductive pattern coated with solder and the outer lead at the same time. effect can be obtained.

(1)プリント配線基板を予熱するための加熱台が不要
であり、設備を簡素化することができる。
(1) A heating table for preheating the printed wiring board is not required, and the equipment can be simplified.

また、プリント配線基板の両面に対向して半導体装置を
装着することもできるので高密度実装が可能となる。
Further, since semiconductor devices can be mounted facing both sides of the printed wiring board, high-density packaging is possible.

(2)ボンディングッールの加圧力を従来のl/3以下
に低減でき、ボンディング時間も従来のl/6以下にで
きるので、生産性を大福に向上させることができる。
(2) The pressurizing force of the bonding tool can be reduced to 1/3 or less compared to the conventional method, and the bonding time can also be reduced to 1/6 or less compared to the conventional method, so productivity can be greatly improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明実施例の縦断面図、第2図はそのボンデ
ィングツールの底面図、第3図(a) . (b)は本
発明の他の実施例の説明図、第4図はキャリアフィルム
を使用した半導体装置の説明図、第5図はそのA−A断
面図、第6図は従来のボンディング方式を示す断面図で
ある。 1:キャリャフィルム、3:アウターリード、3a:イ
ンナーリード、6:半導体素子、10:半導体装置、1
1:プリント配線基板、l2:導電パターン、13a.
l3b :ボンディングツール、14a.l4b:第1
の当接部、15.l5a.L5b :第2の当接部、L
7:ヒータ。
FIG. 1 is a longitudinal sectional view of an embodiment of the present invention, FIG. 2 is a bottom view of the bonding tool, and FIG. 3(a). (b) is an explanatory diagram of another embodiment of the present invention, FIG. 4 is an explanatory diagram of a semiconductor device using a carrier film, FIG. FIG. 1: carrier film, 3: outer lead, 3a: inner lead, 6: semiconductor element, 10: semiconductor device, 1
1: Printed wiring board, l2: Conductive pattern, 13a.
l3b: bonding tool, 14a. l4b: 1st
contact portion, 15. l5a. L5b: second contact part, L
7: Heater.

Claims (2)

【特許請求の範囲】[Claims] (1)半導体装置のアウターリードをボンディングツー
ルにより基板に設けた導電パターンに接続する装置にお
いて、 前記ボンディングツールの先端部に前記導電パターンに
当接する第1の当接部を設けると共に、該第1の当接部
の内側に前記アウターリード又はキャリアフィルムに当
接する第2の当接部を設けたことを特徴とする半導体装
置のボンディング装置。
(1) In an apparatus for connecting an outer lead of a semiconductor device to a conductive pattern provided on a substrate using a bonding tool, a first contact portion that contacts the conductive pattern is provided at the tip of the bonding tool; A bonding device for a semiconductor device, characterized in that a second contact portion that contacts the outer lead or the carrier film is provided inside the contact portion of the semiconductor device.
(2)ボンディングツールの先端部の中央部に第1の当
接部を設けると共に、該第1の当接部の両側に第2の当
接部を設けたことを特徴とする請求項(1)記載の半導
体装置のボンディング装置。
(2) Claim (1) characterized in that a first contact portion is provided in the center of the tip of the bonding tool, and second contact portions are provided on both sides of the first contact portion. ) A bonding apparatus for a semiconductor device according to the above.
JP1228206A 1989-09-05 1989-09-05 Semiconductor device bonding method and bonding apparatus Expired - Fee Related JP2803211B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1228206A JP2803211B2 (en) 1989-09-05 1989-09-05 Semiconductor device bonding method and bonding apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1228206A JP2803211B2 (en) 1989-09-05 1989-09-05 Semiconductor device bonding method and bonding apparatus

Publications (2)

Publication Number Publication Date
JPH0391990A true JPH0391990A (en) 1991-04-17
JP2803211B2 JP2803211B2 (en) 1998-09-24

Family

ID=16872858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1228206A Expired - Fee Related JP2803211B2 (en) 1989-09-05 1989-09-05 Semiconductor device bonding method and bonding apparatus

Country Status (1)

Country Link
JP (1) JP2803211B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6485109B2 (en) 1999-05-28 2002-11-26 Simpson Industries, Inc. Knuckle hub assembly and method for making same
JP2007508204A (en) * 2003-10-10 2007-04-05 チバ スペシャルティ ケミカルズ ホールディング インコーポレーテッド Method and arrangement for emptying a big bag
US9120195B2 (en) 2009-02-20 2015-09-01 Diversified Machine, Inc. Wheel assembly and method for making same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6448496A (en) * 1987-08-19 1989-02-22 Fujitsu Ltd Soldering device for flat package ic

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6448496A (en) * 1987-08-19 1989-02-22 Fujitsu Ltd Soldering device for flat package ic

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6485109B2 (en) 1999-05-28 2002-11-26 Simpson Industries, Inc. Knuckle hub assembly and method for making same
US6634266B2 (en) 1999-05-28 2003-10-21 Simpson Industries, Inc. Wheel hub assembly fixture
USRE42914E1 (en) 1999-05-28 2011-11-15 Dmi Edon Llc Knuckle hub assembly and method for making same
JP2007508204A (en) * 2003-10-10 2007-04-05 チバ スペシャルティ ケミカルズ ホールディング インコーポレーテッド Method and arrangement for emptying a big bag
US9120195B2 (en) 2009-02-20 2015-09-01 Diversified Machine, Inc. Wheel assembly and method for making same

Also Published As

Publication number Publication date
JP2803211B2 (en) 1998-09-24

Similar Documents

Publication Publication Date Title
JPH03166739A (en) Method for soldering
JPH0828583B2 (en) Multilayer printed circuit board, manufacturing method thereof, and ball dispenser
JPH1050886A (en) Conductive polymer ball bonding to grid array semiconductor package
JPH0391990A (en) Bonding device for semiconductor device
JPH118474A (en) Manufacture of multilevel board
JP3348830B2 (en) Solder bump bonding apparatus and solder bump bonding method
JPH0468778B2 (en)
JPH0362935A (en) Mounting method for film carrier type semiconductor device
JPH09153562A (en) Method of mounting solder ball on pad area array package
JPH0878599A (en) Integrated circuit package and manufacture thereof
JPS6222278B2 (en)
JPH1012992A (en) Mounting method and electronic component housing pallet
KR20070044552A (en) Reflow soldering apparatus for flexible printed circuit board
JPH02231737A (en) Method of connecting electrode
JP2526796B2 (en) Tape carrier package
JPH08222845A (en) Method for mounting semiconductor device
JPH07201894A (en) Manufacture of electronic parts mounting device
JPH04151844A (en) Outer lead bonding equipment
JPH0677285A (en) Mounting of ic element
JPH03183143A (en) Semiconductor device and its mounting structure
JPH0432785Y2 (en)
JPH1022315A (en) Formation of electric circuit
JPH04340790A (en) Reflow soldering method for tab package
JPS58197758A (en) Tape carrier device and mounting method thereof
JPH11233685A (en) Semiconductor device, substrate therefor, manufacture thereof, and electronic device

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees