JPH0391170A - Pcm signal reproducing device - Google Patents

Abstract

PURPOSE:To eliminate an abnormal sound in a reproducing audio signal by providing an envelope detecting means to check the level of a reproducing signal, a data prohibiting means to convert reproducing data to error incorrectable data under the control of the envelope detecting means, and a coincidence detecting means to prohibit output under the control of the envelope detecting means. CONSTITUTION:When data omission occurs in variable speed reproduction, etc., the level of an envelope is decreased, therefore,the data omission can be discriminated by detecting the decrement of the level with the envelope detecting means 30. At this time, the output of data is prohibit with the data prohibiting means 10 regardless of the output of a four-phase phase demodulation circuit 6, and incorrectable error correction can be surely realized in error correction, and an interpolation processing is performed. Therefore, erroneous detection or correction due to the random property of the output data of the four-phase phase demodulation circuit 6 when the data omission occurs can be prevented performed. In such a way, the abnormal sound of the reproducing audio signal can be prevented occurring.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an apparatus for reproducing PCM encoded audio signals recorded on a magnetic tape or the like.

[Prior Art] In a conventional video tape recorder (hereinafter referred to as a VTR), for example, a digital audio recording video tape recorder described in Japanese Patent Application Laid-Open No. 171403/1983, a PCM encoded audio signal ( Hereinafter referred to as PCM audio signal), the video signal and this FM
It was designed to be recorded and played back along with audio signals on tracks on magnetic tape. In such a VTR, PCM
It employs four-phase phase modulation to reduce the transmission rate of audio signals, and this allows simultaneous recording and playback of video signals, FM audio signals, and PCM audio signals within the same magnetic tape area. It makes it possible.

[Problems to be Solved by the Invention] In the above-mentioned conventional technology, since four-phase phase modulation is performed on the PCM audio signal, the synchronization signal that indicates the beginning of a block that is a delimiter of PCM data is used as a synchronization signal that is the same as one PCM data. Since a pattern must be selected, there is a problem in that the synchronization signal cannot be set as a prohibited pattern, and the probability of erroneously detecting the synchronization signal increases.

Furthermore, during variable speed playback such as fast-forward playback, if data is missing due to the head not scanning the tracks on the magnetic tape correctly, the PCM data due to this loss will not be fixed to all highs or all lows.
This results in random data, and as a result, errors occur in an amount that exceeds the detection ability of error correction.

A problem also arises in that the probability of false detection or false correction becomes very high.

As a result of the above, when reproducing a PCM audio signal by performing variable speed reproduction using the above-mentioned conventional technology, it is difficult to detect erroneous synchronization signals due to randomness of reproduced PCM data when data is missing or to correct errors in PCM data. By increasing the probability of false correction, false detection,
There have been problems such as the occurrence of abnormal sounds in the reproduced audio signal and malfunction of the microcomputer due to incorrect detection of sampling frequency, search information, etc.

It is an object of the present invention to provide a PCM signal reproducing apparatus which solves such problems and can prevent errors in data detection and correction caused by missing reproduced PCM data during variable speed reproduction such as fast forward reproduction. It is about providing.

[Means for Solving the Problems] In order to achieve the above object, the present invention includes an envelope detecting means for checking the level of a reproduced signal, and converting reproduced data into error-uncorrectable data under the control of the envelope detecting means. A means for inhibiting data to be converted and a coincidence detecting means for inhibiting information output to the microcomputer under control of the envelope detecting means are provided.

In addition, in the present invention, instead of checking the level of the envelope, the data inhibiting means and the coincidence detecting means are controlled by checking the frequency of detection of a part of the header other than PCM data such as a synchronization signal. is output as a pseudo envelope detection signal.

[Operation] When data loss occurs due to variable speed playback, etc.
Since the level of the envelope of the reproduced signal decreases, the envelope detection means can reliably determine data loss by detecting this decrease in level. At this time, the data inhibiting means inhibits data regardless of the output of the four-phase phase demodulation circuit, so that error correction can be reliably made uncorrectable, and therefore, interpolation processing can be performed. Thereby, it is possible to prevent erroneous detection and erroneous correction due to the randomness of the output data of the four-phase phase demodulation circuit when data is missing, and it is possible to prevent abnormal sounds in reproduced audio.

Furthermore, the coincidence detection means that outputs the sampling frequency and the like to the microcomputer when data is missing can also be inhibited from outputting to the microcomputer when data is missing under the control of the envelope detection means, so malfunction of the microcomputer can be prevented.

Furthermore, when the level of the reproduced signal decreases, the error rate of the reproduced data naturally increases. Therefore, by checking the detection status of synchronization signals, etc., and controlling the data prohibition means and coincidence detection means according to the frequency of errors, abnormal sounds can be prevented and microcontroller malfunctions can be prevented without the need for special envelope detection means. Equivalent effects can be obtained in terms of prevention.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a PCM signal reproducing device according to the present invention, in which 1 is a rotary cylinder, 2 is a magnetic tape, 3 is a servo circuit, 4 is a PCM audio signal reproduction amplifier, and 5 is a video signal. A signal reproduction amplifier, 6 a QPSK demodulation circuit for demodulating a PCM audio signal subjected to quadrature phase modulation, 7 a video signal processing circuit, 8 a video signal output terminal, 9 a switch, 10 a data prohibition circuit, 11 a A synchronization signal detection circuit, 12 a parity detection circuit, 13 an ID detection circuit, 14
is a shift register forming an S/P (serial/parallel conversion) circuit, 15 is a coincidence detection circuit, 16 is a data bus,
17 is a RAM (random access memory) address control circuit, 18 is a timing generation circuit, 19 is a crystal oscillator, 20 is a microcomputer (hereinafter referred to as microcomputer), 21 is an error correction circuit, 22 is an interpolation circuit, 23 is an RA
M, 24 is a D/A (digital/analog) converter,
25° 26 are audio signal output terminals, 27A and 27B are P
28A and 28B are magnetic heads for video signals; 29 is an input terminal for variable reproduction command signals; 3
0 is an envelope detection circuit.

2(a) shows the format of the PCM audio signal, and FIG. 2(b) shows the track pattern of the PCM audio signal on the magnetic tape 2 in FIG. In (a) and (b) of the same figure, E,..., Ok.

(However, l, Jy k, Q=Ot ly 2t...
) are even-numbered sample data and odd-numbered sample data of a code obtained by converting an audio signal into PCM within a unit time divided every 6.6 msec, respectively.

Each contains 312 samples or 3z4 samples, and there are 30 or more blocks each consisting of 35 symbols (1 symbol = 1 byte). In each case, the smaller the number for 1eJvkpQ, the earlier the time unit is included in the time series of the audio signal.

On the magnetic tape 2 in FIG. 1, tracks 31.3 on which PCM audio signals are recorded are shown in FIG. 2(b).
2 is formed, but adjacent tracks are recorded at different azimuth angles, and the magnetic head 27A for PCM audio signals records every third track.
The magnetic head 27B for the M audio signal reproduces every other track 32, and when scanning tracks with different azimuth angles, the PCM audio signal is almost always not reproduced. There is. Hereinafter, such a recording method will be referred to as azimuth recording.

Each track records five pieces of sample data separated by 6.6 msec as shown in Figure 2 (,).

Even-numbered sample data and odd-numbered sample data are recorded alternately. Therefore, in one track,
aox5=-150 blocks are recorded, and these 150 blocks correspond to one field period of the video signal (=16
．． The time width is compressed to 7 ms) and recorded on one track.

FIG. 3 shows a block configuration of a PCM audio signal.

In the figure, the block includes a header of 4 symbols and a header of 2 symbols.
3 symbols of PCM data 40 and 8 symbols of error correction parity (hereinafter referred to as C1 parity) 41 or 31 symbols of PCM data 40 (CI parity 41)
I am admonished because I do not have the same knowledge. The header is a synchronization signal 36 indicating the beginning of the block. Block address 37 indicating the position of the block within the track, I indicating information such as sampling frequency, whether or not copying is prohibited, search information, etc.
D information 38, block address 37 and ID information 38
It consists of parity 39 obtained by exclusive ORing with Note that a plurality of identical pieces of ID information 38 are multiplex recorded within one track.

The operation of this embodiment will be explained below, but first, the operation during normal playback will be briefly explained.

In FIG. 1, a PCM audio signal magnetic head 27A,
27B is amplified by the PCM audio reproduction amplifier 4 and demodulated by the QPSK demodulation circuit 6 to generate the PCM audio signal A and the reproduced clock B. 6 During normal reproduction operation, the signal A' is amplified by the PCM audio reproduction amplifier 4 and demodulated by the QPSK demodulation circuit 6 to generate the PCM audio signal A and the reproduction clock B. The switch 9 is opened by the variable speed switching signal C that is output.
The data inhibiting circuit 10 is in a state in which no data inhibiting operation is performed. For this reason, the PCM audio signal A passes through the data inhibition circuit 10 as it is, and together with the reproduced clock B,
A shift register 14 which is an S/P circuit, a synchronization signal detection circuit 11, a parity detection circuit 12 and an ID extraction circuit 13
sent to. In the synchronization signal detection diagram jllll, a synchronization signal 36 (FIG. 3) is detected from the PCM audio signal A, the beginning of the block is determined, and a synchronization detection signal is generated. The parity detection time is determined by this synchronization signal. 12. The operation timing of the ID extraction circuit 13 and shift register 14 is controlled.

The PCM audio signal E, which is serial data output from the data prohibition circuit 10, is supplied to the shift register 14,
The PCM data 40 and C1 parity 41 are output as parallel data F. This parallel data F is transmitted to the timing generation circuit 18 and the RAM address control circuit 17.
By control of.

- After being stored in the RAM 23, the error correction circuit 21 performs error correction, and then the interpolation circuit 22 interpolates or holds the previous value of the PCM data determined to be uncorrectable at the error correction port $21. Thereafter, the PCM audio signal is read out from the RAM 23, converted into an analog audio signal G1°G2 by the D/A converter 24, and sent to the output terminal 25.
26.

Furthermore, as explained earlier, the ID information 38 (FIG. 3) extracted by the ID extraction circuit 13 is multiplex recorded in one track, but the error correction circuit 21 does not perform error correction. Therefore, the reliability of this ID information 38 is increased by selecting and outputting data that match two or more times in a row regarding the same 10 pieces of information 38 within one track. The match detection circuit 15 detects such ID information 3.
8, and here.

By selectively outputting matched data to the microcomputer 20, erroneous detection of sampling frequency, search information, etc., and erroneous operation are prevented.

Next, the variable speed reproducing operation of this embodiment will be explained.

During variable speed playback, the relative speed between the magnetic tape 2 and the PCM audio signal magnetic heads 27A, 27B changes, so the scanning trajectories of these magnetic heads 27A, 27B change as follows.
During normal playback operation, as the feed speed of arrow 2 shown in FIG. 2(b) increases, arrow 34. The tracing direction changes in the direction of arrow 35.

FIG. 4 shows the trace situation during double speed reproduction, where 42A and 42B are scanning trajectories by the magnetic head 27A, and 43 is the scanning trajectory by the magnetic head 27B, by the above-mentioned azimuth recording.

At this time, only the shaded portions of the tracks 31A, 31B, 31C, 32A, and 32B are reproduced.

The levels of the reproduced signals from . . . corresponding to these tracks are shown in FIG. 5. Figure 5(a)
is the track pattern, and FIG. 5(b) is the reproduced signal A', and it can be seen that there are sections where the level is lowered, that is, sections where the signal is not reproduced.

In this embodiment, as described above, four-phase phase modulation is used to record the PCM audio signal.

In the section where the level of the reproduced signal A' is low, the phase change is randomly measured by fR due to the influence of noise, etc., and the demodulated PCM audio signal A is output as random data.This random data is directly stored in the RAM 23.
If the error correction circuit 21 performs error correction (referred to as C1 correction) using the C1 parity 41, this will cause an error that exceeds the detection capability.

Therefore, in order to prevent this abnormal sound, the magnetic head 27A
, 27B, when the level of the reproduced signal A' from 27B is low, 0
1 correction, it is necessary to be able to reliably detect errors.

In FIG. 1, the envelope detection circuit 30 is for detecting the above-described level drop of the reproduced signal A'.
When the level of the playback signal A' from the PCM audio playback amplifier 4 is higher than a certain set value, the level is high (hereinafter referred to as 'H').
), and when it is below this set value, it is low level (“L”).
The procedure for outputting the envelope detection signal H that becomes "") will be explained with reference to FIG. ) is obtained.

Here, a variable speed switching signal is supplied from the input terminal 29 to the microcomputer 20, and the microcomputer 20 outputs the variable speed switching signal C to close the switch 9. As a result, the envelope detection signal H is sent to the data inhibition circuit 1o. In the data prohibition circuit 10, when the envelope detection signal H is ttH'', the reproduced PCM audio signal A is passed through as is, and when at L I7, it is determined that correction is definitely impossible in the C1 correction in the error correction circuit 21. As a result, data errors can be detected by C1 correction without leaking in the section where the envelope of the reproduced signal A' does not reach a certain level.

FIG. 6 shows the audio output waveform when the reproduced signal A' as shown in FIG. 5 is obtained. According to FIG. 5, the sample to be played is 0ooeE o z +
Oo t t Ox. y Elx, OHte available (6th
Samples with a 0 mark in the table of the figure), and samples other than these are data converted as described above by the data prohibition circuit 10 (samples with a mark of 0 in the table of Fig. 6). (a certain sample), it is determined that there is an error with 01 correction.

During audio output, data determined to be uncorrectable by CI correction is interpolated by the interpolation circuit 22. As a result, Eo. .

E6L-0°1. E! . , E□, 022 will be interpolated with the reproduced samples and output, so the time series Nos. 00 to 02 and 20 in FIG.
~22 samples are output successfully.

However, in time series Nos. 03 to 04 and 23 to 24, neither the even-numbered samples nor the odd-numbered samples are reproduced, so the previous output values are held in these sections. Therefore, the audio output waveform becomes as shown in FIG.

By the way, if 01 correction is directly performed on random data in a low-level section of the reproduced signal A' without using this embodiment, there is a high probability that erroneous detection and erroneous correction will occur. Among the samples marked with an x in the table, there is data for which 01 correction is determined to be OK, and in this case, the interpolation by the interpolation circuit 22 and the previous value retention are no longer performed, and the sound quality only deteriorates. Not.

An abnormal sound is output.

However, in this embodiment, it is possible to perform interpolation on all the data in the section where the reproduction level is low, so the quality of the reproduced sound can be improved and abnormal sounds can be prevented.

FIG. 7 is a block diagram showing a specific example of the data prohibition circuit 10 in FIG. 1, in which 44 is an input terminal for the envelope detection signal H, 45 is a demodulated PCM audio signal type output terminal, and 46 is an inverted circuit.

47 is an OR circuit, 48 is a pull-up resistor for fixing the input of the inversion circuit 46 to "Htp" when the switch 9 is open, and 49 is an output terminal of the data inhibit circuit 10.

In the figure, when the switch 9 is open or even when the switch 9 is closed, the envelope detection signal H is
iH", the output of the inverting circuit 46, which is one input of the OR circuit 47, becomes it L", so the output terminal 4
9, the PCM audio signal from the input terminal 45 is output as is. On the other hand, when the envelope detection signal H is "L" with the switch 9 closed, the output of the inverting circuit 46 input to the OR circuit 47 becomes "H", so the output signal E of the output terminal 49 is PCM In this case, in the C1 correction performed by the error correction circuit 21 (Fig. 1), all high data is always determined to be uncorrectable, and as a result, the above data prohibition is performed. The effect will be affected.

FIG. 8 is a block diagram showing a specific example of the shift register 14 having the function of the data inhibition circuit 10 in FIG. Portions corresponding to FIG. 7 and FIG. 1 are given the same reference numerals.

In the figure, a set shift register 51 is supplied with an S input from an inversion circuit 46, and has a function of setting all bits of the output F to "H" when this S input is "H". Envelope detection signal H is “H” even if switch 9 is open or switch 9 is closed.
When , the S input of the shift register with set 51 is “L”
Therefore, the reproduced parallel data F, which is the output thereof, is obtained by converting the PCM audio signal from the input terminal 45 into parallel data. On the other hand, when the envelope detection signal H is "ML" with the switch 9 closed, the S input of the shift register with set 51 becomes "H" and the shift register with set 51 is set, so that the reproduced parallel data F is all high. Therefore, the same effect as the specific example shown in FIG. 7 is achieved.

Compared to the specific example shown in FIG. 7, the specific example shown in FIG. 8 does not require a special gate and does not cause an increase in the PCM audio signal transmission rate, so it can be used when the transmission rate is high. Particularly effective.

By the way, as for the ID information 38 (Fig. 3), it is fixed to the PCM audio audio signal formula H'', which is the reproduced serial data in the data prohibited section (the section where the level of the reproduced signal A' is low), so that the ID information 38 is continuous. Then, the -number output circuit 15 detects this match and supplies the all-high ID information 38 data to the microcomputer 20.Therefore, in the data prohibition section, there is always a mismatch. It is necessary to control the coincidence detection circuit 15 so that this occurs.

FIG. 9 is a block diagram showing a specific example of the coincidence detection circuit 15 controlled in this manner, in which 52 is an output terminal, 53 .
54 is a latch circuit, 55 is an AND gate, 56 is a pull-up resistor for fixing one input of AND gate 55 to "H" when switch 9 is open, 57 is an input terminal for envelope detection signal H, 58 is a shift register, 59 is an input terminal for reproduced clock B, 60 is an input terminal for PCM audio signal E, 61 to 68 are ExOR (exclusive OR) circuits, and 69 is an 8-person NOR circuit.

In the same figure, the shift register 58 is I in FIG.
It constitutes the D extraction circuit 13, and is shown here as being included in the - number circuit 15. This shift register 58 is timing-controlled by a synchronization detection signal from the synchronization signal detection circuit 11 (FIG. 1), and receives PCN audio signal ID information from an input terminal 60 in response to a reproduced clock B from an input terminal 59. Extract 38. Then, before the next ID information 38 is supplied, the ID information 38 in the shift register 58 is latched by the latch circuit 54.

The output of the shift register 58 and the output of the latch circuit 54, which is the previous ID information 38, are connected to ExOR circuits 61 to 68.
Only when these outputs match at the same time, all outputs of ExOR circuits 61 to 68 become "L" and the output of NOR circuit 69 becomes "H". Here, whether switch 9 is open or not. When the envelope detection signal H is “H” even if the switch 9 is closed, the AND gate 55
Since the input H' becomes "H", the output of the NOR circuit 69 is sent as is to the latch circuit 53. Latch circuit 53
Now, when the output of the AND gate 55 is "H", the output of the latch circuit 54 is latched.

When it is "L", it is not latched, so that the data J output from the output terminal 52 to the microcomputer 20 (FIG. 1) becomes the actual ID information 38 that has matched twice in a row.

On the other hand, when the envelope detection signal H is "L" with the switch 9 closed, the output of the AND gate 55 is "L" regardless of the output of the NOR circuit 69, so the latch operation of the latch circuit 53 is performed. Therefore, the all-high data J in the data prohibited section is
It is possible to reliably prevent the data from being sent to o.

Note that the input to the ID extraction circuit 13 is not for the PCM audio audio signal as reproduced serial data that is the output of the data prohibition circuit 10, but for the PCM audio audio signal from the output circuit 6 of the QPSKfi tone circuit 6, and the envelope detection is used as is. Although it is possible to control the coincidence detection circuit 15 using the signal H (therefore, the AND gate 55 is not provided in FIG. 9), when the reproduction level decreases, as mentioned above, the random data for the PCM audio audio signal is Therefore, there is a risk of erroneous detection of a match, and incorrect data is transferred to the microcontroller 2.
This increases the possibility of outputting 0.

The configurations shown in FIGS. 1 and 9 are better.

By the way, in the embodiment shown in FIG. 1, a circuit 30 for detecting the envelope level is required, and this circuit 3
0, setting values for level comparison must be adjusted. In contrast, a method can be considered in which the envelope detection signal H is generated in a pseudo manner by determining the detection status of the Herag in each block shown in FIG. 3 without using the envelope detection circuit 30.

FIG. 10 is a block diagram showing another embodiment of the PCM signal reproducing apparatus according to the present invention in which the envelope detection circuit can be omitted by using this method, in which 70 is a header check circuit and 71 is a switch. 1, and the same reference numerals are given to the parts corresponding to those in FIG. 1, and redundant explanation will be omitted.

In the same figure, this embodiment is similar to the embodiment shown in FIG. 1 in that the PCM audio signal of the reproduced serial data, which is the output of the data inhibition circuit 10, is used as an input to the shift register 14, but the synchronization signal The difference is that the PCM audio signal from the output circuit 6 of the QPSKaE tone circuit 6 is used as input to the circuit 11, the parity detection circuit 12, etc. Therefore, regardless of the data prohibition circuit 10, P
It is possible to check the synchronization signal 36 and parity 39 (FIG. 3) included in the tag of the CM audio audio signal block.

Therefore, these synchronization signals 36. The detection status of the parity 39 etc. is monitored by the header check circuit 70, and when there are few errors in the header, it is "H", and when there are many errors, it is "L".
By generating the pseudo-envelope detection signal K that becomes ", the function is equivalent to that of an envelope detection circuit.As a result, when there are many errors in the header, the data prohibition circuit 10 is activated to detect the PCM audio signal A. P of
Since it is possible to inhibit the CM data 40 and the C1 parity 41 (FIG. 3), it is possible to obtain the same performance as the embodiment shown in FIG.

FIG. 11 shows the header check circuit 70 in FIG.
FIG. 2 is a block diagram showing a specific example.

This is normal when the synchronization signal 36 and parity 39 (Fig. 3) are detected normally for two or more blocks in a row (pseudo envelope detection signal K is "H"), otherwise it is faulty (pseudo envelope detection signal 72 is an input terminal for the synchronization detection signal, 73 is an input terminal for the parity detection signal, 74 is an input terminal for the recovered clock B, 75.76 is an AND gate, and 77 is an input terminal for the reproduction clock B. Shift register, 78 is a latch circuit, 79 is a clock generation circuit, 8
0 is an output terminal for a pseudo envelope signal. In addition,
The synchronization detection signal D and the parity detection signal are the results of synchronization signal detection by the synchronization signal detection circuit 11 and parity detection by the parity detection circuit j812, respectively.

This is a signal that holds "H" if it is normal and "L" if it is defective for one block.

Further, FIG. 12 is a timing chart showing signals of each part in FIG. 11, and signals corresponding to those in FIG. 11 are given the same reference numerals. In addition, FIG. 12(a) shows error status of Herag for each block, S is synchronization signal 36, P is parity 38, OK is normal detection,
NG means defective.

In FIG. 11, as shown in FIG. 12, the synchronization detection signal and parity detection signal are "L" when NG, and OK.
When the signal is "Hpp", the output of the AND gate 75 becomes "H" only when both the synchronization detection signal and the parity detection signal are "H".

The output of this AND gate 75 is the output of the clock generation circuit 7.
The output g of the AND gate 76 is shifted block by block by the shift register 77 by the clock d from 9, and the product of two blocks is calculated by the AND gate 76. ．．
It becomes "H" only when parity 38 is detected.

Note that the output g of the AND gate 76 is latched in the latch circuit 78 by the clock h from the clock generation circuit 79, but this is only to prevent hazards of the AND gate 76, and the data prohibition circuit 10 etc. This is not necessary if the system is configured to operate normally even in response to hazard inputs.

As described above, it is possible to detect a data prohibited section by detecting an increase in header errors due to a decrease in the level of the PCM audio signal. In this case, as shown in FIG. 1, the data loss detection rate is lower than when using the envelope detection circuit 30, but when converting the PCM signal processing circuit into an LSI, external parts and It is possible to prevent abnormal sounds in audio output during variable speed playback, etc., without increasing the number of board locations.

Note that the header check circuit 7 shown in FIGS. 10 and 11 uses only the synchronization signal 36 and the parity 39 (FIG. 3) as criteria for determining header error status, but in addition, the block address 37 By adding information such as the continuity of the ID information 38 (FIG. 3) and the number of occurrences of the ID information 38 (FIG. 3), the detection rate of data loss can be improved. Furthermore, in the case of the specific example shown in FIG.
Although two blocks are detected consecutively, only one block or three or more blocks may be detected.

In addition, in FIG. 10, for example, the data prohibition port Jtl 10 is used until the first synchronization signal is detected for each track.
Control switch, PGM data 40 and C1 parity 41
(FIG. 3) can be easily realized, so that even if the beginning of a track is lost due to dropout or the like during normal playback operation (operation where variable speed playback is not possible).

It becomes possible to prevent abnormal sounds due to CI correction and erroneous detection.

Furthermore, in FIGS. 1 and 10, the envelope detection times j! 30. Switches 9 and 71 are provided between the header check circuit 70 and the data inhibit circuit 10, but by omitting these switches, when there is a dropout due to dropout etc. during normal playback operation, the above-mentioned It is possible to provide a data prohibited section as shown in FIG. However, in this case, data that could originally be corrected by the error correction circuit 21 is also prohibited, causing a problem that the number of samples interpolated by the interpolation circuit 22 increases.

Note that in the data prohibition circuits shown in FIGS. 7 and 8, all high data is used as the prohibited data, but there is no particular need to fix it to this, and errors are always detected in the CI correction performed at the error correction port j121. Any data that can be determined to be impossible to correct may be used.

Further, as means for inhibiting data when data is missing, in addition to the above-described method performed at the stage before the shift register 14, (1) converting the 0101 correction data.

(2) Control the 01 correction operation and do not perform the 01 correction.

(2) Control the interpolation circuit 22 to interpolate data when the envelope level drops.

However, method (2) is not practical because the timing control becomes extremely complicated.

FIG. 13 shows an embodiment of a PCM signal reproducing apparatus according to the present invention using methods (1) and (2).

In this embodiment, the envelope detection signal H is supplied to the timing generation circuit 18, and the 01 stop command signal M is generated and supplied to the error correction circuit 21 at the timing for 01 correction of data corresponding to data loss. In the error correction circuit 21, when the C1 stop command signal M is supplied, the RAM
Either convert the input data from 23 into prohibited data, or control the 01 correction algorithm and do not perform 01 correction.

Processing is performed to determine that all data is uncorrectable.

As described above, it is possible to obtain the same effect as the embodiment shown in FIG. 1, but in that a circuit for timing control of the C1 stop command signal M is newly required,
This is different from the embodiment shown in FIG.

In the above description, double speed playback was mainly taken as an example during variable speed playback, but the present invention can provide exactly the same effect even in variable speed playback of triple speed or higher.

It goes without saying that the present invention is also applicable to systems having formats in which even-numbered samples and odd-numbered samples are not clearly divided, such as the recording format shown in FIG. Nor.

[Effects of the Invention] As explained above, according to the present invention, it is possible to prevent erroneous detection and erroneous correction during error correction, and to perform interpolation reliably using an interpolation circuit with respect to data whose reproduction signal level has decreased. This makes it possible to prevent abnormal sounds in the audio playback output due to incorrect detection or incorrect correction during error correction, such as during variable speed playback where playback data is missing. Since the output of sampling frequency, search information, etc. can be similarly prohibited, malfunctions can be prevented during variable speed playback.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a PCM signal reproducing device according to the present invention, FIG. 2(a) is a schematic diagram showing a recording format of a PCM audio signal, and FIG. Figure 3 is a schematic diagram showing the track pattern on the tape, Figure 3 is the block composition of the PCM audio signal, Figure 4 is a diagram showing the scanning locus of the magnetic head on the magnetic tape during double speed playback, Figure 5 is Waveform diagram 6 showing the playback signal and envelope detection signal in FIG. 1 during double speed playback.
The figure is a diagram showing whether each sample can be reproduced or not and the waveform of an audio signal with respect to the signal waveform shown in FIG. 5. 7 is a block diagram showing a specific example of the data inhibiting circuit in FIG. 1, FIG. 8 is a block diagram showing a specific example of the serial/parallel conversion circuit having the data inhibiting function in FIG. 1, and FIG. is a block diagram showing a specific example of the coincidence detection circuit in FIG. 1, and FIG.
Block diagram showing another embodiment of the M signal reproducing device, No. 11
10 is a block diagram showing a specific example of the header check circuit in FIG. 10, FIG. 12 is a timing chart showing signals of each part in FIG. 11, and FIG. 13 is a further embodiment of the PCM signal reproducing apparatus according to the present invention. FIG. 2 is a block diagram illustrating an example. 2...magnetic tape, 9...switch,
10... Data prohibition circuit, 11... Synchronization signal detection circuit, 12... Parity detection circuit,
13...ID extraction circuit, 14...serial/parallel conversion circuit, 15...-numerical output circuit, 20...microcomputer, 21... ...Error correction circuit, 22...Interpolation circuit, 23...RA
M, 24---D/A converter, 27A, 27B-
PCM audio signal magnetic head, 29...input terminal for variable speed reproduction command signal, 30...envelope detection circuit, 70...header check circuit,
71...Switch. Figure 2 (0) (b) 1 2 1 Figure 3 Figure 4 1A 2A 1B :521j 51C. Figure 7 '118 Figure 11m Figure 12

Claims (1)

[Claims] 1. An error correction circuit that detects and corrects errors in PCM data of a reproduced signal from a recording medium, and interpolates or pre-holds PCM data determined to be uncorrectable by the error correction circuit. a first means for detecting the level of the reproduced signal and generating an envelope detection signal representing a portion where the level is smaller than a predetermined setting value; and second means for causing the interpolation circuit to perform interpolation or pre-hold processing on the PCM data when an envelope detection signal is generated. 2. In claim 1, the second means is a means for converting the PCM data when the envelope detection signal is generated into data that the error correction circuit determines to be uncorrectable. PCM signal reproducing device. 3. In claim 1, the second means is an algorithm control circuit that stops the error correction circuit from performing error correction processing on the PCM data when the envelope detection signal is generated, A PCM signal reproducing device characterized in that the PCM data is made uncorrectable by stopping the error correction process. 4. The PCM signal reproducing apparatus according to claim 1, 2 or 3, further comprising a switch that blocks the envelope detection signal generated by the first means during normal playback and allows it to pass during variable speed playback. . 5. A header and PCM consisting of a series of recording units, each consisting of information such as a synchronization signal and the number of quantization bits.
An error correction circuit that reproduces a PCM signal from a recording medium on which the PCM signal containing data is recorded, and performs error detection and correction processing on the PCM data of the PCM signal reproduced from the recording medium. and an interpolation circuit that performs interpolation or pre-hold processing on PCM data determined to be uncorrectable by the error correction circuit, the PCM signal reproducing device having: determining the detection frequency of the header of the reproduced PCM signal; and a second means for causing the interpolation circuit to interpolate or pre-hold the PCM data according to the determination result of the first means. playback device. 6. In claim 5, the first means generates a discrimination signal when the detection frequency of the header is lower than a predetermined setting value, and the second means generates a discrimination signal when the discrimination signal is generated. A PCM signal reproducing device characterized in that the interpolation circuit performs interpolation or pre-hold processing on PCM data in the recording unit to which the header belongs. 7. In claim 6, the second means is means for converting PCM data in the recording unit to which the header belongs when the discrimination signal is generated into data that the error correction circuit determines to be uncorrectable. A PCM signal reproducing device characterized by: 8. In claim 6, the second means includes algorithm control for stopping the error correction circuit from performing error correction processing on PCM data in the recording unit to which the header belongs when the discrimination signal is generated. 1. A PCM signal reproducing device, which is a circuit, and makes error correction of the PCM data impossible by stopping the error correction process. 9. The PC according to claim 5, 6, 7 or 8, further comprising a switch that blocks the discrimination signal outputted by the first means during normal playback and allows it to pass during variable speed playback.
M signal reproducing device. 10. Consisting of a series of recording units, each recording unit has a header and PC consisting of information such as a synchronization signal and the number of quantization bits.
Error correction for reproducing a PCM signal from a recording medium on which a PCM signal containing M data is recorded, and performing error detection and correction processing on the PCM data of the PCM signal reproduced from the recording medium. A PCM signal reproducing device having a circuit, a first means for detecting and outputting the same information in each recording unit included in the header, and a first means for detecting and outputting the same information in each recording unit included in the header; and second means for generating an envelope detection signal representing a portion smaller than the set value, the first means stopping outputting information when the envelope detection signal is generated. PCM signal reproducing device. 11. In claim 10, the first means includes a coincidence detection means that outputs the information only when the information between two consecutively input headers matches, and the coincidence detection means: A PCM signal reproducing device characterized in that matching detection is stopped when the envelope detection signal is generated. 12. The PCM signal reproducing apparatus according to claim 10 or 11, further comprising a switch that cuts off the envelope detection signal generated by the second means during normal playback and allows it to pass during variable speed playback. 13. Consisting of a series of recording units, each recording unit includes a header and PC consisting of information such as a synchronization signal and the number of quantization bits.
Error correction for reproducing a PCM signal from a recording medium on which a PCM signal containing M data is recorded, and performing error detection and correction processing on the PCM data of the PCM signal reproduced from the recording medium. A PCM signal reproducing device having a circuit, comprising: a first means for detecting and outputting information included in the header; and a second means for determining a detection frequency of the header in the reproduced PCM signal; A PCM signal reproducing device characterized in that the first means stops outputting the information according to the determination result of the second means. 14. In claim 13, the second means generates a discrimination signal when the detection frequency of the header is lower than a predetermined setting value, and the first means generates a discrimination signal when the discrimination signal is generated. A PCM signal reproducing device characterized in that outputting the information is stopped at . 15. In claim 14, the first means includes a coincidence detection means that outputs the information only when the information between two consecutively input headers matches, and the coincidence detection means: A PCM signal reproducing device characterized in that matching detection is stopped when the discrimination signal is generated. 16. In claim 13, 14 or 15, the second
A PCM signal reproducing apparatus characterized in that a switch is provided which cuts off the discrimination signal outputted by the means during normal reproduction and allows it to pass during variable speed reproduction.