JPH0387907A - Reference current source circuit containing lsi - Google Patents
Reference current source circuit containing lsiInfo
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- JPH0387907A JPH0387907A JP22609489A JP22609489A JPH0387907A JP H0387907 A JPH0387907 A JP H0387907A JP 22609489 A JP22609489 A JP 22609489A JP 22609489 A JP22609489 A JP 22609489A JP H0387907 A JPH0387907 A JP H0387907A
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- Prior art keywords
- voltage
- current
- trimming
- circuit
- constant
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Links
- 238000009966 trimming Methods 0.000 claims abstract description 49
- 239000003990 capacitor Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
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Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はLSI内蔵基準電流源回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to an LSI built-in reference current source circuit.
最近のLSIに要求される特性の高精度に伴い。 With the high precision of characteristics required of recent LSIs.
LSIに内蔵する基準電流源回路の温度特性及び特性値
の製品バラツキがますます問題となっている。Product variations in temperature characteristics and characteristic values of reference current source circuits built into LSIs are becoming increasingly problematic.
従来、LSIの内部に基準電流源回路を内蔵する場合に
は、ツェナーダイオードやバンドギャップ・リファレン
スという比較的安定な基準電圧源を作り、これを抵抗で
割った基準電流を用いる方法が用いられている。Conventionally, when incorporating a reference current source circuit inside an LSI, a relatively stable reference voltage source such as a Zener diode or bandgap reference was created, and a reference current obtained by dividing this by a resistor was used. There is.
この抵抗をLSIに内蔵する場合は絶対精度のバラツキ
と温度係数により、基準電流の安定度は良くない。When this resistor is built into an LSI, the stability of the reference current is not good due to variations in absolute accuracy and temperature coefficient.
高精度な定電流を得るためには、インターナショナル・
フンファレンス・オン・コンシューマ−エレクトロニク
ス(INTERNATIONAL C0N−FEREN
CE ON CONC0N5U ELECTRONIC
3) 、 ダイジェスト・オン・テクニカルペーパーズ
(IMGEST○F TECHNICAL PAPER
3) 、 1989年、151頁では高精度で高安定な
外付の基準抵抗を付加して用いる。In order to obtain a highly accurate constant current, international
INTERNATIONAL C0N-FEREN
CE ON CONC0N5U ELECTRONIC
3), Digest on Technical Papers (IMGEST○F TECHNICAL PAPER)
3), 1989, p. 151, uses a highly accurate and highly stable external reference resistor.
例えば基準抵抗の絶対精度を±20%、温度係数を20
00PPM/’Cとし、使用温度範囲を(−25〜+2
5〜+125)℃とすると、抵抗値の誤差は最大で一3
0〜+40%となる。また、このような大きな誤差のあ
る定電流源を用いてコンデンサ充電回路を構成すると、
その時定数も一30〜+40%程度である。For example, the absolute accuracy of the reference resistance is ±20%, and the temperature coefficient is 20%.
00PPM/'C, and the operating temperature range is (-25 to +2
5 to +125)°C, the error in resistance value is at most -3
It becomes 0 to +40%. Also, if you configure a capacitor charging circuit using a constant current source with such a large error,
The time constant is also about -30 to +40%.
上述した従来のLSI内蔵基準電流源回路は、良好な温
度特性を得るには高安定度でかつ高精度の基準抵抗外付
けを要するという欠点があった。The above-mentioned conventional LSI built-in reference current source circuit has the disadvantage that a highly stable and highly accurate reference resistor must be externally attached in order to obtain good temperature characteristics.
本発明の目的は、外付けの高性能の基準抵抗を要せずに
安定度のよいLSI内蔵基準電流源回路を提供すること
にある。An object of the present invention is to provide a highly stable LSI built-in reference current source circuit that does not require an external high-performance reference resistor.
本発明のLSI内蔵基準電流源回路は、内部定電圧の分
圧値をトリミングし基準電圧を出力する温度特性補償用
電圧トリミング回路と、共通制御端に前記分圧値を入力
しエミッタ(ソース)に電流設定抵抗を有する複数のト
ランジスタと該トランジスタのコレクタ(ドレイン)に
一端が接続し他端が共通出力端子に出力電流を供給する
複数の電流スイッチと、トリミング設定信号を出力して
前記基準電圧のトリミングと前記電流スイッチのトリミ
ング設定を行う一回書込メモリ手段を有するトリミング
設定回路とを含んで構成されている。The LSI built-in reference current source circuit of the present invention includes a temperature characteristic compensation voltage trimming circuit that trims a divided voltage value of an internal constant voltage and outputs a reference voltage, and an emitter (source) that inputs the divided voltage value to a common control terminal. a plurality of transistors each having a current setting resistor, one end connected to the collector (drain) of the transistor and the other end supplying an output current to a common output terminal, and a plurality of current switches that output a trimming setting signal and output the reference voltage. and a trimming setting circuit having a one-time write memory means for performing trimming of the current switch and trimming setting of the current switch.
また、本発明のLSI内蔵基準電流源回路は、所定の基
準電圧を出力するバンドギャップ型基準電圧源を有する
温度特性補償用電圧トリミング回路と、一端に前記基準
電圧を入力して他端に帰還電圧を帰還する演算増幅器と
該演算増幅器の出力信号を制御端に入力しエミッタ(ソ
ース)がトリミング可能の電流設定抵抗に接続して前記
帰還電圧を発生しコレクタ(ドレイン)が出力端子に出
力定電流を供給する定電流トリミング回路と、トリミン
グ設定信号を出力して前記基準電圧のトリミングと前記
電流スイッチのトリミング設定を行う一回書込メモリ手
段を有するトリミング設定回路とを含んで構成されてい
る。Further, the LSI built-in reference current source circuit of the present invention includes a voltage trimming circuit for temperature characteristic compensation having a band gap type reference voltage source that outputs a predetermined reference voltage, and a temperature characteristic compensation voltage trimming circuit that inputs the reference voltage to one end and returns it to the other end. An operational amplifier that feeds back voltage and the output signal of the operational amplifier are input to the control terminal, the emitter (source) is connected to a trimmable current setting resistor to generate the feedback voltage, and the collector (drain) is connected to the output terminal for output regulation. The trimming setting circuit includes a constant current trimming circuit that supplies a current, and a trimming setting circuit that has a one-time write memory means that outputs a trimming setting signal and performs trimming of the reference voltage and trimming setting of the current switch. .
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第1図は本発明の第1の実施例の回路図である。FIG. 1 is a circuit diagram of a first embodiment of the present invention.
基準電流源回路は、定電圧v2に比例した基準電圧v!
lを選択する■3セレクトスイッチS、を有する温度特
性補償用電圧トリミング回路1と、共通ベースBが基準
電圧Vヨを入力しそれぞれのエミッタが電流設定抵抗R
1〜R1に接続しそれぞれのコレクタが電流スイッチS
、〜S、を介して共通の出力端子T0に接続されたトラ
ンジスタQ1〜Q。The reference current source circuit generates a reference voltage v! which is proportional to the constant voltage v2.
Select the temperature characteristics compensation voltage trimming circuit 1 having 3 select switches S, the common base B inputs the reference voltage V, and each emitter inputs the current setting resistor R.
1 to R1, each collector is a current switch S
, ~S, to a common output terminal T0.
を有する定電流トリミング回路2と、書込回路6により
LSI製造工程でトリミング情報を設定したEPROM
5とその出力信号により■8セレクトスイッチSヤに駆
動信号dを、また電流スイッチS1〜S、に駆動信号d
1〜d、を供給するレジスタ4とを有するトリミング設
定回路3とで構成の低抵抗rl*r2を約10%の値に
する。EPROM in which trimming information is set in the LSI manufacturing process by a constant current trimming circuit 2 having a constant current trimming circuit 2 and a write circuit 6.
5 and its output signal, a drive signal d is sent to the select switch S 8, and a drive signal d is sent to the current switches S1 to S.
1 to d, and a trimming setting circuit 3 having a register 4 that supplies signals 1 to d, the low resistance rl*r2 of the configuration is set to a value of about 10%.
従って上・下の分圧電圧V、、、Vゎは中央分圧′!!
IEEvBcに対しそれぞれ+10%、−10%に設定
されている。Therefore, the upper and lower divided voltages V,..., Vゎ are the center divided voltages'! !
They are set to +10% and -10%, respectively, with respect to IEEvBc.
いる。There is.
従ってトランジスタQ 2 、 Q 3のフレフタ電流
工、及び工、は電流工、に対しそれぞれ0.IL及びo
、2Lとなる。Therefore, the deflector currents and currents of transistors Q 2 and Q 3 are respectively 0. IL and o
, 2L.
次に回路の動作を説明する。Next, the operation of the circuit will be explained.
温度特性補償用電圧トリミング回路1は、定電流りを定
電圧ダイオードZDに印加し、定電圧v2を分圧抵抗R
,j、 r l+ r 21 RaでそれぞれV
BU r■8゜+VBDに分圧し% VBセレク■スイ
ッチSWでそのうちの一つを選択してNPN)ランジス
タQ、〜Q、の共通ベースBに供給する。The temperature characteristic compensation voltage trimming circuit 1 applies a constant current to a constant voltage diode ZD, and applies a constant voltage v2 to a voltage dividing resistor R.
, j, r l+ r 21 Ra and V
The voltage is divided into 8°+VBD, one of which is selected by the VB select switch SW, and supplied to the common base B of the NPN transistors Q, ~Q.
この基準電圧■8からベース・エミッタ電圧V□を引い
た抵抗電圧(VヨーVヨ。)が各エミッタ抵抗R1〜R
1に印加され、各々の抵抗値で割った電流工、〜工、が
トランジスタQ1〜Q、の各コレクタより出力され、電
流スイッチS l” S sを用いて重複を許して選択
的に合皮された出力定電流I0が出力端子T。から得ら
れる。The resistance voltage (V yaw V y o.) obtained by subtracting the base-emitter voltage V □ from this reference voltage ■8 is the value of each emitter resistance R1 to R
1 and divided by the respective resistance values, the currents, ~, are output from the collectors of the transistors Q1 to Q, and are selectively switched using the current switches Sl''Ss to allow overlap. The output constant current I0 is obtained from the output terminal T.
ここで、温度特性補償用電圧トリミング回路1の定電圧
ダイオードZDの電圧v2の温度特性がOの場合は、分
圧された基準電圧■3は温度特性ヲモたず、VBセレク
トスイッチSwの位置選択により基準電圧VBがV B
!+ * V BCr V BDに変化するだけである
。Here, if the temperature characteristic of the voltage v2 of the constant voltage diode ZD of the voltage trimming circuit 1 for temperature characteristic compensation is O, the divided reference voltage 3 has no temperature characteristic, and the position selection of the VB select switch Sw is Therefore, the reference voltage VB becomes VB
! It only changes to + * V BCr V BD.
定電流トリミング回路2の例えばトランジスタQ+のコ
レクタ電流りは、一般に第(1)式で表わされる。For example, the collector current of transistor Q+ in constant current trimming circuit 2 is generally expressed by equation (1).
I += (VB VIE) /R1−”・(1)こ
れを温度Tで対数微分すると第(2)式が得られる。I+=(VB VIE)/R1-" (1) When this is differentiated logarithmically with respect to temperature T, the equation (2) is obtained.
・・・・・・ (2)
(+2000ppm) /℃とすれば、(VBVBり
カI V
0となる。...... (2) (+2000ppm) /℃, (VBVBri
It becomes 0.
また逆に第(2)式からVBの値を変化させることによ
り、出力電流工、に多少の正または負の温度特性を与え
られることも分る。Conversely, it can be seen from equation (2) that by changing the value of VB, the output current can be given a more or less positive or negative temperature characteristic.
逆に基準電圧v8を少し変化させることによって各抵抗
やベース・エミッタ電圧VBpの1次の温度特性のバラ
ツキをトリミングすることができる。Conversely, by slightly changing the reference voltage v8, it is possible to trim variations in the primary temperature characteristics of each resistor and the base-emitter voltage VBp.
以上述べたように% VBセレクトスイッチSWを予め
中央電圧MBCで出力定電流工。の温度特性が0になる
ように設計しておき、製造工程で実測して得られた出力
電流工。の温度特性により、例えば十の温度係数の場合
は大きい方の電圧VIlUを選択するようにトリミング
設定回路3のEPROM5にトリミング情報を書込んで
レジスタ4からトリミング信号dを出力する。As mentioned above, set the VB select switch SW to the center voltage MBC in advance and set the output constant current. The output current is designed so that the temperature characteristics of For example, in the case of a temperature coefficient of 10, trimming information is written in the EPROM 5 of the trimming setting circuit 3 to select the larger voltage VIlU, and the trimming signal d is output from the register 4.
さてトランジスタ電流工、について上述したように出力
電流I0として温度特性のない定電流源が得られたが、
さらにこの電流源の定電流値の設定には、基準電圧■3
や電流設定抵抗R1のバラツキΔRによるトリミングが
必要である。Now, regarding the transistor current generator, as mentioned above, a constant current source with no temperature characteristics was obtained as the output current I0, but
Furthermore, to set the constant current value of this current source, the reference voltage ■3
It is necessary to perform trimming based on the variation ΔR of the current setting resistor R1.
そこで、R1と同じ温度特性をもつR2,Riを用いて
トランジスタQ2.Q3にトランジスタ電流り、’Is
を得ると、それら電流もコレクタ電流11と同じ温度特
性を持っている。Therefore, using R2 and Ri, which have the same temperature characteristics as R1, transistor Q2. Transistor current in Q3, 'Is
When obtained, these currents also have the same temperature characteristics as the collector current 11.
また同一製造工程なのでトランジスタの電流Ill I
2と工、の相対比は比較的正確にとり易い。Also, since the manufacturing process is the same, the transistor current Ill I
It is relatively easy to determine the relative ratio between 2 and .
ここで、トランジスタ電流工、〜工、を前述の通り設定
しておくと出力定電流工。としてI+、1.IL、1.
2L 1.3Lが電流スイッチSl〜S。Here, if you set the transistor current, ~, as described above, you will get the output constant current. As I+, 1. IL, 1.
2L 1.3L are current switches Sl to S.
の組合せで得られるので、あらかじめI1を所定の出力
電流値I0よりやや小さく作っておくことによって、上
記のいずれかを選択することで±0.05I。の幅をト
リミングすることができる。Therefore, by making I1 slightly smaller than the predetermined output current value I0 in advance and selecting one of the above, ±0.05I can be obtained. The width can be trimmed.
この電流スイッチ81〜S、の組合せの設定は、製造工
程中に基準電流源回路のトリミング設定するために、ま
ずv3セレクトスイッチSwで中央分圧電圧vB0と電
流スイッチSlのみを仮に選んで出力定電流■。の1次
の温度係数を求めておき、次に温度係数を打消して補償
するようにVBセレクトスイッチS9・を駆動するトリ
ミング信号dが出せるように、また定電流値のトリミン
グをする電流スイッチの組合せのトリミング信号d1〜
d。To set the combination of current switches 81 to S, in order to trim the reference current source circuit during the manufacturing process, first temporarily select only the center divided voltage vB0 and current switch Sl with the v3 select switch Sw, and then set the output. Current■. Find the first-order temperature coefficient of Combination trimming signal d1~
d.
を出せるようにワンタイムのEPROM5に書込設定す
る。Write settings in the one-time EPROM 5 so that it can be output.
ヒ この場合、メモリとしては4ユ一ズROMでもよい。Hi In this case, the memory may be a 4-unit ROM.
また、トリミングを微細に行うために抵抗・トランジス
タ、スイッチの数を増加してもよい。Furthermore, the number of resistors, transistors, and switches may be increased in order to perform fine trimming.
トランジスタはMOS型でもよい。The transistor may be a MOS type.
第2図は本発明の第2の実施例の回路図である。FIG. 2 is a circuit diagram of a second embodiment of the invention.
定電圧回路としてはバンドギャップ・リファレンス形の
回路を用いており、トランジスタQ12をダイオードQ
l+の10倍の接合サイズとし、ダイオード電流エエ、
とトランジスタ電流工、□は第(3)式、第(4)式に
得られる
り、=1.・exp(qVp/kT) −(
3)I 12= 10 I 5exp(q VB!!1
2/ k T) −−(4)ここでI++とI+
2を等しくすると、ダイオード電圧VDとトランジスタ
電圧VB!+2の間には第(5)(VD VB++u
)= −・Iln l tJ −−(b)すなわ
ちこの電圧差はTに比例した正の温度係数をもつ電圧が
エミッタ抵抗R1の両端に得られ、これをR12/R1
x倍し、増幅トランジスタQ13の負の温度係数をもつ
ベース・エミッタ電圧Vおの温度係数と加算することに
より、トランジスタQ13のコレクタ電圧■8の温度係
数を零または所望の任意の値にすることができる。A bandgap reference type circuit is used as the constant voltage circuit, and the transistor Q12 is replaced by a diode Q.
The junction size is 10 times that of l+, and the diode current is
and the transistor current, □ can be obtained from equations (3) and (4), and =1.・exp(qVp/kT) −(
3) I 12= 10 I 5exp (q VB!!1
2/ k T) --(4) Here I++ and I+
2 are equal, diode voltage VD and transistor voltage VB! Between +2 and (5) (VD VB++u
) = −・Iln l tJ −−(b) In other words, this voltage difference means that a voltage with a positive temperature coefficient proportional to T is obtained across the emitter resistor R1, and this voltage is expressed as R12/R1
Make the temperature coefficient of the collector voltage of the transistor Q13 8 zero or any desired value by multiplying by I can do it.
温度特性補償用電圧トリミング回路1.の抵抗RI3に
並列に抵抗R1,、R,5を選択的につなぐことにより
、電流を変えて設定してにより温度特性のトリミング補
正が可能である。Voltage trimming circuit for temperature characteristic compensation 1. By selectively connecting resistors R1, .
なおダイオードDI、D2は電流を印加することにより
破壊的に短絡することのできる一種のヒエ
≠逼−ズROMである。Incidentally, the diodes DI and D2 are a type of HIELZ ROM that can be destructively short-circuited by applying a current.
トランジスタQ13のコレクタがこの定電圧回路の出力
電圧■8であるが、この電圧とトランジスタQ14のエ
ミッタ電圧vI!が等しくなるようにオペアンプA1に
て帰還をかけている。The collector of the transistor Q13 is the output voltage ■8 of this constant voltage circuit, and this voltage and the emitter voltage vI! of the transistor Q14 are the same. Feedback is applied to the operational amplifier A1 so that the values are equal.
従ってこの電圧■8を抵抗RI6で割った電流工。がト
ランジスタQ14を流れる。Therefore, the current value is this voltage (■8) divided by the resistor RI6. flows through transistor Q14.
コンデンサCはこの定電流工。によって短絡スイッチS
、がオフになった時から充電を開始し、その両端の電圧
Vcはtを時間とすると第(6)式となる。Capacitor C is this constant current converter. Short circuit switch by
Charging starts when , is turned off, and the voltage Vc across it is expressed by equation (6), where t is time.
この電圧がコンパレータA2で基準電圧■7と比反転す
る。The ratio of this voltage to the reference voltage (7) is inverted by the comparator A2.
すなわち、デイレ−回路7のデイレ−時間tは一゛
−第(7)式に示される。That is, the delay time t of the delay circuit 7 is 1.
- It is shown in equation (7).
ここで、前述のように基準電圧■8は所望の温度係数に
することができるので、これとR+sの温度特性を等し
くすることによりトランジスタQ14の電流VR/R1
6の温度係数を補償することができる。Here, as mentioned above, the reference voltage (8) can have a desired temperature coefficient, so by making the temperature characteristics of this and R+s equal, the current VR/R1 of the transistor Q14
A temperature coefficient of 6 can be compensated for.
さらにV、として温度係数のもたない比較電圧■、の電
圧源を用い、通常LSI内部のコンデンサの温度係数は
小さいのでコンデンサCの温度係数を無視すれば、デイ
レ−時間tは温度によらず一定とすることができる。Furthermore, if we use a voltage source with a comparison voltage ■, which has no temperature coefficient as V, and ignore the temperature coefficient of capacitor C, since the temperature coefficient of a capacitor inside an LSI is usually small, the delay time t does not depend on the temperature. It can be kept constant.
もちろん比較電圧■、やコンデンサCの温度係数を厳密
に補正するように電圧V、の温度特性を決めてやること
もできる。Of course, the temperature characteristics of the comparison voltage (2) and the voltage V can be determined so as to strictly correct the temperature coefficient of the capacitor C.
この場合にデイレ−時間tのバラツキΔtは主としてC
” R+sのバラツキで決まるのでコンデンサCのバラ
ツキΔCに応じて抵抗R16の値をトリミングしてCR
積を所定値に設定することでデイレ−時間tのバラツキ
Δtをなくすことができる。In this case, the variation Δt in the delay time t is mainly C
” Since it is determined by the variation in R+s, the value of resistor R16 is trimmed according to the variation ΔC in capacitor C.
By setting the product to a predetermined value, the variation Δt in the delay time t can be eliminated.
電流抵抗R+r〜R19,ダイオードD3〜D、がこの
ためのトリミング回路である。Current resistors R+r to R19 and diodes D3 to D are trimming circuits for this purpose.
本実施例においては、温度係数を補正した電流源の値を
内蔵コンデンサCのバラツキΔCを補正するように設定
する点が第1の実施例と異っている。This embodiment differs from the first embodiment in that the value of the current source with the temperature coefficient corrected is set so as to correct the variation ΔC of the built-in capacitor C.
この例はデイレ−回路7のほかに、ワンショットマルチ
プライヤや発振器、あるいはフィルタ等の時定数を決め
る回路に応用でき、温度特性もなくかつバラツキも少な
い時定数を作ることができる。In addition to the delay circuit 7, this example can be applied to circuits that determine the time constant of one-shot multipliers, oscillators, filters, etc., and it is possible to create a time constant that has no temperature characteristics and has little variation.
本発明は第1図及び第2図に限定されることなく、両者
を適宜組合わせたものや、各種基準電圧回路やメモリ手
段、あるいは電流の合成手段を採用することができる。The present invention is not limited to FIG. 1 and FIG. 2, and may employ a suitable combination of the two, various reference voltage circuits, memory means, or current synthesis means.
以上のべたように本発明によれば、LSI内部の素子を
用いトリミングして温度係数のないもしくは補正した定
電流を設定し、その電流の絶対値または内蔵容量との時
定数のバラツキもトリミングして精度と温度特性のよい
出力定電流を有する基準電流源回路が得られる。As described above, according to the present invention, a constant current with no or corrected temperature coefficient is set by trimming using elements inside the LSI, and variations in the absolute value of the current or the time constant with the built-in capacitance are also trimmed. As a result, a reference current source circuit having a constant output current with good accuracy and temperature characteristics can be obtained.
これはLSIに外付の高性能の抵抗部付なしに高精度電
流出力や時定数を作ることができることを意味し、従来
は高精度を得るために外付していた端子が他の機能に使
用でき、集積度を向上させることも可能になるとともに
、高精度の外付抵抗が不要になるという工業上大きな効
果をもつ。This means that it is possible to create high-precision current output and time constants without attaching high-performance external resistors to the LSI, and the terminals that were conventionally attached externally to obtain high precision can be used for other functions. In addition to making it possible to improve the degree of integration and eliminating the need for high-precision external resistors, this has a great industrial effect.
第1図は本発明の第1の実施例の回路図、第2図は本発
明の第2の実施例の回路図である。
1.11・・・・・温度特性補償用電圧トリミング回路
、2,2.・・・・・・定電流トリミング回路、3,3
.・・・・・・トリミング設定回路、4・・・・・・レ
ジスタ、5・・・・・・EPROM、6・・・・・・書
込回路、7・・・・・・デイレ−回路、d、d+〜d、
・・・・・・トリミング設定信号、■、・・・・・・定
電流、工。・・・・・・出力定電流、Q1〜Q1・・・
・・トランジスタ、R1−R1・・・・・・電流設定抵
抗、Rv、 Ro・・・・・・分圧抵抗、S1〜S、・
・・・・・電流スイッチ% Sl・・・・・VB□セレ
クトスイッチ、To。
’ro1・・・・・出力端子、V、、VR・・・・・・
基準電圧、V2・・・・・・定電圧。FIG. 1 is a circuit diagram of a first embodiment of the invention, and FIG. 2 is a circuit diagram of a second embodiment of the invention. 1.11...Voltage trimming circuit for temperature characteristic compensation, 2,2.・・・・・・Constant current trimming circuit, 3,3
.. ...Trimming setting circuit, 4...Register, 5...EPROM, 6...Writing circuit, 7...Delay circuit, d, d+~d,
...Trimming setting signal, ■, ...Constant current, engineering.・・・・・・Output constant current, Q1~Q1...
...Transistor, R1-R1...Current setting resistor, Rv, Ro...Voltage dividing resistor, S1-S,...
...Current switch% Sl...VB□Select switch, To. 'ro1...Output terminal, V, VR...
Reference voltage, V2... Constant voltage.
Claims (2)
力する温度特性補償用電圧トリミング回路と、共通制御
端に前記分圧値を入力しエミッタ(ソース)に電流設定
抵抗を有する複数のトランジスタと該トランジスタのコ
レクタ(ドレイン)に一端が接続し他端が共通出力端子
に出力電流を供給する複数の電流スイッチと、トリミン
グ設定信号を出力して前記基準電圧のトリミングと前記
電流スイッチのトリミング設定を行う一回書込メモリ手
段を有するトリミング設定回路とを含むことを特徴とす
るLSI内蔵基準電流源回路。(1) A temperature characteristic compensation voltage trimming circuit that trims the divided voltage value of the internal constant voltage and outputs a reference voltage, and a plurality of voltage trimming circuits that input the divided voltage value to a common control terminal and have a current setting resistor at the emitter (source). a plurality of current switches, one end of which is connected to the transistor and the collector (drain) of the transistor, and the other end of which supplies an output current to a common output terminal; and trimming of the reference voltage and trimming of the current switch by outputting a trimming setting signal. 1. A reference current source circuit built into an LSI, comprising a trimming setting circuit having a one-time write memory means for performing setting.
電圧源を有する温度特性補償用電圧トリミング回路と、
一端に前記基準電圧を入力して他端に帰還電圧を帰還す
る演算増幅器と該演算増幅器の出力信号を制御端に入力
しエミッタ (ソース)がトリミング可能の電流設定抵抗に接続して
前記帰還電圧を発生しコレクタ(ドレイン)が出力端子
に出力定電流を供給する定電流トリミング回路と、トリ
ミング設定信号を出力して前記基準電圧のトリミングと
前記電流スイッチのトリミング設定を行う一回書込メモ
リ手段を有するトリミング設定回路とを含むことを特徴
とするLSI内蔵基準電流源回路。(2) a temperature characteristic compensation voltage trimming circuit having a bandgap reference voltage source that outputs a predetermined reference voltage;
An operational amplifier that inputs the reference voltage at one end and feeds back a feedback voltage at the other end, and an output signal of the operational amplifier is input to the control end, and the emitter (source) is connected to a trimmable current setting resistor to generate the feedback voltage. a constant current trimming circuit whose collector (drain) supplies an output constant current to an output terminal, and a one-time write memory means which outputs a trimming setting signal to trim the reference voltage and set the trimming of the current switch. An LSI built-in reference current source circuit comprising: a trimming setting circuit having a trimming setting circuit;
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22609489A JP2754779B2 (en) | 1989-08-30 | 1989-08-30 | LSI built-in reference current source circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22609489A JP2754779B2 (en) | 1989-08-30 | 1989-08-30 | LSI built-in reference current source circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0387907A true JPH0387907A (en) | 1991-04-12 |
JP2754779B2 JP2754779B2 (en) | 1998-05-20 |
Family
ID=16839730
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22609489A Expired - Lifetime JP2754779B2 (en) | 1989-08-30 | 1989-08-30 | LSI built-in reference current source circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2754779B2 (en) |
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