JPH0382187A - Manufacture of high corrosion-resistant printed wiring board - Google Patents

Manufacture of high corrosion-resistant printed wiring board

Info

Publication number
JPH0382187A
JPH0382187A JP21948389A JP21948389A JPH0382187A JP H0382187 A JPH0382187 A JP H0382187A JP 21948389 A JP21948389 A JP 21948389A JP 21948389 A JP21948389 A JP 21948389A JP H0382187 A JPH0382187 A JP H0382187A
Authority
JP
Japan
Prior art keywords
copper
circuit
solder resist
wiring board
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21948389A
Other languages
Japanese (ja)
Inventor
Masahiro Kawamura
昌廣 川村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP21948389A priority Critical patent/JPH0382187A/en
Publication of JPH0382187A publication Critical patent/JPH0382187A/en
Pending legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

PURPOSE:To restrain depositions induced by electric erosion from occurring to secure a required insulation resistance between circuits by a method wherein a reducing agent is brought into contact with the surface of a copper circuit before solder resist is printed. CONSTITUTION:A circuit is formed on a copper clad laminated board of glass epoxy base material through a subtractive method, the circuit formed board is subjected to a copper oxide treatment (K treatment) to enhance the circuit in adhesion to solder resist and dipped into a water solution of 6g/l DMAB (deimethylamine borane) for 1-3 minutes to reduce copper oxide and also to bring the surface of the copper circuit into contact with DMAB. In succession, the board is rinsed in water and dried up, and then solder resist is printed on the board. As the surface of copper circuit is brought into contact with a reducing agent and then solder resist is printed, copper is well prevented from migrating by a reducing process and depositions induced by electric erosion can be prevented from occurring. Therefore, the insulation resistance between lines can be prevented from deteriorating.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、耐電食性に優れるプリント配線板の製造方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for manufacturing a printed wiring board having excellent electrolytic corrosion resistance.

(従来の技術) 従来、ソルダーレジスト印刷の前処理法としては、ソル
ダーレジストと銅回路との密着力を高めるために、化学
処理または研磨により銅回路表面に適度の微細凹凸を形
成する方法がある。
(Prior art) Conventionally, as a pretreatment method for solder resist printing, there is a method of forming appropriate fine irregularities on the surface of the copper circuit by chemical treatment or polishing in order to increase the adhesion between the solder resist and the copper circuit. .

(発明が解決しようとする課題) しかしながら、ソルダーレジストと銅回路の密着力を高
めるための前処理法では、使用中に銅マイグレーション
が発生し、回路間にデンドライト等の電食析出物が発生
し、回路間距離を減少させる。このため回路間の絶縁抵
抗が低下するという問題点があった。
(Problem to be solved by the invention) However, in the pretreatment method for increasing the adhesion between the solder resist and the copper circuit, copper migration occurs during use, and electrolytic corrosion deposits such as dendrites occur between the circuits. , reducing the distance between circuits. Therefore, there was a problem in that the insulation resistance between the circuits decreased.

本発明はこの点に鑑みなされたもので、電食析出物の発
生を抑制し、回路間における所要の絶縁抵抗値を確保す
るようにした、高耐電食性のプリント配線板の製造方法
を提供するものである。
The present invention has been made in view of this point, and provides a method for manufacturing a printed wiring board with high electrolytic corrosion resistance, which suppresses the generation of electrolytic corrosion deposits and ensures a required insulation resistance value between circuits. It is something.

(課題を解決するための手段) このため本発明は、ソルダーレジスト印刷的、すなわち
ソルダーレジスト印刷前処理としての銅回路表面化学処
理または研磨処理の後に、該銅回路表面に還元剤を接触
させることを特徴とするものである。
(Means for Solving the Problems) For this reason, the present invention provides a method for contacting a reducing agent with a surface of a copper circuit after chemical treatment or polishing of the surface of the copper circuit as a solder resist printing process, that is, as a pre-treatment for printing a solder resist. It is characterized by:

(作用) このようにプリント配線板の銅回路表面に還元剤を接触
させると、接触した還元剤の還元作用により銅マイグレ
ーションが抑制される。このため、回路間においてデン
ドライト等の電食析出物の発生が抑えられる。
(Function) When the reducing agent is brought into contact with the copper circuit surface of the printed wiring board in this way, copper migration is suppressed by the reducing action of the contacted reducing agent. Therefore, generation of electrolytic deposits such as dendrites between circuits is suppressed.

(実施例〉 以下に本発明を実施例および比較例により詳しく説明す
る。
(Examples) The present invention will be explained in detail below using Examples and Comparative Examples.

ガラスエポキシ基材の銅張積層板に、ライン幅0.1〜
0.12n+m、沿面距離0.1〜0.12開の回路を
サブトラクティブ法で形成し、ソルダーレジストとの密
着性確保のために酸化銅処理(K処理)を行い、DMA
B (ジメチルアミンボラン)の6g/f水溶液に1〜
3分浸漬し、酸化銅を還元するとともに、銅回路表面に
DMABを接触させた。
Copper-clad laminate with glass epoxy base material, line width 0.1~
A circuit of 0.12n+m and a creepage distance of 0.1 to 0.12 is formed by a subtractive method, and copper oxide treatment (K treatment) is performed to ensure adhesion with the solder resist.
1 to 6 g/f aqueous solution of B (dimethylamine borane)
It was immersed for 3 minutes to reduce the copper oxide and bring DMAB into contact with the surface of the copper circuit.

続いて水洗、乾燥後にソルダーレジスト(CR−506
G (二液性エポキシ系ソルダーレジスト。
Next, after washing with water and drying, solder resist (CR-506
G (Two-component epoxy solder resist.

株式会社アサヒ化学研究所製、商品名)を印刷した。こ
のプリント配線板を85℃、85%RHの環境下に置き
、隣接するラインが正補と負極になるように100Vの
直流電圧を印加し、銅マイグレーションによる電食析出
物の発生状況と、ライン間の絶縁抵抗を観測した。上記
のDMAB処理を行ったプリント配線板の上面図を第1
図に示す。
Manufactured by Asahi Chemical Research Institute Co., Ltd., product name) was printed. This printed wiring board was placed in an environment of 85°C and 85% RH, and a 100V DC voltage was applied so that the adjacent lines became positive and negative electrodes. The insulation resistance between the two was observed. The top view of the printed wiring board that has been subjected to the above DMAB processing is shown in Figure 1.
As shown in the figure.

比較例として、研磨処理のみを行ったもの、および酸化
銅処理のみを行ったものについても同様に評価した。な
お、第2図、第3図はそれぞれ研磨処理のみを行ったも
の、酸化銅処理のみを行ったものを示す図であって、よ
り詳しくは85℃。
As comparative examples, those subjected to only polishing treatment and those subjected to only copper oxide treatment were similarly evaluated. In addition, FIG. 2 and FIG. 3 are diagrams showing those subjected to only polishing treatment and those subjected to only copper oxide treatment, respectively, and more specifically at 85°C.

8596RH,DC100V印加100時間経過時の上
面図である。
8596RH, a top view after 100 hours of DC 100V application.

−に記実施例によるDMAB処理を行った場合には、8
5℃、85%RH,DC100V印加の高温高湿バイア
ス試験2500時間でも銅回路1間に電食析出物は発生
せず、ライン間絶縁抵抗は初期値1013Ωに対し1・
012Ωを維持している。
- When the DMAB processing according to the embodiment described in 8.
Even in a 2,500-hour high-temperature, high-humidity bias test at 5°C, 85% RH, and DC 100V applied, no galvanic deposits were generated between the copper circuits 1, and the line-to-line insulation resistance was 1.
012Ω is maintained.

一方、比較例による研磨処理のみを行った場合、および
酸化処理のみを行った場合には、試験時間100時間ま
でに電食析出物2が発生し、試験時間300時間ではラ
イン間絶縁抵抗が109Ω以下となり、短絡状態となっ
た。
On the other hand, when only the polishing treatment according to the comparative example was performed and when only the oxidation treatment was performed, electrolytic corrosion deposits 2 were generated by the test time of 100 hours, and the line-to-line insulation resistance was 109Ω by the test time of 300 hours. As a result, a short circuit occurred.

(発四の効果) 以−1−のように本発明によれば、銅回路表面に還元剤
を接触させたうえでソルダーレジスト印刷を行うので、
還元作用により銅マイグレーションを良奸に抑制して電
食析出物の発生を防止できる。
(Four Effects) As described in -1- above, according to the present invention, since solder resist printing is performed after bringing the reducing agent into contact with the surface of the copper circuit,
The reduction action effectively suppresses copper migration and prevents the generation of electrolytic corrosion deposits.

従って、ライン間の絶縁抵抗の低下を防止できる効果が
ある。
Therefore, there is an effect of preventing a decrease in insulation resistance between lines.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の製造方法によるDMAB処理を行っ
たプリント配線板の85℃、85%RH。 DC100V印加100時間経過時の上面図。 第2図は、従来の製造方法による研磨処理のみを行った
プリント配線板の85℃、85%RH。 DC100V印加100時間経過時の1・6面図。 第3図は、従来の製造方法による酸化銅処理のみを行っ
たプリント配線板の85℃、85%RH。 DC100V印加100時間経過時の−に面図。 1・・・銅回路 2・・・電食析出物
FIG. 1 shows a printed wiring board at 85° C. and 85% RH that has been subjected to DMAB treatment according to the manufacturing method of the present invention. A top view after 100 hours of DC 100V application. Figure 2 shows a printed wiring board at 85°C and 85% RH that has been subjected to only polishing using the conventional manufacturing method. 1 and 6 views after 100 hours of DC 100V application. Figure 3 shows a printed wiring board at 85°C and 85% RH that has been subjected to only copper oxide treatment using the conventional manufacturing method. - side view after 100 hours of DC 100V application. 1...Copper circuit 2...Electrolytic corrosion deposits

Claims (1)

【特許請求の範囲】[Claims] 1.プリント配線板のソルダーレジスト印刷前に、銅回
路表面に還元剤を接触させることを特徴とする高耐電食
性プリント配線板の製造方法。
1. A method for producing a highly electrolytic corrosion resistant printed wiring board, which comprises bringing a reducing agent into contact with the surface of a copper circuit before printing a solder resist on the printed wiring board.
JP21948389A 1989-08-25 1989-08-25 Manufacture of high corrosion-resistant printed wiring board Pending JPH0382187A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21948389A JPH0382187A (en) 1989-08-25 1989-08-25 Manufacture of high corrosion-resistant printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21948389A JPH0382187A (en) 1989-08-25 1989-08-25 Manufacture of high corrosion-resistant printed wiring board

Publications (1)

Publication Number Publication Date
JPH0382187A true JPH0382187A (en) 1991-04-08

Family

ID=16736147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21948389A Pending JPH0382187A (en) 1989-08-25 1989-08-25 Manufacture of high corrosion-resistant printed wiring board

Country Status (1)

Country Link
JP (1) JPH0382187A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07249856A (en) * 1991-07-02 1995-09-26 Rockwell Internatl Corp Method for restoration of solderability of electronic component
US6086956A (en) * 1995-12-19 2000-07-11 Morton International Inc. Composition and method for reducing copper oxide to metallic copper
JP2007037657A (en) * 2005-08-01 2007-02-15 Nkk:Kk Facial treatment mask
JP2007037658A (en) * 2005-08-01 2007-02-15 Nkk:Kk Facial treatment apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07249856A (en) * 1991-07-02 1995-09-26 Rockwell Internatl Corp Method for restoration of solderability of electronic component
US6086956A (en) * 1995-12-19 2000-07-11 Morton International Inc. Composition and method for reducing copper oxide to metallic copper
JP2007037657A (en) * 2005-08-01 2007-02-15 Nkk:Kk Facial treatment mask
JP2007037658A (en) * 2005-08-01 2007-02-15 Nkk:Kk Facial treatment apparatus

Similar Documents

Publication Publication Date Title
CA1139012A (en) Method of preparing substrate surface for electroless plating and products produced thereby
US3573973A (en) High speed additive circuit process
JP2003060330A (en) Method for removing smear of via hole
JP3944027B2 (en) Manufacturing method of flexible printed wiring board and flexible printed wiring board obtained by the manufacturing method
JPH0382187A (en) Manufacture of high corrosion-resistant printed wiring board
JPS58500765A (en) A method for chemically stripping a plating layer containing palladium and at least one of copper and nickel, and a bath used in the method
JPS63168077A (en) Manufacture of printed wiring board
JP2000178752A (en) Palladium catalyst removing agent for electroless plating
JP6236824B2 (en) Method for manufacturing printed wiring board
JP2002285377A (en) Ceramic electronic part and method for forming copper electrode thereon
JP2737599B2 (en) Electroless plating method on copper circuit pattern of printed wiring board
JPH06310830A (en) Electroless plating on copper circuit pattern of printed-wiring board
JP3226627B2 (en) Copper sulfate plating method for printed wiring boards
TWI355219B (en) Micro-etching process of pcb without causing galva
JP2013056977A (en) Method of manufacturing copper-coated polyimide film substrate
JPS61163693A (en) Manufacture of printed wiring board
JP2005194561A (en) Plating method, and method for manufacturing electronic component
JPH02121388A (en) Formation of electrodeposition resist film
JPS63291836A (en) Method of forming glass base for electroless plating
JPS60121615A (en) Method of forming transparent conductive film
JPS63117485A (en) Ceramic printed wiring board
JPS61163691A (en) Formation for electric circuit of printed wiring board
JPH01124286A (en) Manufacture of printed-circuit board
WO2000029638A1 (en) Electroless silver plating solution for electronic parts
JPS63293895A (en) Plating