JPH0380266B2 - - Google Patents

Description

Detailed Description of the Invention "Field of Industrial Application" This invention applies a constant voltage to, for example, an IC with a CMOS structure, and measures the current flowing at that time.
The present invention relates to a voltage applied current measuring device that can be used to test whether or not the current is normal.

"Prior art" ICs such as semiconductor memory with CMOS structure basically consist of P-type _FETQ1 and N-type FETQ1 as shown in Figure 2.
FETQ ₂ are connected in series with each other to DC power supply 1, the gates of these two FETQ ₁ and Q ₂ are commonly connected, and by applying a drive signal to this common gate G, either FETQ ₁ or Q ₂ can be activated. is controlled to be turned on, and at that time, the other is controlled to be turned off, and the structure is such that an H logic signal or an L logic signal is output to the output terminal M. One such structure is called one logic gate element or the like.

In this circuit, when changing the on/off relationship of FETQ ₁ and Q ₂ from one to the other and from the other to one stable state, FETQ ₁ and Q ₂ simultaneously pass through the on state, as shown in Figure 3A. A short-circuit current with a large current value I _PP momentarily flows in the stable state, but since either FET Q ₁ or Q ₂ is always off in a stable state, the drain current I _DD flowing in that stable state is small. The value is I _LL . Therefore, power consumption in a stationary state is reduced, and for example, in the case of a memory, there is an advantage that the consumption of a backup battery can be reduced.

By the way, if the off-resistance of either or both of FETQ ₁ and Q ₂ is smaller than the specified value in IC 2 that integrates logic gate elements with such a structure, the drain in a stable state A disparity occurs in which the current value _ILL becomes large.

For example, as shown in Figure 4, if the off-resistance of FETQ ₂ is made to be a value Rn smaller than the specified value,
When FETQ ₁ is on and FETQ ₂ is off, the current is larger than the specified current value I _LL as shown in Figure 3B.
_IMM flows. Therefore, it has such defects.
When a FET is manufactured, if this defective FET is left in a standby state in an OFF state, the current consumption increases and the battery, etc., becomes significantly depleted.

One possible test method for detecting such defects is a voltage applied current measuring device. This voltage applied current test is performed as shown in Figure 4.
A current detection resistor 3 is connected in series between the power supply terminal IVDD of IC2 and the power supply 1.
This is a test method in which the voltage generated at both ends of the test tube is input into the measuring device 4, the current value is determined from the voltage measurement value, and it is determined whether the current value is within a specified range or not to determine pass/fail.

When determining the pass/fail of a CMOS structure IC using a voltage applied current measurement test, the current to be measured is a steady current with a minute current value _ILL as shown in Figure ₃ . At the time of switching between states ₂ and 2, a short-circuit current having a current value _IPP that is several thousand to tens of thousands of times as large as _ILL flows. In other words, the ratio I _PP /I _LL between the short circuit current and the current to be measured becomes a very large value. Incidentally, I _LL = several tens of microamperes to several nanoamperes, and I _PP = several hundred milliamps to several tens of milliamps. In order to reduce the voltage drop at the V _DD point during the period when I _DD is I _PP , a smoothing capacitor 9 is required.
Therefore, the current flowing through the current detection resistor 3 from the point when the short circuit current ends is an extremely small steady current value.
There is an inconvenience that it takes a long time to charge the current detection resistor 3 and the smoothing capacitor 9 until it stabilizes at _ILL . In other words, the longer it takes for the current to stabilize, the longer the switching cycle of FETQ ₁ and Q ₂ must be. As a result, the time required to test an IC with a large number of elements increases. For example, if you test an IC that integrates 256 x 1000 logic gate elements by switching them every 1 millisecond, the time required for the test is
It will be 256 seconds. If one IC was tested for 256 seconds, it would be impossible to test all mass-produced ICs. Therefore, higher speed is required.

Here, FIG. 5 shows a configuration for increasing speed that can be considered in the prior art. In the circuit shown in FIG. 5, the output terminal of the operational amplifier 5 is connected to the inverting input terminal of the operational amplifier 5 via the current detection resistor 3, thereby forming a negative feedback loop, and the non-inverting input terminal of the operational amplifier 5. A voltage source 7 is connected to constitute a constant voltage source 8. The voltage of this constant voltage source 8 is supplied to the load 2.
With this structure, the operational amplifier 5 performs feedback operation so that the voltage at the inverting input terminal becomes equal to the voltage of the voltage source 7, and the load 2 is supplied with a constant voltage equal to the voltage of the voltage source 7.
Give Vs. Load 2 is like the CMOS structure IC described earlier, in which only a small current flows during steady state.
It is assumed that the circuit has a circuit structure in which a large pulse-like current flows at a period proportional to the operating speed.

A smoothing capacitor 9 is connected near the load 2. This smoothing capacitor 9 is provided to compensate for a drop in the voltage Vs caused by a delay in the response of the constant voltage source 8 when a large pulsed current flows through the load 2. In other words, as shown in Figure 6A, load 2
When a pulsed current flows through the load 2, the voltage Vs at the current supply point S to the load 2 changes as shown in FIG. 6B. In the figure, curve A is the voltage fluctuation characteristic when the smoothing capacitor 9 is not connected, and curve B is the voltage fluctuation characteristic when the smoothing capacitor 9 is not connected.
shows the voltage fluctuation characteristics when the smoothing capacitor 9 is connected. The voltage fluctuation value V _P1 when the smoothing capacitor 9 is connected is V _P1 I _LL ·t/CL (I _LL is the current value at steady state, and t is the pulse width of the pulsed current).

On the other hand, the current detection resistor 3 has a switch element 11 connected in parallel, and a pair of diodes 1 connected in anti-parallel.
Connect 2A and 12B in parallel. The switch element 11 and the diodes 12A and 12B are provided to prevent a large voltage drop from occurring across the resistor 3 when a pulsed current flows through the load 8.
Therefore, the switch element 11 is controlled to be on for a period M including a period t during which the pulsed current flows, as shown in FIG. 6C. As the switch element 11, an FET is generally used because it is preferably capable of high-speed response, prevents on/off control signals from leaking into the circuit, and has a small leakage current.

A phase compensation capacitor 13 is further connected in parallel to the current detection resistor 3. By connecting this phase compensation capacitor 13, the operational amplifier 5
Compensates for phase rotation amount, prevents unstable operation and improves SN
The ratio has been improved.

"Problem to be solved by the invention" By the way, according to the circuit structure described above, the constant voltage source 8
Since it is equipped with a feedback loop and performs feedback operation, the output impedance is low, and it has a structure that prevents the voltage applied to the load 2 from decreasing by the smoothing capacitor 9, so it can be used at fairly high frequencies. A pulsed current can be supplied. However, as the repetition frequency of the pulsed current is increased, a problem arises in that the time from the end of the pulsed current until the current returns to a steady state must be shortened. In other words, since the purpose here is to measure the current value _ILL in a steady state, the steady state current is measured by the measuring device 4 from the point when the pulsed current ends to the point when the steady current flow returns. Must be measured. Therefore, the upper limit frequency at which the pulsed current can flow is determined by the time from the end of the pulsed current until the current returns to the steady state.

The circuit shown in FIG. 5 has the disadvantage that it takes a relatively long time from the point at which the pulsed current ends until the current stabilizes. The reason for this will be explained below.

FIG. 7 shows voltage and current waveforms at various parts of the circuit shown in FIG. 5. Figure 7A shows the load current flowing through load 2,
FIG. 7B shows the charging and discharging current of the smoothing capacitor 9. In other words, in this example, -I _CL is the discharge current, and +I _CL is the charge current.

When a pulsed current begins to flow through the load 2, the smoothing capacitor 9 discharges a discharge current -I _CL and operates to prevent the voltage Vs (FIG. 7D) supplied to the load 2 from decreasing. The switch element 11 is turned on before the pulsed current starts flowing. When the pulsed current is cut off, the load current I _L immediately returns to the steady current I _LL .

By the way, when a pulsed current flows, this pulsed current flows through the current detection resistor 3 and the diode 1.
2A, flows through a parallel circuit consisting of a switch element 11 and a phase compensation capacitor 13. The diode 12A and the switch element 11 have on-resistance. In other words, it is impossible to completely shorten the current detection resistor 3 between both ends. Therefore, the phase compensation capacitor 13 has a diode 1.
2A and the voltage generated at the on-resistance of the switch element 11 is charged. Since this charging current is given from the operational amplifier 5 with low output impedance, its charging time constant is extremely small and the voltage V _C generated across the capacitor 13 reaches the predetermined voltage V _C1 in a short time as shown in FIG. 7E. reach

On the other hand, when the pulsed current is cut off, the voltage applied to the phase compensation capacitor 13 becomes the voltage generated by the steady current flowing through the current detection resistor 3. This voltage has a very small value compared to the voltage V _C1 charged in the capacitor 13. As a result, the charge stored in the capacitor 13 is discharged through a parallel circuit consisting of the switch element 11, the diode 12A, and the resistor 3. capacitor 13
When the charging voltage V _C1 has a voltage value sufficient to make the diode 12A conductive, the diode 12A is discharged, but as the voltage decreases, the on-resistance of the diode 12A gradually increases and the diode 12A turns off. Eventually, after the diode 12A is turned off, discharge occurs through the switch element 11 and the resistor 3. If the on-resistance value of the switch element 11 is R _ON and the resistance value of the resistor 3 is R _M , and the magnitude relationship is R _ON << R _M , the switch element 11 is turned off from the moment the pulsed current falls. The discharge time constant during the period Tt until the capacitance value C _M of the capacitor 13 is
and the on-resistance value R _ON of switch element 11.
It becomes C _M × R _M. This time constant is the switch element 11
If the on-resistance is, for example, about 100Ω, the value will be larger than the rise time constant during charging.

Furthermore, when the switch element 11 is turned off after the period Tt, the resistor 3 becomes the only discharge path for the capacitor 13. If the resistance value R _M of the resistor 3 is selected to be 100KΩ, its time constant will be 1000 times the time constant when the switch element 11 is in the on state. Therefore, the voltage of the capacitor 13 decreases at a very slow rate, as shown in period T _s in FIG. 7E.

If the voltage generated across resistor 3 is measured in measuring circuit 4 while the discharge current of capacitor 13 is flowing through resistor 3, and the value of the current flowing through resistor 3 is measured, then the voltage flowing through resistor 3 will flow to load 2. It cannot be said that the steady current was accurately measured.

Therefore, it is required to shorten the discharge time of the capacitor 13. In order to shorten the discharge time of the capacitor 13, the capacitance value C _M of the capacitor 13 should be reduced, or the resistance value of the current detection resistor 3 should be reduced.
This can be achieved by selecting one or both of R _M to be small, or by sufficiently reducing the on-resistance value R _ON of the switch element 11.

However, the resistance value R _M of the current detection resistor 3 cannot be made small in order to satisfy the conditions for extracting a minute current as a voltage.

In addition, the on-resistance value R _ON of the switch element 11 is several Ω to several tens of Ω as long as the switch element 11 uses a FET that has a small leakage current and does not leak the on/off control signal into the circuit.
This is the lower limit, and a switch element with an on-resistance smaller than this cannot be obtained.

For this reason, in order to ultimately reduce the discharge time constant of the capacitor 13, the capacitor 13
This problem can only be solved by selecting a small capacitance value. However, the capacitance value of capacitor 13
If C _M is selected to be small, the stability of the closed loop that constitutes the constant voltage source 8 will deteriorate, and if the repetition frequency of the pulsed current flowing through the load 2 is increased, the constant voltage source 8
This results in an unstable state where the oscillation occurs.

If the load 2 is specified in advance to operate under certain conditions, the capacitance of the capacitor 13, the capacity of the smoothing capacitor 9, the frequency characteristics of the operational amplifier, etc. should be appropriately set so that it operates stably under those conditions. I can. However, in order to operate as a general-purpose tester, it must be designed to operate stably over as wide a range as possible, especially against changes in the load drive frequency, assuming that the load conditions will change.

In other words, as explained above, a pulsed current flows through the load 2, so in order to suppress the drop in supply voltage when a pulsed current flows, it is necessary to use a smoothing capacitor 9 with a relatively large capacitance value. It becomes necessary.

When the smoothing capacitor 9 having a large capacitance value is connected in parallel to the load 2, when the load 2 side is viewed from the constant voltage source 8, it generally appears as a capacitive load. In order to operate the constant voltage source 8 normally with a capacitive load connected, a phase compensation capacitor 13 having a certain amount of capacity is required. In this state, if the frequency of the current flowing in a pulsed manner is increased in order to shorten the time required for the test, the impedance of the smoothing capacitor 9 serving as the load tends to gradually decrease.

As a result, when the frequency of the current flowing in pulse form exceeds a certain frequency, the load becomes infinitely close to capacitive, and the phase of the output voltage of the constant voltage source 8 approaches the phase delayed by 90 degrees. Despite the presence of the phase compensation capacitor 13, the feedback circuit of the operational amplifier 5 forming part 8 approaches a positive feedback state and finally falls into an oscillation state.

In order to stop this oscillation state and operate stably, it can be solved by increasing the capacitance of the phase compensation capacitor 13, but if the problem is solved by increasing the capacitance of the capacitor 13, then the difference between the capacitor 13 and the resistor 3 The time constant becomes large, which inhibits high-speed measurements as explained above.

"Means for Solving the Problems" In the present invention, a decoupling resistor is inserted in series between the output terminal of a constant voltage source and a load including a smoothing capacitor.

By inserting the decoupling resistor in series between the constant voltage source 8 and the load in this way, when the load is viewed from the constant voltage source 8, the decoupling resistor appears to be connected in series with the load. As a result, even if the impedance of the smoothing capacitor is reduced by changing the repetition frequency of the pulsed current, the impedance on the load side will approach capacitance as much as possible because of the presence of the resistance component of the decoupling resistor. Therefore, the phase of the output voltage of the constant voltage source 8 never approaches the phase delayed by 90 degrees.

Therefore, even if the repetition frequency of the pulsed current flowing through the load is higher than the conventional upper limit, the constant voltage source 8
There is no risk of the operation becoming unstable. In other words, since the influence of the load on the constant voltage source 8 becoming infinitely close to capacitive is reduced, the constant voltage source 8 can be
can be operated regularly.

Since the capacitance value of the phase compensation capacitor can be made small, the charge stored in the phase compensation capacitor can be discharged within a relatively short time after the pulsed current falls. As a result, the time from the fall of the pulsed current to the measurement of the steady current can be shortened, so the repetition frequency of the pulsed current can be set high, thereby enabling high-speed testing.

"Embodiment" FIG. 1 shows an embodiment of the voltage applied current measuring device according to the present invention. In FIG. 1, parts corresponding to those in FIG. It is characterized by a structure in which a decoupling resistor 15 is connected in series between the two.

The decoupling resistor 15 has a resistance of about 10 ohms when the capacitance value of the smoothing capacitor 9 is about 0.1 microfarad.

"Operations and Effects of the Invention" By providing the decoupling resistor 15 in this way, even if the repetition frequency of the pulsed current is variously changed, the amount of change in impedance seen from the constant voltage source 8 to the load 2 side is reduced. . In particular, when the repetition frequency of the pulsed current is set to a high frequency, the impedance of the smoothing capacitor 9 approaches zero, but the impedance of the decoupling resistor 15 remains constant regardless of changes in frequency. voltage source 8
The load impedance seen from can be seen as constant.

Therefore, the load condition of the constant voltage source 8 appears constant even at high frequencies, and as a result, the capacitance value of the phase compensation capacitor 13 can be selected to be small. The time constants of the capacitor 13 and the current detection resistor 3 can be made small. Therefore, the time from the fall of the pulsed current until the charge in the phase compensation capacitor 13 is discharged can be shortened, and a high-speed test can be performed.

[Brief explanation of drawings]

Fig. 1 is a connection diagram for explaining an embodiment of the present invention, Fig. 2 is a connection diagram for explaining an example of an object to be tested on which a voltage applied current measurement test is performed, and Fig. 3 is a connection diagram for explaining an example of an object to be tested. Figure 4 is a waveform diagram showing the flowing current waveform, Figure 4 is a connection diagram explaining the configuration for measuring the current flowing through the test object explained in Figure 2, and Figure 5 is a diagram illustrating the conventional voltage applied current measuring device. The connection diagram, FIGS. 6 and 7 are waveform diagrams for explaining the operation of FIG. 5. 2: Load, 3: Current detection resistor, 4: Current measuring device, 5: Operational amplifier, 7: Voltage source, 8: Constant voltage source, 9: Smoothing capacitor, 11: Switch element, 12A, 12B: Diode , 15: Decoupling resistor.

Claims (1)

[Claims] 1. A constant voltage source equipped with a feedback circuit to provide a constant voltage to a load that periodically consumes a large value of load current, and B. A current flowing from this constant voltage source to the load. a current detection resistor for measuring C; D: A smoothing capacitor connected in parallel to the above load to stabilize the voltage applied to the load against fluctuations in load current; E: To short-circuit both ends of the above current detection resistor during periods when a large load current flows. A voltage applied current measuring device comprising: a switch element F; and a decoupling resistor inserted in series between the output terminal of the constant voltage source and the connection point of the load and smoothing capacitor.