JPH0377144A - Detecting circuit for microprogram error - Google Patents

Abstract

PURPOSE:To detect or correct the errors of a microprogram without extending the word length of a microprogram field by assigning the area of the microprogram field that is not used as a control signal to the parity information. CONSTITUTION:An area which is not used as a control signal in a microprogram field consisting of the mode designation information 1 and the control signal information 2 is assigned as a parity information area. This assignment is carried out individually at every mode, and the microprogram field is distributed to the information 2 and the parity information 3 and connected to a parity checking circuit 5 in accordance with each mode. Thus the microprogram field is distributed to both pieces of information 2 and 3 based on the information 1. Thus, the errors of a microprogram can be detected or corrected without extending the microprogram field.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a technique for detecting errors in a microprogram in a microprogram control type computer having various modes [Prior Art] Fig. 3 is an example of the configuration of a circuit that detects microprogram errors using a conventional microprogram field.
FIG. 4 is an example of the configuration of a microprogram field to which parity information is added in a conventional computer.

In FIG. 4, (1) is a mode for executing calculations.

Mode specification information that specifies which mode to select from various modes such as a mode for executing human output control and a mode for executing branching control, (2) is the operand and arithmetic function during calculation and data manipulation. and control signal information for specifying destinations, setting control signals during human output control, specifying addresses and condition judgment items during branch control, flag control, order control, etc. (3) is 1 bit for these information. Or multiple bits of parity information. Parity information (3) includes mode designation information (1), control signal information (2)
) is located in a different area.

Next, the operation shown in FIG. 3 will be explained. (4) is the microprogram memory that stores the microprogram, (
5) is a parity check circuit that detects or corrects errors occurring in the microprogram, (6) is error-corrected mode designation information output from the parity check circuit (5), and (7) is a parity check circuit (5). ) The error-corrected control signal information output from (8) decodes the microprogram.

A microprogram decoder that controls each part of a computer (
9) is an error signal output from the parity check circuit (5), and (10) is a failure detection circuit that performs processing in the event of a failure. Mode designation information (1), control signal information (2), and parity information (3) output from the microprogram memory (4) are connected to a parity check circuit (5). The mode designation information (6) and control signal information (7) output from here are sent to the microprogram decoder (8).
connected to. Information regarding the error detected by the parity check circuit (5) is connected as an error signal (9) to the failure detection circuit (10), and error processing for the error that has occurred is performed here.

[Problem to be solved by the invention]

Since conventional microprogram field and microprogram error detection circuits are configured as two or more, parity information (3) which is not directly used as a control signal to control the operation of a computer,
There is a problem in that the word length of the microprogram must be expanded, which increases the number of parts in the microprogram memory, leading to an increase in power consumption.

This invention was made in order to solve the problems as described in 2.Mode designation information (1), control signal information (2)
) in the microprogram field consisting of 7
It is an object of the present invention to obtain a microprogram error detection circuit that can allocate parity information (3) without extending the word length and correct or detect errors occurring in a microprogram.

[Means to solve the problem]

The microprogram error detection circuit according to the present invention allocates an area that is not used as a control signal among the microprogram field consisting of mode designation information (1) and control signal information (2) as a parity information area, and assigns this area to each mode. The microprogram field is divided into control signal information (2) and parity information (3) according to the mode, and the parity check circuit (5
).

[Effect]

The error detection circuit according to the present invention divides the microprogram field into control signal information (2) and parity information (3) based on the mode designation information (1), thereby making it possible to detect errors that occur in the microprogram without expanding the microprogram field. [Embodiments of the Invention] Embodiments of the invention will be described below. Figure 1 shows
Configuration example of a circuit for detecting errors in a microprogram using a microprogram field according to an embodiment, second example
The figure shows an example of the configuration of a microprogram field according to the embodiment. In the figure, (1) to (10) are common to the second prior art example, and their functions and operations are also the same. (
11) is a mode decoder that decodes the mode of the microprogram, (12a) (12b)...(+2n) is a rearrangement circuit that distributes the microprogram field according to the mode, (1, 3a) (13b)...( 13n)
is the mode signal indicating the microprogram mode, (
14a) (14b)=114n) is the rearrangement circuit (12a
) (12b) ... (12n), (15a) (15b) (15
n) are rearrangement circuits (12a) (12b)...(12n
) reordered control signal information, (16
a) (16b)...(16n) are rearrangement circuits (12a)
(12b)...This is rearranged parity information rearranged by (12n).

In Figure 2, among the microprogram fields,
The area occupied by the control signal information (2) differs for each mode, and in each mode there is an area that is not used as the control signal information (2). This unused area is allocated as the parity information (3) area for that mode, thereby configuring a microprogram field that can detect errors without extending the word length of the microprogram field. Parity information (3) may be one bit or multiple bits, and even if parity information (3) and control signal information (2) are distributed bit by bit within the microprogram field, they are concentrated in a certain area. You can.

Next, the operation shown in FIG. 1 will be explained. Mode designation information (I) output from microprogram memory (4)
, control signal information (2), and parity information (3) are stored in the microprogram field for each mode.
) and parity information (3).
a) (12b)...(12n), and the mode designation information (1) is also connected to the mode decoder (11). It is output from the mode decoder (11). Mode signals (13a) (13b)-(13n) indicating mode numbers
) are the rearrangement circuits (12a) (12b), respectively.
(12n) and is connected to the rearrangement circuit (12n) according to the mode.
a) Select only one (12b)...(12n).

From the selected re-arrangement circuit (12n), re-arrangement mode designation information (14a) (14b)...(14n), re-arrangement control signal information (15a)(15b)...(15n),
Rearrangement parity information (16a) (16b)... (16
n) is output. Unselected reordering circuit (12a)
The outputs of (12b)...(12n) are in a high impedance state to prevent competition between the outputs. In this way, the microprogram fields, which have different arrangements depending on the mode, are connected to the parity check circuit (5), which outputs mode designation information (6) and control signal information (7).
) is connected to the microprogram decoder (8). Information regarding the error detected by the parity check circuit (5) is connected as an error signal (9) to the failure detection circuit (1o), and error processing for the error that has occurred is performed here.

〔Effect of the invention〕

As described above, according to the present invention, mode designation information (1
), a re-arrangement circuit (12a) allocates an area not used as a control signal among the microprogram field consisting of control signal information (2) as parity information (3).
)(12b)...(12n), rearrangement mode designation information (14a)(14b)...(1
4n) Rearrangement control signal information (15a) (15b)...
(15n), rearrangement parity information (16a) (16b)
...(16n), and the parity check circuit (
5), it is possible to correct or detect errors occurring in the microprogram without expanding the word length of the microprogram field. Further, there is an effect that the number of parts and power consumption of the microprogram memory are not increased.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of a microprogram error detection circuit according to an embodiment of the invention, FIG. 2 is a diagram showing the configuration of a microprogram field according to an embodiment of the invention, and FIG. 3 is a diagram showing the configuration of a microprogram error detection circuit according to an embodiment of the invention. FIG. 4 is a diagram showing an example of the configuration of a microprogram error detection circuit in a conventional computer. In the figure, (1) is mode designation information, (2) is control signal information, and (3
) is parity information, and (4) is microprogram memory. (5) is a parity check circuit, (6) is mode designation information, (7) is control signal information, (8) is a microprogram decoder, (9) is an error signal, and (10) is a failure detection circuit. (11) is a mode decoder, (12a) (12b) - (
12n) is a rearrangement circuit, (13a)(13b)=(
13n) are mode signals (14a) (14b)...(1
4n) is the rearranged mode specification information, (15a) (
15b)...(15n) is rearranged control signal information, (f6a) (16b)...(16n) is rearranged parity information. Note that the same reference numerals in the two figures indicate the same or equivalent parts. show.

Claims (1)

[Claims] Mode for executing calculations, mode for executing input/output control,
In a microprogram control type computer that consists of various modes such as a mode for executing branch control,
A mode decoder that decodes the mode, a rearrangement circuit that distributes the microprogram field into mode designation information, control signal information, and parity information according to the mode, and a correction circuit that corrects errors that occur in the mode designation information, control signal information, or parity information. or a parity check circuit that detects the parity information, and allocates an area of the microprogram field that is not used as a control signal as a parity information area for control signal information, and configures this separately for each mode. A microprogram error detection circuit that can correct or detect errors that occur.