JPH0375532U - - Google Patents
Info
- Publication number
- JPH0375532U JPH0375532U JP1989137554U JP13755489U JPH0375532U JP H0375532 U JPH0375532 U JP H0375532U JP 1989137554 U JP1989137554 U JP 1989137554U JP 13755489 U JP13755489 U JP 13755489U JP H0375532 U JPH0375532 U JP H0375532U
- Authority
- JP
- Japan
- Prior art keywords
- recess
- tapered side
- vacuum hole
- mounting collet
- dry air
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/75301—Bonding head
- H01L2224/75302—Shape
- H01L2224/75303—Shape of the pressing surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Description
第１図は本考案の一実施例の縦断面図、第２図
は従来のコレツトの縦断面図である。
１……真空穴、２……高圧乾燥空気穴、３……
コレツト、４……ペレツト、５……接着剤、６…
…ケースキヤビテイ面、７……ケース。
FIG. 1 is a longitudinal sectional view of an embodiment of the present invention, and FIG. 2 is a longitudinal sectional view of a conventional collet. 1...Vacuum hole, 2...High pressure dry air hole, 3...
Collect, 4... Pellet, 5... Adhesive, 6...
...Case cavity surface, 7...Case.
Claims (1)
該凹部の底面に通ずる真空穴により半導体チツプ
を前記テーパ状の側面に当接させて保持するマウ
ント用コレツトにおいて、前記真空穴と並行し、
前記凹部の底面に通ずるように高圧乾燥空気穴を
設けたことを特徴とするマウント用コレツト。 The tip of the rod-shaped body has a concave portion with a tapered side surface,
In a mounting collet for holding a semiconductor chip in contact with the tapered side surface through a vacuum hole communicating with the bottom surface of the recess, parallel to the vacuum hole,
A mounting collet characterized in that a high-pressure dry air hole is provided so as to communicate with the bottom surface of the recess.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989137554U JPH0375532U (en) | 1989-11-27 | 1989-11-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989137554U JPH0375532U (en) | 1989-11-27 | 1989-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0375532U true JPH0375532U (en) | 1991-07-29 |
Family
ID=31684706
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989137554U Pending JPH0375532U (en) | 1989-11-27 | 1989-11-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0375532U (en) |
-
1989
- 1989-11-27 JP JP1989137554U patent/JPH0375532U/ja active Pending