JPH0374995B2 - - Google Patents

Description

[Detailed description of the invention]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal deflection circuit, and more particularly, to a horizontal deflection circuit that always maintains a substantially constant ratio of the effective screen display period in the horizontal deflection period even when the horizontal deflection frequency is varied. 2. Description of the Related Art Generally, in a horizontal deflection circuit that deflects an electron beam of a picture tube, there is a problem in that the deflection current changes in accordance with changes in the horizontal deflection frequency, and the horizontal screen amplitude changes. To further explain this point, FIG. 4 shows a circuit diagram of an example of a conventional horizontal deflection circuit. In the figure, 1 operates in synchronization with a horizontal synchronization signal from a previous stage (not shown), and excitation pulse P
2 is a horizontal deflection output transistor that is turned on and off by the excitation pulse P, 3 is a damper diode, 4 is a horizontal deflection coil, 5 is a DC blocking or S-shaped correction capacitor, 6 is a retrace line Resonance capacitor, 7 is flyback transformer,
8 is a voltage regulator, 9 is a high voltage rectifier circuit, 10
indicates a picture tube. Now, when the horizontal deflection output transistor 2 turns on and off in response to the excitation pulse P, in conjunction with the on and off operations of the damper diode 3, a sawtooth wave current is generated in the horizontal deflection coil 4 according to a well-known principle. occurs. A horizontal deflection coil 4 is attached to the neck of the picture tube, and deflects the electron beam of the picture tube by the magnetic flux generated by the sawtooth wave current. Further, the voltage regulator 8 controls the power supply voltage +E _B to make it a DC voltage +E _B ', and supplies it to the horizontal deflection circuit through the primary winding 7a of the flyback transformer 7. However, when the horizontal deflection period is determined to be one, is not particularly necessary. With the above configuration, the resonance period is determined by the composite intagtance of the inductance value of the horizontal deflection coil 4 and the equivalent inductance seen from the primary side 7a of the flyback transformer 7, and the capacitance value of the retrace resonance capacitor 6. An oscillating current flows through the circuit for half a cycle, and a half-sine wave retrace pulse V _P is generated on the collector side of the horizontal deflection output transistor 2. During this retrace pulse period, the horizontal deflection output transistor 2 and the damper diode 3 are in a cut-off state, and retrace scanning is performed by the horizontal deflection current during this period. Further, the flyback transformer 7 boosts the retrace pulse V _P generated at the collector of the horizontal deflection output transistor 2, and extracts it from the secondary winding 7b.
This is converted into a DC high voltage (high voltage) _EHT through a high voltage rectifier circuit 9, which is normally used as the cathode accelerating voltage of the picture tube. On the other hand, the high voltage _EHT is supplied to the other end of the resistive voltage divider 11, one end of which is grounded.
are taken out as a focus electrode voltage Ef and a screen electrode voltage Eg ₂ through sliders 11a and 11b, respectively, and supplied to the picture tube 10. Further, the pulse width of the retrace pulse V _P is determined by the resonance period determined by the combined inductance of the horizontal deflection coil 4, the flyback transformer 7, and the capacitance of the retrace resonance capacitor 6. Here, it is assumed that the deflection scanning period is T _S , the horizontal deflection output transistor 2 and the damper diode 3 are turned on during this period, and the inductance value of the horizontal deflection coil 4 is L, then the deflection current flowing through the horizontal deflection coil 4 is The relationship between the peak-to-peak value I and the DC power supply voltage value +E _B ' of the circuit is expressed as I=(E _B '/L)·T _S (1). By the way, the horizontal deflection frequency of recent computer equipment output signals varies from 15kHz to 30kHz, depending on the model.
It often takes various values up to around Hz, and it is desirable that the display monitor can also handle various deflection frequencies. Furthermore, regarding home video sources such as television broadcasts and video discs,
The current horizontal deflection frequency is 15.734kHz, but in the near future it is thought that horizontal deflection frequencies of 30kHz or higher will be mixed in for high-definition broadcasting, etc., and it is desirable to develop a receiver that can handle any deflection frequency with a simple configuration. It was rare. However, in the conventional horizontal deflection circuit shown in Fig. 4, when the deflection period T _H becomes long, the deflection scanning period becomes
Since T _S also becomes longer, the peak-to-peak value I of the deflection current increases according to the relationship in equation (1), and as a result, the horizontal screen amplitude of the picture tube increases. Conversely, the deflection period T _H
As becomes shorter, the horizontal screen amplitude decreases. Further, as shown in FIG. 6, if the pulse width of the retrace pulse V _P , that is, the retrace time is T _R , then the value of the retrace pulse V _P is generally V _P = {(π/2)・(T _S /T _R )+1}・E _B ′ (2) As can be seen from equation (2), the retrace pulse V _P also changes when the deflection scanning period T _S changes. When this retrace pulse V _P changes, the high voltage E _HT obtained by step-up rectifying the retrace pulse V _P changes, and the deflection efficiency of the electron beam is also affected, resulting in a change in the horizontal screen amplitude. Therefore, the focus electrode voltage Ef and the screen electrode voltage Eg ₂ of the picture tube 10, which are obtained by dividing the high voltage _EHT by the resistive voltage divider 11, also change, and therefore the picture tube 10
0's operating conditions will change. As described above, in the conventional horizontal deflection circuit shown in Fig. 4, when trying to accommodate various horizontal deflection periods, the screen width of the picture tube changes each time, making it troublesome to adjust the horizontal screen amplitude. There were some drawbacks. Therefore, the present applicant previously proposed in Japanese Patent Application No. 59-256116 a horizontal deflection circuit in which the horizontal deflection current is always constant for various horizontal deflection periods T _H , and the high voltage E _HT also does not change. Proposed. FIG. 5 shows a circuit diagram of an example of a horizontal deflection circuit proposed earlier by the present applicant. In the figure, the same components as those in FIG. 4 are given the same numbers, and their explanations will be omitted. The secondary winding of the flyback transformer 7, whose one end is grounded, is divided into three stages 7 ₁ , 7 ₂ , and 7 ₃ , and diodes 12 a and 12 b are inserted and connected between the two stages, which is called a multi-singler system. The pulse taken out from the next winding is rectified by a diode 12.
High voltage by rectifying with a, 12b, 12c
E _HT is obtained. Furthermore, the multi-singular system facilitates high-order harmonic tuning of the flyback transformer 7. If the picture tube 10 is small and does not require high voltage, a conventional pulse peak rectification format can be used with one secondary winding and one diode. However, as will be explained later, the condition that the deflection current and high voltage remain constant with respect to changes in the horizontal deflection frequency no longer holds true, so the Cottcroft-Walton circuit (so-called multi-voltage rectifier circuit), which is generally used as a high-voltage rectifier circuit, is used. cannot be used. On the other hand, the flyback transformer 7 with one end grounded
The pulse voltage V _P ' obtained at the tertiary winding 7c becomes a DC voltage _E3 through a rectifying diode 13 and a smoothing capacitor 14 whose one end is grounded. This DC voltage _E3 is output as a power supply voltage to other circuits of the device as necessary. The DC voltage E ₃ is compared with the reference voltage E _S of the reference voltage source 15 by a comparator 16, and a comparator output voltage is generated according to the deviation. The voltage regulator 17 generates a DC voltage + whose level changes depending on the comparator output voltage.
E _B ' is supplied to the primary side of the flyback transformer 7 as the actual power supply voltage of this horizontal deflection circuit. In the above configuration, when the DC voltage E ₃ tries to increase, the DC voltage E _B ' decreases, and conversely, the DC voltage
When E ₃ tries to decrease, DC voltage E _B ' increases, so DC voltage E ₃ is kept at a constant value. Also,
Like the DC voltage E ₃ , the high voltage E _HT is also obtained by boosting the retrace pulse V _P , so it is constant regardless of the deflection period. To explain the above using a mathematical formula, in the horizontal deflection circuit, the peak-to-peak value I of the deflection current is constant regardless of the horizontal deflection period T _H , so I=(E _B ′・T _S )/L= constant (3), and therefore E _B ′・T _S =LI=constant (4). Substituting equation (4) into equation (2) gives V _P =(π/2)·(LI/T _R )+E _B ′ (5). E _B ′ in the second term on the right side of equation (5) means the DC average level of the retrace pulse V _P shown in FIG. 6, and the first term on the right side represents the value V ₁ from the average level to the peak value. means. The retrace pulse V _P is generated by the tertiary winding 7 with a turns ratio of 1:n.
The voltage is increased at voltage V P 'c to become a pulse voltage V _P ', but since one end of the tertiary winding 7c is grounded, the average level of the pulse voltage V _P ' becomes zero voltage, and therefore the average level of the pulse voltage V _P ' The DC voltage E ₃ obtained by rectifying the value nV ₁ up to the level or peak value is the value obtained by subtracting the voltage drop of the rectifier diode 13 from nV ₁ . Consistent with _S , it remains constant. Therefore, V ₁ is also constant,
Its value is expressed as V ₁ =(π/2)·(LI/T _R ) (6). Here, if the retrace time T _R is constant, the peak-to-peak value I of the deflection current is also constant. As mentioned above, regardless of the change in horizontal deflection frequency,
Since both the high voltage _EHT and the peak-to-peak value I of the deflection current are kept constant, the horizontal screen amplitude of the picture tube 10 does not change. Problems to be Solved by the Invention However, as mentioned above, the peak of the deflection current
The method of keeping the peak value I constant may be inconvenient depending on the purpose. For example, the fifth
When the horizontal deflection circuit shown in the figure and proposed by the present applicant is applied to a computer that outputs a signal with a horizontal deflection frequency of 30.5 kHz (that is, a horizontal deflection period of 32.8 μs), which is approximately twice that of normal television broadcasting, If the deflection scanning period T _S is larger than the retrace time T _R , the effective screen display area will be larger, but there is a limit to how short the retrace time T _R can be shortened due to circuit technology. The effective screen displayable part (i.e. video signal transmission period) shown in Figure 3 is a horizontal deflection period of 32.8μs.
80%, the retrace time T _R of the retrace pulse V _P shown in Figure 7B will be 20% or less of the horizontal deflection period of 32.8 μs.
It is appropriate to set it to about 6 μs (about 18.3%). However, in the horizontal deflection circuit proposed earlier by _the present applicant as shown in FIG. There is a need. Therefore, the horizontal deflection frequency is 15.734kHz (or horizontal deflection period
63.6 μs), the retrace time T _R ′ is the same as above.
If it is 6 μs, the ratio of the deflection scanning period T _S ' of the retrace pulse V _P shown in FIG. 8B to the horizontal deflection period of 63.6 μs becomes 90.6%. In this case, since the peak-to-peak values I of the deflection currents shown in FIG. 7C and FIG. 8C are both constant values, when the horizontal deflection frequency is 15.734kHz,
The maximum value of the deflection current in the effective screen displayable area shown in is as small as I'. Therefore, the horizontal screen amplitude on the receiving screen is the horizontal deflection frequency.
In the case of 15.734kHz, the ratio of I'/I is smaller than in the case of horizontal deflection frequency of 30.5kHz. Therefore, while the horizontal deflection circuit proposed by the present applicant shown in FIG. 5 has the advantage of increasing the effective screen display area, when receiving ordinary television signals, blanking occurs at the left and right ends of the picture tube. Not only is it unsightly as there are areas with no image at all, but the vertical screen amplitude must also be reduced by the ratio of I'/I, otherwise the correct aspect ratio (usually 3
There were problems such as not being able to maintain 4). SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a horizontal deflection circuit that solves the above-mentioned problems by keeping the ratio of the effective screen display period in the horizontal deflection cycle substantially constant even when the horizontal deflection cycle changes. shall be. Means for Solving the Problems The horizontal deflection circuit according to the present invention is composed of a voltage generation means, a comparator, a regulator, and a high voltage output means, and the ratio of the effective screen display period to the horizontal deflection period is Even if the horizontal deflection period changes, it is kept approximately constant. The voltage generating means generates a DC voltage approximately proportional to the peak-to-peak value of a flyback pulse generated in the horizontal deflection coil or a pulse obtained by transforming the flyback pulse. The comparators each compare the DC voltage from the voltage generating means and a preset reference voltage. The regulator is supplied with the output signal of the comparator and controls the power supply voltage supplied to the primary winding of the flyback transformer so that the value of the DC voltage matches the value of the reference voltage and remains constant. The high voltage output means outputs a high voltage for the picture tube from the pulses taken out from the secondary winding of the flyback transformer. Further, the high voltage output means is configured to output the peak of the pulse taken out from the secondary winding of the flyback transformer.
It consists of an even-order voltage doubler rectifier circuit that obtains a high voltage that is an integral multiple of the peak value. Function The horizontal deflection circuit according to the present invention allows the deflection current to flow slightly more than the amount sufficient to change from the left edge to the right edge on the image receiving screen by varying the amount of so-called overscan according to the horizontal deflection period. ,
The ratio of the effective screen display period to the horizontal deflection period is kept approximately constant. In addition, by keeping the DC voltage constant using the above regulator, the peak-to-peak value of the flyback pulse (retrace pulse) V _P is kept constant,
Therefore, the high voltage used for the anode acceleration voltage, etc. is also constant. Next, the overscan operation of the horizontal deflection circuit according to the present invention will be explained with reference to FIG.
FIGS. 3A and 3B show the deflection scanning periods T _S , T _S ′ and retrace times T _R , T _R ′ when the horizontal deflection period is short and long, as shown in FIGS. 7 and 8, respectively. Shows the percentage of time. However, in Figure 3 A and B, the time scale of the horizontal axis is changed, and the deflection scanning period is
It is drawn so that T _S and T _S ′ are the same length, and in reality, retrace time T _R and T _R ′ represent the same time,
Conversely, the deflection scanning period T _S ' represents a significantly longer time than T _S . In this case, the proportion of the retrace time in the horizontal deflection period is smaller than _the retrace time T _R . Next, Figure 3C shows the peak-to-peak value I of the deflection current.
, which corresponds to the deflection scanning period T _S or T _S '. Also, Figure 3D shows the horizontal deflection period, i.e.
The virtual current value I _P required to deflect at the same rate as the above deflection current for the time equal to the sum of T _S and TR or T _S ′ and T _{R ′} is shown. Further, FIG. 3E shows the maximum value I ₀ of the deflection current required to deflect from the left end to the right end by J degrees on the image receiving screen. These current values I, I _P and I ₀ correspond to the horizontal position on the image receiving screen, so
The current value I ₀ corresponds to the horizontal amplitude of the J degree receiving screen, that is, the effective screen display portion. From the above definition, it is expressed as I/I _P =T _S /(T _S +T _R ) (7). In addition, the ratio of the effective screen display period to the horizontal deflection period, that is, when this is converted into a deflection current, is _the ratio _α (=
I ₀ /I _P ) must be kept approximately constant. Therefore, conditions should be set so that this α is as close to a constant as possible. From this definition of α, I _P =I ₀ /α (8), and by substituting this equation (8) into the above equation (7), we get (I/I ₀ )α=T _S /(T _S +T _R ) (9) Therefore, α is expressed as α=(I ₀ /I)·{T _S /(T _S +T _R )} (10). Here, I ₀ is a constant value. On the other hand, the peak-to-peak value of the retrace pulse V _P is
From equations (2) and (4) above, V _P {(π/2)・(1/T _R )+(1/T _S )}・IL = {(πT _S +2T _R )/(2T _R・T _S )}・IL (11), and by modifying equation (11), the peak-to-peak value I of the deflection current is: I={(T _R・V _P )/L}・{T _S / ((π/2)・T _S +T _R )} (12) It is expressed as follows. Substituting this equation (12) into the above equation (10), α becomes α={(LI ₀ )/(T _R・V _P )}・{((π/2)・T _S・T _R )/ (T _S・T _R )} (13) In the above equation, if the circuit is configured so that the retrace time T _R of the peak-to-peak value of the retrace pulse is always constant, then the left term of the above equation (13) {(LI ₀ )/T _R・V _P } It is always constant, and the next term {((π/2)・T _S・T _R )/(T _S・T _R )} also has a similar numerator and denominator shape, so the deflection scanning period T _S It is expected that the value of α will not change that much even if it changes. Next, the table below shows the results of calculating numerical values such as α when the horizontal deflection frequency f _H changes from 15 to 34 kHz with the retrace time T _R =5.5 μs.

[Table] As you can see from the table above, the horizontal deflection frequency is 34k.
Hz (horizontal deflection period 29.4 μs), and retrace time T _R is
When set to 5.5 μs, T _S / _TH becomes 81.3%.
If we set the value of the deflection current to deflect J degrees to the full extent of the image receiving screen during the deflection scanning period T _S =23.9 μs, that is, if we perform a jet scan,
The above value of T _S /T _H = 81.3% is the horizontal deflection period T _H
It is a value that indicates the effective screen display period occupied by T _S / T _H when the horizontal deflection frequency is 15kHz.
=91.8% is also a value indicating the effective screen display period. Therefore, in the horizontal deflection circuit, when the horizontal deflection frequency changes from 15 kHz to 34 kHz, the effective screen display period changes from 91.8% to 81.3%, resulting in the above-mentioned problem. On the other hand, the value of α shown in the above table is also a value indicating the ratio of the effective screen display period, similar to the above T _S / _TH . At this time, when setting the horizontal deflection frequency to 34 kHz and just scan, the value of α is 81.3%, which is the same as T _S / T _H above.
becomes. However, in the horizontal deflection circuit proposed by the applicant shown in FIG. 5, the peak-to-peak value I of the deflection current is always controlled to be constant, but in the horizontal deflection circuit of the present invention, the horizontal deflection period
As T _H increases, the deflection current increases and tends to overscan. Therefore, the percentage of effective screen display period, which is α
Even when the horizontal deflection frequency changes from 34 kHz to 15 kHz, there is only a slight increase from 81.3% to 84.6%, and the amount of change is suppressed to about 1/3 compared to T _S / _TH . Therefore, as described above, when the horizontal deflection period becomes longer, the possibility of occurrence of the defect that both ends of the image receiving screen are chipped is greatly reduced. Embodiment Next, the specific circuit configuration of the horizontal deflection circuit according to the present invention will be described. FIG. 1 shows a circuit system diagram of an embodiment of the horizontal deflection circuit according to the present invention. In the figure, the same components as in FIGS. 4 and 5 are designated by the same reference numerals, and their explanations will be omitted. The pulse voltage _VHT taken out by the secondary winding 7b of the flyback transformer 7, one end of which is grounded, is supplied to a high-voltage rectifier circuit 18 comprised of an even-stage Kotscroft-Walton circuit (even-order voltage doubler rectifier circuit). . The high voltage rectifier circuit 18 has capacitors 19 to 2.
2, and rectifying diodes 23 to 26, and a high voltage obtained by rectifying the pulse voltage _VHT .
_EHT is supplied to the picture tube 10 as an anode accelerating voltage. On the other hand, the flyback transformer 7 with one end grounded
The pulse voltage V _P ' obtained at the tertiary winding 7c of
A DC voltage E ₀ corresponding to the peak-to-peak value of the pulse voltage V _P ' is generated through the half-wave voltage doubler rectifier circuit 27 configured as shown in FIG. This DC voltage E ₀ is output as a power supply voltage to the leg circuit of the device as needed, and is also supplied to the comparator 16 and the reference voltage source 1
It is compared with the reference voltage E _S from 5. The voltage regulator 32 adjusts the DC voltage E ₀ and the reference voltage E _S to be equal, regardless of the deflection period, in accordance with the comparator output voltage having a value corresponding to the difference between the DC voltage E ₀ and the reference voltage E _S. The level of the DC voltage +E _B ' supplied to the primary side of the flyback transformer 7 is changed so that it remains constant. In this way, the voltage regulator 32
The peak-to-peak of the pulse voltage V _P ' generated in the tertiary winding 7c is controlled so that the value of the DC voltage E ₀ always matches the value of the reference voltage E _S regardless of the horizontal deflection period. The value becomes constant, and therefore the peak-to-peak value of the retrace pulse V _P which is in a comparative relationship with the pulse voltage V _P ' also becomes constant. If the peak-to-peak value of this retrace pulse V _P is constant, as mentioned above, even if the horizontal deflection frequency changes, the peak-to-peak value I of the horizontal deflection current
changes appropriately to change the amount of overscan, and as a result, the ratio α of the effective screen display period in the horizontal deflection period is kept approximately constant. In addition, as shown in FIG. 2 as the high voltage rectifier circuit 18,
Capacitors 33 to 35 and rectifier diode 36
When using a so-called triple voltage rectifier circuit composed of 38 to 38, if the DC average level voltage value from the base of the input pulse voltage _VHT is Vb, and the voltage value from the average level to the peak value is Va, then High voltage E _HT is expressed as E _HT = 2Va + Vb (14). In this case, the peak-to-peak value of the pulse voltage V _HT is always kept constant by the voltage regulator 32, but the ratio of the voltage values Va and Vb changes according to the horizontal deflection period, so the high voltage
E The condition that _HT is constant no longer holds true. Therefore, the high voltage rectifier circuit 18 always receives a pulse voltage.
V _HT peak-to-peak value, i.e. (Va + Vb)
The configuration must be such that an output proportional to the output can be obtained. Therefore, if the high voltage rectifier circuit 18 is configured as a _secondary voltage doubler _rectifier circuit as shown in _FIG . Regardless, the high voltage E _HT is always kept constant, and as a result, the focus electrode voltage Ef and the screen electrode voltage Eg ₂ obtained by dividing the high voltage E _HT are also kept constant. It goes without saying that the high-voltage rectifier circuit 18 may be constructed of other even-order voltage doubler rectifier circuits. Effects of the Invention As described above, according to the present invention, the DC voltage, which is approximately proportional to the peak-to-peak value of the flyback pulse generated in the horizontal deflection coil or the pulse obtained by transforming the same, matches the reference voltage. By controlling the voltage to be constant, the proportion of the effective screen display period in the horizontal deflection period can be kept approximately constant regardless of the horizontal deflection frequency handled by the display device, and can be used for anode acceleration voltage, etc. It is possible to keep the high voltage constant, and furthermore, it is possible to extremely stably obtain a DC voltage that matches the reference voltage regardless of the horizontal deflection frequency, so it has features such as stabilization and simplification of the circuit.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the horizontal deflection circuit according to the present invention, FIG. 2 is a circuit diagram showing an example of another high voltage rectifier circuit in the circuit system shown in FIG. 1, and FIG. 3 is a circuit diagram showing an example of the horizontal deflection circuit according to the present invention. Explanatory diagram of the operation of the horizontal deflection circuit, Part 4
The figure is a circuit system diagram showing an example of a conventional horizontal deflection circuit, FIG. 5 is a circuit system diagram showing an example of a horizontal deflection circuit proposed earlier by the present applicant, and FIG. 6 is a retrace pulse voltage waveform diagram. 7 and 8 are explanatory diagrams of the operation of a conventional horizontal deflection circuit, respectively. 2... Horizontal deflection output transistor, 3... Damper diode, 4... Horizontal deflection coil, 5...
DC blocking or S-shaped correction capacitor, 6... Capacitor for retrace resonance, 7... Flyback transformer, 8, 17, 32... Voltage regulator, 9,
18...High voltage rectifier circuit, 10... Picture tube, 11...
...resistance voltage divider, 11a, 11b...slider,
15... Reference voltage source, 16... Comparator, 2
7... Half-wave voltage doubler rectifier circuit.

Claims (1)

[Scope of Claims] 1. Voltage generating means for generating a DC voltage approximately proportional to the peak-to-peak value of a flyback pulse generated in a horizontal deflection coil or a pulse obtained by transforming the same; and from the voltage generating means. a comparator that compares the DC voltage with a preset reference voltage, and a flyback transformer to which the output signal of the comparator is supplied so that the value of the DC voltage matches the value of the reference voltage and is constant. It consists of a regulator that controls the power supply voltage supplied to the primary winding, and a high voltage output means that outputs a high voltage for the picture tube from the pulses taken out from the secondary winding of the flyback transformer. 1. A horizontal deflection circuit, characterized in that the proportion of an effective screen display period in the horizontal deflection period is kept substantially constant even if the horizontal deflection period changes. 2. The high-voltage output means comprises an even-order voltage doubler rectifier circuit that obtains a high voltage that is an integral multiple of the peak-to-peak value of the pulse extracted from the secondary winding of the flyback transformer. Horizontal deflection circuit according to range 1.