JPH0372720A - Analog/digital converter - Google Patents

Abstract

PURPOSE:To obtain a digital signal having a desired characteristic with a simple constitution by providing a memory where digital data having a previously determined characteristic is stored. CONSTITUTION:The analog signal from a line 1 is given to comparator circuits C1 to Cm and has the level discriminated, is encoded to an n-bit digital signal by an encoder circuit 4, latched in a latch circuit 5 and ia given to a memory (2<n>xn-bit RAM) through a line 6, a multiplexing circuit 7, and a line 10. N-bit digital data is stored in each storage area of the memory 11, and digital data stored in the storage area addressed by the digital signal of the line 10 is led out from a line 12. Thus, stored contents of the memory are changed to easily obtain digital data having desired input/output characteristics, and the constitution is simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a device for converting analog signals into digital signals.

Prior Art In a typical prior art, a plurality of m as shown in FIG.
The circuit is configured to generate a digital signal of bits.

Problems to be Solved by the Invention In such conventional analog/digital converters, analog signals can only be converted into digital signals using a linear conversion line. In order to convert the digital signal into a digital signal with predetermined characteristics, it is necessary to perform complex conversion processing operations such as substituting the obtained digital signal into a mathematical formula and performing arithmetic processing to obtain the desired digital signal. Requires circuit.

SUMMARY OF THE INVENTION An object of the present invention is to provide an analog/digital conversion device that has a simple configuration and is capable of obtaining a digital signal having desired characteristics corresponding to an analog signal.

SUMMARY OF THE INVENTION The present invention provides an analog-to-digital converter for converting an analog signal to a digital signal, and a storage area responsive to and addressed by the digital signal from the analog-to-digital converter. and a memory for deriving the digital data stored in the storage area addressed by the digital signal, the storage area storing digital data having predetermined characteristics. It is an analog/digital converter that performs

The operational analog signal is converted to a digital signal by an analog/digital converter, and the resulting digital signal is used to address the storage area of the memory. In each store area of this memory, data for obtaining predetermined characteristics corresponding to an input digital signal is stored in advance in each store area, and therefore, the store area is addressed by the digital signal. The digital data stored in the addressed storage area is thereby derived.

By rewriting the stored contents of memory in this way,
Digital data with desired characteristics can be easily obtained.

Example FIG. 1 is an electrical circuit diagram of one embodiment of the present invention.

From line 1, an analog video signal to be digitally converted, for example from a television receiver, is applied, and is applied to one input of comparison circuits 01 to Cm, respectively. The other inputs of these comparison circuits C1 to Cm are
A voltage VH is applied from a DC reference voltage source 2 via a line 3, and this voltage VH is divided by resistors RO-Rm and applied to the other inputs of the comparison circuits 01 to Cm.

If the resistance values of these resistors RO to Rrrt are expressed with the same reference symbol, 2 ・RO= R1= R2= =-= Rm-1=2
・Rm...(1> Comparison circuit C
1 derives a high level signal when the voltage of the analog signal applied to line 1 is equal to or higher than the voltage divided by the resistors RO to Rm, and when it is less than that, a low level signal is derived. The remaining comparison circuits 02 to .Cm also have similar configurations. The outputs of these comparison circuits c 1 □, , C, I are input to the encoder circuit 4. Here, the relationship between the number a of digital signals obtained by the comparison circuits C1 to Cm and m is m-2
′″-1...(2>).

The encoder circuit 4 encodes the outputs of the comparison circuits C1 to Cm, derives n-bit digital signals to the lines 11 to In, and supplies them to the latch circuit 5 to be latched. The output of latch circuit 5 is applied via line 6 to one input of multiplex circuit 7. The digital signal to be stored is input to the other input of the multiplex circuit 7 via a line 9 from the memory control circuit 8 .

Multiplex circuit 7 selectively derives the digital signal of either line 6 or line 9 onto line 10 and supplies the digital signal to memory 11 as an addressing signal. The memory 11 is a random access memory, and each storage area thereof stores n bits of digital data.
It has a total of 2" r1 bits, and the store contents of each store area are derived to line 12. A clock signal of a predetermined constant frequency is derived from a clock signal generation source 13 to line 14, and is sent to the latch circuit 5. It is also applied to memory control circuit 8. The operation of memory control circuit 8 is controlled by a signal from control signal generation source 15.

During operation of the memory control circuit 8, the memory control circuit 8 first sends a selection signal to line 1 as shown in FIG. 2(1).
6 to a multiplex circuit 7. While the selection signal 16 is at a low level, the multiplex circuit 7 connects the lines 9 and 10 and cuts off the line 6. The memory control circuit 8 applies a memory control signal shown in FIG. 2(2) to the line 17, and during the period when this memory control signal is at a low level, the memory 11 performs write and read operations. The clock signal from the clock signal source 13 is derived as a pulse at a constant frequency as shown in FIG. 2 (3), and the memory control circuit 8 performs a synchronous operation. In the memory control circuit 8, the selection signal is at a low level, and the multiplex circuit 7 is connected to the line 9. With IO connected in a conductive state, an addressing signal for the memory 11 is derived on line 9, as shown in FIG. 2 (4>).

The addressing signal derived from this memory control circuit 8 on line 9 is indicated by the reference AO-A<2''-1>. At the same time, the memory control circuit 8 is connected to the memory 11 via line 18. The digital data having the predetermined characteristics shown in Fig. 2 (5) is
D(2''-1>). Thus, in the memory 11, the digital output DO is stored in the store area having the address A1, and the digital output DO is stored in the store area having the address A1.
The digital output D1 is stored in the store area having 1, and each store area is addressed in the same manner and the corresponding data is stored. Thus memory 11
After writing of digital data to all store areas is completed, the memory control circuit 8 outputs a high level selection signal to the line 16. This causes the multiplex circuit 7 to conduct line 6,10 and disconnect line 9). In this state, the analog signal to be converted into a digital signal from line 1 is applied to comparator circuits C1 to Crn for level discrimination.
It is converted into a 1-bit digital signal, latched by the latch circuit 5, passed through the line 6, the multiplex circuit 7 and the line 10, and then applied to the memory 11.
The digital signal given to the memory 11 is as shown in Fig. 2 (
4> Reference ADO, AI) 1. AD2. ... are shown respectively. The digital data stored in the store area addressed by the digital signal on line 10 is indicated by the references EO, El, E2, etc., as shown in FIG. Digital data such as is derived from line 12. Derived digital data EO, El.

E2... is data D O□-,D (2"
−1>.

Thus, for example, to invert the negative/positive of an analog video signal, as shown in FIG. By setting , a reversed image can be realized in real time. Furthermore, as shown in FIG. 4, it is possible to obtain digital output data corresponding to the digital signal input from the line 10, and γ (gamma) correction, which is absent in so-called image color printer circuits, can be performed for each color. It can be carried out. The present invention can be implemented not only in connection with video signals, but also in connection with a wide range of other analog signals.

Effects of the Invention As described above, according to the present invention, a memory address is specified using a digital signal obtained by converting an analog signal by an analog/digital converter, and this memory stores digital data having preset characteristics. Since the digital data stored in the storage area addressed by the digital signal is derived, it is easy to create a digital data having the desired input/output characteristics by changing the stored contents of this memory. Data can be obtained and its configuration is simple.

[Brief explanation of drawings]

Figure 1 is an electrical circuit diagram of one embodiment of the present invention, and Figure 2 is the electrical circuit diagram of one embodiment of the present invention.
3 is a graph showing the stored contents of the memory 11, FIG. 4 is a graph showing other stored contents of the memory 11, and FIG. 5 is a waveform diagram for explaining the operation of the embodiment shown in the figure. 1 is a graph illustrating the characteristics of a prior art analog-to-digital conversion device;

Claims (1)

[Scope of Claims] An analog-to-digital converter for converting an analog signal to a digital signal; and a store area responsive to and addressed by the digital signal from the analog-to-digital converter; An analog/digital conversion characterized in that the area stores digital data having predetermined characteristics, and a memory for deriving the digital data stored in the storage area addressed by the digital signal. Device.