JPH0372593B2 - - Google Patents

Info

Publication number
JPH0372593B2
JPH0372593B2 JP58126431A JP12643183A JPH0372593B2 JP H0372593 B2 JPH0372593 B2 JP H0372593B2 JP 58126431 A JP58126431 A JP 58126431A JP 12643183 A JP12643183 A JP 12643183A JP H0372593 B2 JPH0372593 B2 JP H0372593B2
Authority
JP
Japan
Prior art keywords
mixed
alumina
weight
sintered
porcelain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58126431A
Other languages
Japanese (ja)
Other versions
JPS6021855A (en
Inventor
Kimihide Sugo
Katsu Seno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP12643183A priority Critical patent/JPS6021855A/en
Publication of JPS6021855A publication Critical patent/JPS6021855A/en
Publication of JPH0372593B2 publication Critical patent/JPH0372593B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Landscapes

  • Compositions Of Oxide Ceramics (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

この発明はフオルステライトを主成分として低
温焼結が可能な磁器の製造方法に関するものであ
る。 たとえばIC基板にはセラミクスが用いられて
きたが、小型化に伴つて多層基板による高密度化
や低廉化が要求されている。 従来、IC多層基板用のセラミクスとしてはア
ルミナ、結晶化ガラス−無機物系などが用いられ
ていた。このうちアルミナ多層基板は次のように
して製造されていた。つまり、アルミナ92〜97重
量%、CaO−MgO−SiO2系などのガラス残部か
らなる混合粉末に有機バインダ、溶剤などを加え
て泥漿とし、ドクターブレード法などによつてセ
ラミツクグリーンシートに成形し、このシート上
にタングステン、モリブデン、あるいはモリブデ
ン−マンガンなどのペーストで所望の回路導体が
パターンを形成し、次いでシートを積み重ねて熱
圧着し、これを加湿水素−窒素混合ガス、あるい
はアンモニア分解ガスの雰囲気中において1600〜
1700℃で焼成していた。 このようにアルミナ多層基板はアルミナを主成
分とするため高温焼成が必要であり、また内部の
回路導体パターンの材料として、融点の高いタン
グステン、モリブデンなどを用いている。このた
め、焼成コストが高くなること、アルミナの誘電
率が10程度あるため信号伝播遅延や雑音が発生す
ること、タングステン、モリブデンなどは導体抵
抗が高く、抵抗を下げるには導体幅を広くしなけ
ればならないが、これは高密度化と逆行し高速度
化を制限すること、などの問題を有している。 また、結晶化ガラス−無機物系の多層基板は、
結晶化ガラスとしてはたとえばホウケイ酸鉛系が
用いられ、無機物系としてはアルミナが用いら
れ、これら各原料を含むセラミツクグリーンシー
ト上にAu、Ag、Ag−Pd、Ptなどのペーストで
所望の回路導体パターンを形成し、これを積み重
ねて熱圧着し、これを大気中800〜900℃で焼成し
ていた。 この種の多層基板は大気中800〜900℃で焼成で
きるため、焼成コストを押えることができるが、
素原料の結晶化ガラスが全体の約50重量%を占
め、しかも材料そのもののコストが高いため高価
なものとなり、誘電損失が0.5%と大きい値を示
すという問題を有している。 したがつて、この発明は低温焼結が可能で、多
層化、低廉化が実現できる磁器の製造方法を提供
することを目的とする。 すなわち、この発明の要旨とするところは、フ
オルステライト(2MgO・SiO2)を主成分とし、
これにB4Cを酸化ホウ素(B2O3)に換算して1.5
〜7.0重量%添加、混合し、この混合粉末を仮焼
し、さらに得られた仮焼粉末の成形物を焼成する
ことを特徴とする低温焼結磁器の製造方法であ
る。 この発明にかかる低温焼結磁器の製造方法によ
れば1200℃以下での焼結が可能となり、内部の回
路導体パターンの材料としてたとえばAg−Pdが
使用でき、材料コスト、製造コストの低廉化実現
が可能になるとともに、もちろん多層化が行える
ことになる。 この発明において、フオルステライト
(2MgO・SiO2)にB4Cを酸化ホウ素(B2O3)に
換算して1.5〜7.0重量%添加含有させているが、
B4Cの添加範囲を限定したのは次のような理由に
よる。つまり、B4Cを酸化ホウ素(B2O3)に換
算して1.5重量%未満ではフオルステライトの焼
結温度である1300℃になり、回路パターンにAg
−Pdなどの低融点のものが使えなくなる。また、
B4Cを酸化ホウ素(B2O3)に換算して7.0重量%
を越えると、低温焼結は可能であるが、誘電損失
が0.10%以上と悪くなる。 以下、この発明を実施例にもとづいて詳細に説
明する。 素原料として、2MgO・SiO2・B4Cを準備し、
これを第1表に示す組成比率の磁器が得られるよ
うに調合し、ポツトミルで24時間湿式混合した。
脱水乾燥後、800℃、950℃の各温度で2時間仮焼
した。仮焼物を粉砕し、酢酸ビニルエマルジヨン
を約5重量%加えてポツトミルで24時間混合し
た。混合したのち造粒し、約1000Kg/cm2の圧力で
加圧成形し、異なる仮焼温度で処理された成形物
を第1表に示す焼成温度で2時間焼結した。 得られた焼結体は直径14mmφ、厚み1mmであ
り、両面に電極を形成してこれを試料とした。そ
して各試料につき、誘電率(ε)、誘電損失
(tanδ)および比抵抗(ρ)を測定し、その結果
を第1表に合わせて示した。ε、tanδは1MHzで
測定した。 なお、表中※印はこの発明範囲外であり、それ
以外は発明範囲内である。 また、第1表のB2O3の欄には、調合時に原料
として使用するB4C量を併記した。
The present invention relates to a method for producing porcelain containing forsterite as a main component and capable of being sintered at a low temperature. For example, ceramics have been used for IC substrates, but with miniaturization, there is a demand for higher density and lower cost through multilayer substrates. Conventionally, alumina, crystallized glass-inorganic materials, etc. have been used as ceramics for IC multilayer substrates. Among these, the alumina multilayer substrate was manufactured in the following manner. That is, a mixed powder consisting of 92 to 97% by weight of alumina and the remainder of glass such as CaO-MgO-SiO 2 is mixed with an organic binder, a solvent, etc. to form a slurry, which is then formed into a ceramic green sheet using a doctor blade method or the like. A desired circuit conductor pattern is formed on this sheet using a paste such as tungsten, molybdenum, or molybdenum-manganese, and then the sheets are stacked and thermocompressed, and this is placed in a humidified hydrogen-nitrogen mixed gas or ammonia decomposition gas atmosphere. 1600~ inside
It was fired at 1700℃. Since the alumina multilayer substrate has alumina as its main component, it requires high-temperature firing, and also uses materials such as tungsten and molybdenum, which have high melting points, as the material for the internal circuit conductor patterns. For this reason, the firing cost increases, alumina has a dielectric constant of about 10, which causes signal propagation delays and noise, and tungsten, molybdenum, etc. have high conductor resistance, and to lower the resistance, the conductor width must be widened. However, this has the problem of going against the grain density and limiting the speed. In addition, the crystallized glass-inorganic multilayer substrate is
For example, lead borosilicate is used as the crystallized glass, and alumina is used as the inorganic glass.A desired circuit conductor is formed on a ceramic green sheet containing these raw materials using pastes such as Au, Ag, Ag-Pd, and Pt. A pattern was formed, stacked and thermocompressed, and then fired in the atmosphere at 800-900°C. This type of multilayer substrate can be fired in the air at 800 to 900°C, which can reduce firing costs.
The raw material, crystallized glass, accounts for about 50% of the total weight, and the cost of the material itself is high, making it expensive, and the problem is that the dielectric loss is as large as 0.5%. Therefore, it is an object of the present invention to provide a method for manufacturing porcelain that can be sintered at low temperatures, multilayered, and inexpensive. That is, the gist of this invention is that forsterite (2MgO・SiO 2 ) is the main component,
Convert B 4 C to boron oxide (B 2 O 3 ) and add 1.5
This is a method for producing low-temperature sintered porcelain, characterized by adding and mixing ~7.0% by weight, calcining this mixed powder, and firing a molded product of the obtained calcined powder. According to the method for manufacturing low-temperature sintered porcelain according to the present invention, sintering can be performed at temperatures below 1200°C, and Ag-Pd, for example, can be used as the material for the internal circuit conductor pattern, resulting in lower material and manufacturing costs. This also makes it possible to have multiple layers. In this invention, forsterite (2MgO.SiO 2 ) contains B 4 C in an amount of 1.5 to 7.0% by weight in terms of boron oxide (B 2 O 3 ).
The reason for limiting the range of addition of B 4 C is as follows. In other words, if B 4 C is less than 1.5% by weight in terms of boron oxide (B 2 O 3 ), the sintering temperature of forstellite will reach 1300°C, and the circuit pattern will contain Ag.
-It becomes impossible to use materials with low melting points such as Pd. Also,
7.0% by weight when converting B 4 C to boron oxide (B 2 O 3 )
If the temperature exceeds 100%, low-temperature sintering is possible, but dielectric loss deteriorates to 0.10% or more. Hereinafter, this invention will be explained in detail based on examples. Prepare 2MgO・SiO 2・B 4 C as raw materials,
These were mixed so as to obtain porcelain having the composition ratio shown in Table 1, and wet mixed in a pot mill for 24 hours.
After dehydration and drying, it was calcined at 800°C and 950°C for 2 hours. The calcined product was pulverized, and about 5% by weight of vinyl acetate emulsion was added and mixed in a pot mill for 24 hours. After mixing, the mixture was granulated, pressure molded at a pressure of about 1000 kg/cm 2 , and the molded products treated at different calcination temperatures were sintered for 2 hours at the calcination temperatures shown in Table 1. The obtained sintered body had a diameter of 14 mmφ and a thickness of 1 mm, and electrodes were formed on both sides, and this was used as a sample. The dielectric constant (ε), dielectric loss (tan δ), and specific resistance (ρ) of each sample were measured, and the results are shown in Table 1. ε and tanδ were measured at 1MHz. Note that the * mark in the table is outside the scope of this invention, and the others are within the scope of the invention. In addition, in the B 2 O 3 column of Table 1, the amount of B 4 C used as a raw material during preparation is also listed.

【表】【table】

【表】 第1表から明らかなように、この発明にかかる
ものは1200℃以下の低温焼結が可能であり、εは
アルミナ系のものより小さく、tanδは0.09%以
下、ρも>1011のものが得られている。したがつ
て、回路導体パターンの材料としてAg−Pd系が
使用でき、上記した実施例から多層基板の製造が
可能であることが明らかである。 また上記した実施例において、添加物として
B4Cを使用したがこれは次のような理由による。
つまり、B4Cそのものは水分を吸収せず、水に対
して安定であるため、主成分のフオルステライト
と湿式混合しても添加物量のバラツキが発生せ
ず、調合どうりの磁器が得られるからである。こ
のB4Cは仮焼段階の600℃付近でB2O3に変化し、
最終生成物中にはB2O3として存在することにな
る。またBNも添加物として使用できる。 なお、添加物の原料としてB2O3を用いたとき、
B2O3がもともと水溶性であるため、水を使わな
い処理工程を設定させなければならず、たとえば
湿式混合したのち蒸発乾燥するなど特別な処理が
必要となることを付記しておく。
[Table] As is clear from Table 1, the product according to the present invention can be sintered at a low temperature of 1200℃ or less, ε is smaller than alumina-based products, tanδ is 0.09% or less, and ρ is also >10 11 are obtained. Therefore, it is clear that the Ag-Pd system can be used as a material for the circuit conductor pattern, and that a multilayer board can be manufactured from the above embodiments. In addition, in the above examples, as an additive
I used B 4 C for the following reasons.
In other words, B 4 C itself does not absorb water and is stable in water, so even if it is wet mixed with the main component forsterite, there will be no variation in the amount of additives, and the porcelain that matches the mixture can be obtained. It is from. This B 4 C changes to B 2 O 3 at around 600℃ in the calcination stage,
It will be present as B 2 O 3 in the final product. BN can also be used as an additive. In addition, when B 2 O 3 is used as a raw material for additives,
It should be noted that since B 2 O 3 is inherently water-soluble, a treatment process that does not use water must be set up, and special treatment is required, such as wet mixing followed by evaporation drying.

Claims (1)

【特許請求の範囲】[Claims] 1 フオルステライト(2MgO・SiO2)を主成分
とし、これにB4Cを酸化ホウ素(B2O3)に換算
して1.5〜7.0重量%添加、混合し、この混合粉末
を仮焼し、さらに得られた仮焼粉末の成形物を焼
成することを特徴とする低温焼結磁器の製造方
法。
1 The main component is forsterite (2MgO・SiO 2 ), and 1.5 to 7.0% by weight of B 4 C in terms of boron oxide (B 2 O 3 ) is added and mixed, and this mixed powder is calcined, A method for producing low-temperature sintered porcelain, which further comprises firing a molded product of the obtained calcined powder.
JP12643183A 1983-07-11 1983-07-11 Low temperature sintering ceramic composition Granted JPS6021855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12643183A JPS6021855A (en) 1983-07-11 1983-07-11 Low temperature sintering ceramic composition

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12643183A JPS6021855A (en) 1983-07-11 1983-07-11 Low temperature sintering ceramic composition

Publications (2)

Publication Number Publication Date
JPS6021855A JPS6021855A (en) 1985-02-04
JPH0372593B2 true JPH0372593B2 (en) 1991-11-19

Family

ID=14935019

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12643183A Granted JPS6021855A (en) 1983-07-11 1983-07-11 Low temperature sintering ceramic composition

Country Status (1)

Country Link
JP (1) JPS6021855A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0686327B2 (en) * 1985-04-16 1994-11-02 旭硝子株式会社 Ceramic substrate composition
CN114685152B (en) * 2020-12-28 2022-11-04 山东国瓷功能材料股份有限公司 Low-temperature co-fired ceramic material for millimeter wave antenna module and preparation method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57160953A (en) * 1981-03-25 1982-10-04 Nippon Electric Co High dielectric constant ceramic composition
JPS5860666A (en) * 1981-10-06 1983-04-11 旭硝子株式会社 Fine fused quartz sintered body

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57160953A (en) * 1981-03-25 1982-10-04 Nippon Electric Co High dielectric constant ceramic composition
JPS5860666A (en) * 1981-10-06 1983-04-11 旭硝子株式会社 Fine fused quartz sintered body

Also Published As

Publication number Publication date
JPS6021855A (en) 1985-02-04

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