JPH0371672U - - Google Patents
Info
- Publication number
- JPH0371672U JPH0371672U JP13325789U JP13325789U JPH0371672U JP H0371672 U JPH0371672 U JP H0371672U JP 13325789 U JP13325789 U JP 13325789U JP 13325789 U JP13325789 U JP 13325789U JP H0371672 U JPH0371672 U JP H0371672U
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- circuit board
- wiring board
- conductor portion
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims 2
- 230000001681 protective effect Effects 0.000 claims 1
- 239000004973 liquid crystal related substance Substances 0.000 description 3
Description
第１図ａないし第１図ｃは本考案の一実施例を
示すものである。第１図ａはＴＡＢを備えた液晶
表示装置を示す平面図である。第１図ｂは同図ａ
におけるＡ−Ａ矢視断面図である。第１図ｃは同
図ａにおけるＢ−Ｂ矢視断面図である。第２図ａ
ないし第２図ｃは従来例を示すものである。第２
図ａはＴＡＢを備えた液晶表示装置を示す平面図
である。第２図ｂは同図ａにおけるＥ−Ｅ矢視断
面図である。第２図ｃは同図ａにおけるＦ−Ｆ矢
視断面図である。
１……液晶パネル、２……ＴＡＢ、２ａ……ベ
ースフイルム、３……ベアチツプ、４……ＰＷＢ
（配線基板）、７……絶縁フイルム（絶縁層）で
ある。
Figures 1a to 1c show an embodiment of the present invention. FIG. 1a is a plan view showing a liquid crystal display device equipped with a TAB. Figure 1 b is the same figure a
It is a sectional view taken along the line A-A in FIG. FIG. 1c is a sectional view taken along the line B-B in FIG. 1a. Figure 2a
2c to 2c show conventional examples. Second
Figure a is a plan view showing a liquid crystal display device equipped with a TAB. FIG. 2b is a sectional view taken along the line E--E in FIG. 2a. FIG. 2c is a sectional view taken along line FF in FIG. 2a. 1...Liquid crystal panel, 2...TAB, 2a...Base film, 3...Bear chip, 4...PWB
(wiring board), 7... Insulating film (insulating layer).
Claims (1)
する印刷回路基板が配線基板上に設けられ、上記
の印刷回路基板が配線基板と本体装置とに接続さ
れている印刷回路基板の保護構造において、 上記の配線基板における導体露出部には、この
導体露出部を覆う絶縁層が設けられていることを
特徴とする印刷回路基板の保護構造。[Claims for Utility Model Registration] A printed circuit board in which a printed circuit board having an integrated circuit bare chip on a film base is provided on a wiring board, and the printed circuit board is connected to the wiring board and the main device. A protective structure for a printed circuit board, characterized in that the exposed conductor portion of the wiring board is provided with an insulating layer that covers the exposed conductor portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13325789U JPH0371672U (en) | 1989-11-15 | 1989-11-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13325789U JPH0371672U (en) | 1989-11-15 | 1989-11-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0371672U true JPH0371672U (en) | 1991-07-19 |
Family
ID=31680666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13325789U Pending JPH0371672U (en) | 1989-11-15 | 1989-11-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0371672U (en) |
-
1989
- 1989-11-15 JP JP13325789U patent/JPH0371672U/ja active Pending