JPH0365249U - - Google Patents

Info

Publication number
JPH0365249U
JPH0365249U JP12726889U JP12726889U JPH0365249U JP H0365249 U JPH0365249 U JP H0365249U JP 12726889 U JP12726889 U JP 12726889U JP 12726889 U JP12726889 U JP 12726889U JP H0365249 U JPH0365249 U JP H0365249U
Authority
JP
Japan
Prior art keywords
protective sheet
top surface
sheet
chip
semiconductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12726889U
Other languages
Japanese (ja)
Other versions
JPH0635473Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989127268U priority Critical patent/JPH0635473Y2/en
Publication of JPH0365249U publication Critical patent/JPH0365249U/ja
Application granted granted Critical
Publication of JPH0635473Y2 publication Critical patent/JPH0635473Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H01L2221/68322—Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案の一実施例を示す構成説明図
、第２図ａ，ｂおよびｃはそれぞれ上記実施例を
用いてチツプの保護手順を説明するための工程説
明図、第３図は上記実施例における動作を説明す
るための構成説明図、第４図は従来例のダイシン
グ時の状態を示す構成説明図である。 １１……保護シート用粘着層、１２……チツプ
上面保護シート、１２ａ……熱収縮率の大きな保
護シート層、１２ｂ……熱収縮率の小さな保護シ
ート層、１４……保護シート層用接着剤、１６…
…半導体ウエハ、１７……チツプ。 FIG. 1 is a configuration explanatory diagram showing one embodiment of this invention, FIGS. 2 a, b, and c are process explanatory diagrams for explaining the chip protection procedure using the above embodiment, and FIG. FIG. 4 is a configuration explanatory diagram for explaining the operation in the embodiment, and FIG. 4 is a configuration explanatory diagram showing the state at the time of dicing in the conventional example. 11... Adhesive layer for protective sheet, 12... Chip top surface protection sheet, 12a... Protective sheet layer with high heat shrinkage rate, 12b... Protective sheet layer with low heat shrinkage rate, 14... Adhesive for protective sheet layer , 16...
...Semiconductor wafer, 17...chip.

Claims (1)

【実用新案登録請求の範囲】 半導体ウエハや微小光学部品をダイシングして
得られる複数のチツプをダイシング時に発生する
ダストによる汚れや外部応力による変形から保護
するために、チツプ上面に保護シート用粘着層を
介して貼り付けられるチツプ上面保護シートから
なる半導体用保護シートであつて、 そのチツプ上面保護シートが、熱収縮率の異な
る少なくとも２つの保護シート層を有し、それに
よつて熱付与により上記保護シート用粘着層の粘
着力に打ち勝つてチツプ上面の接着面積を減少す
る方向に変形しうる保護シート層積層構造からな
る半導体用保護シート。[Claim for Utility Model Registration] In order to protect multiple chips obtained by dicing semiconductor wafers and micro-optical components from dirt caused by dust generated during dicing and deformation due to external stress, an adhesive layer for a protective sheet is provided on the top surface of the chips. A protective sheet for semiconductors comprising a protective sheet for the top surface of a chip that is attached through a protective sheet, the top surface protective sheet for a semiconductor having at least two protective sheet layers having different heat shrinkage rates, whereby the protection sheet can be applied with heat to A protective sheet for semiconductors comprising a laminated structure of protective sheet layers that can be deformed in a direction to reduce the adhesive area on the upper surface of a chip by overcoming the adhesive force of the adhesive layer for the sheet.
JP1989127268U 1989-10-30 1989-10-30 Protective sheet for semiconductor Expired - Lifetime JPH0635473Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989127268U JPH0635473Y2 (en) 1989-10-30 1989-10-30 Protective sheet for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989127268U JPH0635473Y2 (en) 1989-10-30 1989-10-30 Protective sheet for semiconductor

Publications (2)

Publication Number Publication Date
JPH0365249U true JPH0365249U (en) 1991-06-25
JPH0635473Y2 JPH0635473Y2 (en) 1994-09-14

Family

ID=31675032

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989127268U Expired - Lifetime JPH0635473Y2 (en) 1989-10-30 1989-10-30 Protective sheet for semiconductor

Country Status (1)

Country Link
JP (1) JPH0635473Y2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010061782A1 (en) * 2008-11-25 2010-06-03 日東電工株式会社 Surface protection tape for dicing and method for peeling and removing surface protection tape for dicing
JP2010194819A (en) * 2009-02-24 2010-09-09 Nitto Denko Corp Spontaneously winding laminate sheet and spontaneously winding adhesive sheet
JP2011054641A (en) * 2009-08-31 2011-03-17 Nitto Denko Corp Method for separating and removing dicing surface protection tape from object to be cut

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604579A (en) * 1983-06-22 1985-01-11 Nitto Electric Ind Co Ltd Pressure-sensitive adhesive tape or sheet for masking
JPS6461208A (en) * 1987-09-01 1989-03-08 Fsk Kk Cutting method of wafer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604579A (en) * 1983-06-22 1985-01-11 Nitto Electric Ind Co Ltd Pressure-sensitive adhesive tape or sheet for masking
JPS6461208A (en) * 1987-09-01 1989-03-08 Fsk Kk Cutting method of wafer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010061782A1 (en) * 2008-11-25 2010-06-03 日東電工株式会社 Surface protection tape for dicing and method for peeling and removing surface protection tape for dicing
JP2010129607A (en) * 2008-11-25 2010-06-10 Nitto Denko Corp Surface protecting tape for dicing and peel-off and removal method of the surface protecting tape for dicing
JP2010194819A (en) * 2009-02-24 2010-09-09 Nitto Denko Corp Spontaneously winding laminate sheet and spontaneously winding adhesive sheet
JP2011054641A (en) * 2009-08-31 2011-03-17 Nitto Denko Corp Method for separating and removing dicing surface protection tape from object to be cut

Also Published As

Publication number Publication date
JPH0635473Y2 (en) 1994-09-14

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