JPH0364108A - Operational amplifier circuit - Google Patents

Abstract

PURPOSE:To attain high speed operation and to reduce power consumption by forming the circuit as multi-stage constitution of cascode circuits and applying push-pull operation. CONSTITUTION:A differential output of a differential pair has two signal paths, the one is inputted to a cascode circuit comprising transistors(TRs) Q10, Q14 and its output is converted into a single output by TRs Q11, Q15 to drive a gate of a TR Q23. The other signal path is used to drive a gate of the TR Q23. The other signal path connects to a cascode circuit comprising TRs Q18, Q21 via a common source TR circuit comprising TRs Q12, Q16 and its output is converted into a single output by TRs Q19, Q20 to drive the gate comprising a TR Q24. Thus, the TRs Q23, Q24 act like so-called push-pull operation, resulting that high speed operation is attained for both positive and negative cycles.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an operational amplifier circuit suitable for integrated circuits.

[Conventional technology]

Generally, various operational amplifier circuits have been proposed, and among them, the circuit shown in FIG. 2 is known as a folded cascode operational amplifier circuit. This circuit consists of a differential pair of transistors Q6-Q8 and transistors Q, ~Q
15 cascode stages and transistors Q23. Q24
It consists of an output stage.

Further, a bias circuit is constituted by the current source (1) and the transistors Q, -Qs. This circuit is known to have a wide input voltage range and good frequency characteristics.

[Problem to be solved by the invention]

In the conventional folded cascode operational amplifier circuit described above, the output stage is a class A amplifier circuit, so the maximum value of the sink current to the load (in the case of the polarity of the circuit in Figure 2) is equal to the bias current value of the transistor QIO. It is. Therefore, in order to increase the operating speed of the operational amplifier, it is necessary to set the bias current value of the transistor C23 to a large value, which inevitably leads to an increase in power consumption, and when the allowable power consumption is small, The drawback was that the operating speed was severely limited.

An object of the present invention is to eliminate such drawbacks and provide an operational amplifier that operates at high speed and consumes less power.

[Means to solve the problem]

The configuration of the operational amplifier circuit of the present invention is such that the gates of two transistors are connected to the first . a first differential pair each connected to a second input terminal, and each of the first and second drain outputs of the first differential pair connected to an input terminal of the first differential pair;
The first differential pair has opposite polarity to the differential pair. a second cascode circuit, and a first cascode circuit whose gate terminal is connected to the inputs of the first and second cascode circuits. a second common source transistor; A drain terminal of the second transistor is connected to the input of the first transistor. A third cascode circuit of opposite polarity to each second cascode circuit. a fourth cascode circuit; and the first cascode circuit. The output of the second cascode circuit is.

the input first single-ended conversion circuit;
．． a second single-ended conversion circuit to which the output of the fourth cascode circuit is respectively input; and a third single-ended conversion circuit to which each output of the second single-ended conversion circuit is input and whose output end is connected to the output terminal.

〔Example〕

Next, the present invention will be explained in detail using the drawings.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. This circuit uses transistors Q6 to Q to form a differential pair,
Transistors Q + o, Q l 4, Q 1
The gate potential of azQ 21 is fixed biased, and each constitutes a cascode circuit. Also, transistor Q
, ,Q, , and Q 1e z Q 20 and ,Q 23
1Q24 is a single-end conversion circuit, and the output of the single-end conversion circuit of transistor C231C24 is led out to the output terminal 3 of this operational amplifier circuit.

In this configuration, the operation when input signals are input from input terminals 1 and 2 will be considered. The differential output of the differential pair has two signal paths, one of which is connected to transistors Q1 and Ql.
The signal is input to the cascode circuit No. 4, and its output is converted into a single output by transistors Q, , , Q, , and drives the gate of transistor C23. The other signal path is input to the cascode circuit of transistor Qllll C21 via the common source transistor of transistor C12゜Ql, and its output is input to the cascode circuit of transistor Q+s+Qz.
. It is converted into a single output at , and drives the gate of transistor C24. Therefore, transistors C23 and C24
performs a so-called push-pull operation, and can operate at high speed in both positive and negative cycles with respect to the load.

〔Effect of the invention〕

As explained above, the present invention has the advantage of being able to achieve push-pull operation and high-speed operation, and also being stable against oscillation phenomena due to the multi-stage configuration of cascode circuits.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional operational amplifier circuit. 1.2...Input terminal, 3...Output terminal, 4...Power supply terminal% Ql~Q24...
・Transistor, C1...Capacity, Ill I
2... Constant current source.

Claims (1)

[Claims] A first differential pair in which the gates of two transistors are respectively connected to first and second input terminals, and each of the first and second drain outputs of this first differential pair is connected to an input terminal. a first differential pair connected to each other and having opposite polarity to the first differential pair;
A second cascode circuit, first and second common source transistors whose gate terminals are connected to the inputs of the first and second cascode circuits, and drain terminals of the first and second transistors that are inputted. connected to said first and second
a first single-ended conversion circuit into which the outputs of the first and second cascode circuits are input, and the third and fourth cascode circuits. a second single-ended conversion circuit into which the outputs of the circuits are inputted, and a third single-ended conversion circuit into which the outputs of the first and second single-ended conversion circuits are inputted and whose output ends are connected to the output terminals. An operational amplifier circuit comprising a conversion circuit.