JPH0363892A - Single chip type microcomputer - Google Patents

Abstract

PURPOSE:To store a program in the process of manufacturing by incorporating a mask ROM(read-only memory) and a nonvolatile memory, and storing a jump instruction to an address in the nonvolatile memory in the mask ROM. CONSTITUTION:The single chip type microcomputer is comprised of a cpu(central processing unit) 10, the mask ROM 11, a loadable nonvolatile memory 13, a RAM (random access memory) 13 for user, an external interface 14, a peripheral circuit 15 consisting of a timer and an A/D(analog/digital) converter, etc., and a control circuit 16 which performs control among every block. And the loadable nonvolatile memory 12 is arranged in the same memory space as the mask ROM 11, and the jump instruction to the address in the nonvolatile memory 12 is stored in at least one address in the mask ROM 11. In such a way, the program can be stored in the process of manufacturing.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a single-chip microcomputer.

[Prior Art] In a conventional single-chip microcomputer that has a built-in mask ROM (read-only memory), a so-called one-chip microcomputer, the user program is stored in the mask ROM 4 during the manufacturing stage of the microcomputer. It was impossible for the user to later change the user program written in this mask ROM. To change the program, process masks such as diffusion masks, contact masks, Vth(L
It is necessary to change the threshold voltage (threshold voltage) adjustment mask, etc., but it becomes impossible to change the program for those that have gone through the process using these masks, and in the worst case, there is no other option than to discard the microcomputer. . In order to deal with such problems, in recent years, one-chip microcomputers with built-in nonvolatile memory instead of mask ROM have been developed and commercialized, making it possible for users to rewrite programs.

[Problem to be solved by the invention] However, in the case of such a one-chip microcomputer, regardless of whether or not the program has been changed, it is necessary to write the program into memory at the product factory shipping stage or at the user's side. This caused cost and time problems.

An object of the present invention is to provide a single-chip microcomputer in which a program can be stored during the manufacturing process, and at the same time, part of the contents of this program can be changed after manufacturing. be.

[Means for Solving the Problems] The object of the present invention is to provide a single-chip microcomputer with a built-in mask ROM, in which a writable nonvolatile memory is arranged in the same memory space as the mask ROM. This is achieved by a single-chip microcomputer characterized in that a jump instruction to an address in the nonvolatile memory is stored in at least one address in the mask ROM.

[Example] Next, examples of the present invention will be described.

FIG. 2 is a block diagram showing the configuration of an embodiment of a single-chip microcomputer according to the present invention.
is CPU (central processing unit), 11 is mask ROM
, 12 is a writable nonvolatile memory, 13 is a user RA) (random access memory), 14 is an external interface, 15 is a peripheral circuit such as a timer A/D (analog/digital) converter, and 16 is each This is a control circuit that performs control between blocks.

FIG. 1 is a conceptual diagram of the memory space of the mask ROM 11 and the nonvolatile memory 12. Although the size of the memory space is not directly related to the present invention, ooo
Assume that it has a size of n~FFF11. In this memory space, from address OOOH to XaO
XbOXcOH address is 7X
L, XaIXbIXcl ~ Xa2Xb2Xc2H address! ;L non-volatile [1, nome TI=IJ 12G:l: Assigned.

In this embodiment, EEPROH is used as the memory 12, but fuse ROM, flash EEPROH,
Any writable non-volatile memory such as EPROH or bubble memory can be similarly used.

This mask ROM 11 stores user programs (A), (B) and (C) as shown in FIG. Address YIY2Y3H of mask ROMI 1 and 21
At address 2213H, there are 12 XalX
Jump instructions to addresses blXc1H and XaIXb1Xcl+IH are stored.

Also ;: address XaIXb1XclH and XalX
A return instruction is stored at address blXcl+IH. The memory 12 is in an erased state except for these two addresses.

Next, the program execution procedure will be explained.

(a) When there is no need to change the program In this case, the microcomputer executes the program (A) from address 0OOH of the mask ROM 11. When program (A) is finished running, it advances to address YIY2Y311, where a jump instruction is stored, and it jumps to address XaIXb1XcIH in memory 12 along the route ■ in Figure 3.0 Normally, a jump instruction is 2 bytes. Although this is an instruction, here it is assumed that it is a 1-byte instruction to simplify the explanation. Since the return instruction is stored at address XaIXbIXcIH, the program returns to address YIY2ma3+IH of the mask ROM along the route (2) and executes the program (B). After executing the program (B), follow the same route as above and go to the address 111213N of the empty memory 12 xa.
1xb1xC1+1H address Nishanfushi, then regular route■
The program returns to address 21Z2Z3+IH in the mask ROM and executes program (C).

As explained above, if there is no need to change the program, the microcomputer sequentially executes programs (A), (B), and (C) stored in the mask ROM.

(b) Case where it is necessary to change the program - As an example, a case where it is necessary to change the program (B) to the program (B') will be explained. In this case, EEPROH
XaIXb in memory 12 using an external device such as a writer
The contents of address IXc111 are transferred to the old 014b0 of the memory 12.
Rewrite the jump instruction to address 14cOH and write program (B') from this WaOWbOWcOH address.
Furthermore, the final address of this program is 1aIWbIWc.
The lH address is 217, which is the start address of the program (C).
Write a jump instruction to address 223+IH. In this way, the microcomputer will move to the fourth
YIY2Y3H of mask ROM11 along the route ■ in the figure.
The program jumps from the address to address XaIXbIXclH in the memory 12, but since the contents of this address have been rewritten from a return instruction to a jump instruction, it jumps to address lllaO%4bOI4cOH along the route ■ in Figure 4, and the program (Bo) Execute. The program (Bo) has been executed and a jump instruction has been written.
When the program advances to address c111, it jumps to address 21Z2Z3+IH, which is the start address of program (C), along route 2 in FIG. 4, and program (C) is executed. As explained above, the microcomputer can execute programs (A), (B'), (C) without executing program (B).
) are executed sequentially.

Changing from a return instruction to a jump instruction only requires changing the operation code, and the non-volatile memory 12 is
When H, for example, jump command (1100000
0) and the return command as (11110000), there is no need to erase data using ultraviolet light, and the command can be changed electrically using an external writing device. .

[Effects of the Invention] As explained above, the single-chip microcomputer of the present invention has a built-in mask ROM and a nonvolatile memory, and at least one address in the mask ROM has an address in the nonvolatile memory. Since the jump instruction to the address is stored, the program can be stored during the manufacturing process of the microcomputer, and there is no need to write the program using an external device after manufacturing, resulting in low manufacturing costs. This has the advantage that the manufacturing period can be shortened, and at the same time, even if it becomes necessary to change part of the program after manufacturing, it is possible to deal with this by writing the program to non-volatile memory. have

[Brief explanation of drawings]

FIG. 1 is a conceptual diagram of the memory space of a single-chip microcomputer according to the present invention, and FIG. 2 is a block diagram showing the configuration of the single-chip microcomputer according to the present invention, ff
Figure 13 shows mask R when there is no need to change the program.
FIG. 4 is an explanatory diagram of the contents of the mask ROM and nonvolatile memory when it is necessary to change the program. 10...CPU, 11...Mask ROM, 12
...Nonvolatile memory, 13...RAM, 14.
...External interface, 15...Peripheral circuit, 16
...Control circuit.

Claims (1)

[Claims] A single-chip microcomputer with a built-in mask ROM, a writable non-volatile memory is arranged in the same memory space as the mask ROM, and at least one address in the mask ROM contains the non-volatile memory. A single-chip microcomputer characterized by storing a jump instruction to an address in a physical memory.