JPH0363868U - - Google Patents
Info
- Publication number
- JPH0363868U JPH0363868U JP12401589U JP12401589U JPH0363868U JP H0363868 U JPH0363868 U JP H0363868U JP 12401589 U JP12401589 U JP 12401589U JP 12401589 U JP12401589 U JP 12401589U JP H0363868 U JPH0363868 U JP H0363868U
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- trigger
- outputting
- clock
- synchronized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003111 delayed effect Effects 0.000 claims description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 2
- 230000001360 synchronised effect Effects 0.000 claims 3
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Description
第1図は本考案のブロツク図、第2図はそのタ
イムチヤートである。
1……増幅器、2a……トリガ発生回路、2b
……ゲート信号発生回路、3……鋸歯状波発生回
路、4……コンパレータ、5……DA変換器、6
……遅延量制御用デイジタル値出力回路、7……
NAND回路、8……デイレーライン、12……
周波数カウンタ、14……マイクロプロセツサ、
19……遅延量制御回路、A……入力信号、B…
…トリガレベル、Ca……トリガパルス、Cb…
…ゲート信号、D……鋸歯状波電圧、E……DA
変換出力電圧、F……遅延トリガ信号、G……N
AND回路7出力(クロツクパルス)、J……マ
イクロプロセツサ14のデータバス。
FIG. 1 is a block diagram of the present invention, and FIG. 2 is a time chart thereof. 1...Amplifier, 2a...Trigger generation circuit, 2b
... Gate signal generation circuit, 3 ... Sawtooth wave generation circuit, 4 ... Comparator, 5 ... DA converter, 6
...Digital value output circuit for delay amount control, 7...
NAND circuit, 8...delay line, 12...
Frequency counter, 14... microprocessor,
19... Delay amount control circuit, A... Input signal, B...
...Trigger level, Ca...Trigger pulse, Cb...
...gate signal, D...sawtooth voltage, E...DA
Conversion output voltage, F...delayed trigger signal, G...N
AND circuit 7 output (clock pulse), J...Data bus of microprocessor 14.
Claims (1)
リガパルス発生手段と、該トリガパルスに同期し
、少くとも後記クロツクパルス1周期以上のパル
ス幅の遅延トリガ信号を出力する手段と、該遅延
トリガ信号を該信号毎に自動的に設定時間ずつ遅
延量を増加させる手段と、その遅延したゲート信
号により同期した一定周期のクロツクパルスを発
振出力することを特徴とするクロツク信号発生回
路。 Trigger pulse generating means for outputting a trigger pulse synchronized with an input signal; means for outputting a delayed trigger signal synchronized with the trigger pulse and having a pulse width of at least one cycle of the clock pulse described later; 1. A clock signal generation circuit comprising: means for automatically increasing a delay amount by a set time for each clock pulse; and a means for oscillating and outputting clock pulses of a fixed period synchronized with the delayed gate signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12401589U JPH0363868U (en) | 1989-10-25 | 1989-10-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12401589U JPH0363868U (en) | 1989-10-25 | 1989-10-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0363868U true JPH0363868U (en) | 1991-06-21 |
Family
ID=31671961
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12401589U Pending JPH0363868U (en) | 1989-10-25 | 1989-10-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0363868U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55130232A (en) * | 1979-03-30 | 1980-10-08 | Yokogawa Hokushin Electric Corp | Ad conversion system for repetitive waveform |
JPS60248016A (en) * | 1984-02-02 | 1985-12-07 | シ−メンス、アクチエンゲゼルシヤフト | Delay output signal generating method and delay unit |
-
1989
- 1989-10-25 JP JP12401589U patent/JPH0363868U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55130232A (en) * | 1979-03-30 | 1980-10-08 | Yokogawa Hokushin Electric Corp | Ad conversion system for repetitive waveform |
JPS60248016A (en) * | 1984-02-02 | 1985-12-07 | シ−メンス、アクチエンゲゼルシヤフト | Delay output signal generating method and delay unit |
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