JPH0363778B2 - - Google Patents
Info
- Publication number
- JPH0363778B2 JPH0363778B2 JP6635584A JP6635584A JPH0363778B2 JP H0363778 B2 JPH0363778 B2 JP H0363778B2 JP 6635584 A JP6635584 A JP 6635584A JP 6635584 A JP6635584 A JP 6635584A JP H0363778 B2 JPH0363778 B2 JP H0363778B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- insulating material
- card
- insulating
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Credit Cards Or The Like (AREA)
- Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59066355A JPS60209888A (ja) | 1984-04-02 | 1984-04-02 | Ｉｃカ−ドの製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59066355A JPS60209888A (ja) | 1984-04-02 | 1984-04-02 | Ｉｃカ−ドの製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60209888A JPS60209888A (ja) | 1985-10-22 |
| JPH0363778B2 true JPH0363778B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1991-10-02 |
Family
ID=13313458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59066355A Granted JPS60209888A (ja) | 1984-04-02 | 1984-04-02 | Ｉｃカ−ドの製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60209888A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2842378B2 (ja) * | 1996-05-31 | 1999-01-06 | 日本電気株式会社 | 電子回路基板の高密度実装構造 |
-
1984
- 1984-04-02 JP JP59066355A patent/JPS60209888A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60209888A (ja) | 1985-10-22 |