JPH0363158B2 - - Google Patents

Info

Publication number
JPH0363158B2
JPH0363158B2 JP63028272A JP2827288A JPH0363158B2 JP H0363158 B2 JPH0363158 B2 JP H0363158B2 JP 63028272 A JP63028272 A JP 63028272A JP 2827288 A JP2827288 A JP 2827288A JP H0363158 B2 JPH0363158 B2 JP H0363158B2
Authority
JP
Japan
Prior art keywords
current
closed loop
superconducting closed
logic
circuit current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63028272A
Other languages
English (en)
Japanese (ja)
Other versions
JPH01204296A (ja
Inventor
Itaru Kurosawa
Hiroshi Nakagawa
Susumu Takada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP63028272A priority Critical patent/JPH01204296A/ja
Publication of JPH01204296A publication Critical patent/JPH01204296A/ja
Publication of JPH0363158B2 publication Critical patent/JPH0363158B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
JP63028272A 1988-02-09 1988-02-09 ジョゼフソン・メモリ・セルの駆動方法 Granted JPH01204296A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63028272A JPH01204296A (ja) 1988-02-09 1988-02-09 ジョゼフソン・メモリ・セルの駆動方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63028272A JPH01204296A (ja) 1988-02-09 1988-02-09 ジョゼフソン・メモリ・セルの駆動方法

Publications (2)

Publication Number Publication Date
JPH01204296A JPH01204296A (ja) 1989-08-16
JPH0363158B2 true JPH0363158B2 (OSRAM) 1991-09-30

Family

ID=12243950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63028272A Granted JPH01204296A (ja) 1988-02-09 1988-02-09 ジョゼフソン・メモリ・セルの駆動方法

Country Status (1)

Country Link
JP (1) JPH01204296A (OSRAM)

Also Published As

Publication number Publication date
JPH01204296A (ja) 1989-08-16

Similar Documents

Publication Publication Date Title
AU2014400659B2 (en) Superconductive gate system
AU2019314168B2 (en) RQL D flip-flops
JP2962251B2 (ja) 超伝導メモリ装置
KR100592458B1 (ko) 자기 랜덤 액세스 메모리와 그 판독 방법
KR102215264B1 (ko) 초전도 셀 어레이 논리 회로 시스템
EP3659179A1 (en) Superconducting bi-directional current driver
KR100615741B1 (ko) Ｍｒａｍ 메모리 장치 및 ｍｒａｍ 메모리의 자기 저항성 메모리 셀에 기록하는 방법
JP7185706B2 (ja) 三安定ストレージループ
US3626391A (en) Josephson tunneling memory array including drive decoders therefor
KR20200090859A (ko) 아날로그 바이패스 부분을 가진 메모리 회로
EP1649468B1 (en) Compensating a long read time of a memory device in data comparison and write operations
JPH0226886B2 (OSRAM)
JPH0427637B2 (OSRAM)
JPH0363158B2 (OSRAM)
CN107039073B (zh) 非依电性存储器装置及其操作方法
WO2019054495A1 (ja) メモリ回路デバイス及びその使用方法
GB2392327A (en) MRAM with word line repeaters
US12231123B2 (en) Metastability-free clockless single flux quantum logic circuitry
JPH0334156B2 (OSRAM)
TW201944412A (zh) 非揮發性記憶電路
JPH01192087A (ja) ジョゼフソン・メモリ・セル
WO1980002888A1 (en) Magnetic bubble domain organization using double period input/output devices
JP2723172B2 (ja) 超伝導連想メモリセル及びこれを用いた超伝導連想メモリ
WO2022141226A1 (zh) 多阻态自旋电子器件、读写电路及存内布尔逻辑运算器
JPS6353637B2 (OSRAM)

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term