JPH0362783A - Picture processing unit - Google Patents

Abstract

PURPOSE:To simplify the configuration of the hardware and to quicken the production of a dither picture by adding a simulating noise generated from a simulating noise generator to a picture data and binarizing the resulting data at a threshold level. CONSTITUTION:When a data pattern of both input and output data is 8-bit, an input picture data 204 inputted to a shifter 202 is shifted left by 6-bit to use a low-order 2-bit of the data 204 for a simulating noise bits and 0 is substituted for an idle bit. Since high-order 2 bits are 00, 01, 10 or 11, it is equivalent to production of a random number and the output 206 of the shifter 202 acts like a simulating noise. The simulating noise 206 and the input picture data 204 are given to a 2-input adder 201 and the resulting value 207 is inputted to a binarizing circuit 203. When an output of the 2-input adder is larger than the threshold level of the binarizing circuit 203, a white level is outputted and when small, a black level is outputted, then the output 205 of the binarizing circuit 203 becomes a dither picture.

Description

[Detailed description of the invention] Fields of use in industry The present invention relates to an image processing device.

2. Description of the Related Art Conventionally, to obtain a dithered image, a single image processing device with a circuit diagram as shown in FIG. 3 is used. In Figure 3, 301 is the input image 4@, 302 is the 4×4 dither matrix, 303 is the dither image (the turtle 304 is the input pixel 30
5 is a dither matrix, and 306 is an output pixel.

In the figure, the image level is set to 5 with 16 gradations.

In Fig. 3 Ca), the input image 301 is binarized by comparing the place of the element corresponding to the input image 301 in the 4×4 dither matrix 302 as a threshold value. A redither image can be generated by outputting white when the level is larger than the threshold value and black when it is smaller than the threshold value.For example, 131ffi (b
) -・l- Input pixel 304I-S-t +rS-ZUro 4x40 dither matrix element 3 with level 8
Since the size of 05 is 0, the threshold value is O, and the output pixel 306 becomes white. Dithered images are obtained in the same manner.

Problems to be Solved by the Invention (2) However, conventional image processing devices that generate dithered images (2) require identifying the pixel position and setting the iE L threshold accordingly, resulting in a large circuit scale. In view of the two problems, the present invention has a simple circuit configuration, excellent high speed, and has the problem of lacking high i + 8 cases.
The purpose of this invention is to provide an image processing device that generates dithered images.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides an image processing device having a two-input adder, a pseudo-noise generator, and an arithmetic unit that performs binarization using an arbitrary threshold value. Image data is used as one input of the two-input adder, and pseudo-noise generated by the pseudo-noise generator is used as the other input of the two-input adder, and the adder adds the image data, and then binarizes at a certain threshold value. This is an image processing device that generates a dithered image by doing this.

According to the above-described configuration, the present invention adds the pseudo noise generated by the pseudo noise generator to the image data, and then binarizes it with a certain threshold value, thereby identifying the pixel position and In addition to simplifying the hardware configuration, it is possible to realize an image processing device that generates dithered images at high speed.

Embodiment FIG. 1 is a block diagram of an embodiment of an image processing apparatus according to the present invention. In FIG. 1, 101 is a two-input adder 102
1 is a pseudo noise generator 103, a binarization circuit 104 is input image data, and 105 is output image data.

Input image data 104 to one side of the two-input adder 101,
The pseudo noise generated by the pseudo noise generator 102 is input to the other side. A binarization circuit 103 converts the added result.
A dithered image is obtained as the output image data 105 by inputting the image data and binarizing it using a certain arbitrary threshold value.

FIG. 2 is a circuit diagram showing an embodiment of the image processing apparatus of the present invention. In FIG. 2, 201 is a two-input adder 20
2 is a shifter; 203 is a binarization circuit 204 is an input image data; 205 is an output image data; 206 is a pseudo noise X20
7 is the output of the two-input adder 203. The figure explains the case where the data width for both human output is 8 bits. Also, here, the lower 2 of the input image data is used as pseudo noise.
Bits are used.

Input image data 204 is input to one of the two-input adders 201 and also to the shifter 202 . This shifter 2
02 corresponds to the pseudo noise generator shown in FIG.

That is, the input image data 204 input to the tab shifter 202 is shifted 6 bits to the left, with the lower 2 bits of the input image monitor 204 serving as pseudo noise, and 0'' is substituted for the blank bits.The upper 2 bits are `` 00″,”
01'', 111011, or ''11'' is equivalent to the generation of a random number, and the output 206 of the shifter 202 behaves as pseudo noise. The pseudo noise 206 generated in this way and the input image data 204 are input to the two-input adder 201, and the obtained value 207 is input to the binarization circuit 203. When the value of the output of the two-input adder is larger than the threshold value of this digitization circuit 203, white is output, and when it is smaller than the threshold value, black is output, and the output of the digitization circuit 203 is 205 is a dithered image.

The specific numbers are as follows. Note that all numerical values are binary numbers. Input image data 204 to 00100
110, the pseudo noise 206 is 10000000 shifted by 6 bits to the left by the shifter 202.

When these are added by the two-input adder 201, the output 207 of the two-input adder 201 becomes 10100110. If the threshold value of the binarization circuit 203 is 10000000, the output image data 20 corresponding to this input image data 204 is
5 becomes white.

Effects of the Invention As is clear from the above explanation, according to the present invention, a dithered image is generated by adding pseudo-noise generated by a pseudo-noise generator to image data and then binarizing it with a certain threshold. An image processing device can be realized. Furthermore, the circuit configuration can be easily realized, and its practical effects are significant.

[Brief explanation of drawings]

FIG. 1 shows the configuration of an image processing apparatus according to an embodiment of the present invention. FIG. 2 is a circuit diagram of an image processing apparatus according to an embodiment of the invention. FIG. 3 is a circuit diagram of a conventional image processing apparatus. 101.201... 2-input adder 102... Pseudo noise generator 103, 203... Binarization times 1% 1
04,204...Input image date 105.205・
...Output image date 202...Schiff number 206...
Pseudo noise, 207...output nine of two-input adder

Claims (1)

[Claims] In an image processing device having a two-input adder, a pseudo-noise generator, and an arithmetic unit that performs binarization using an arbitrary threshold, input image data is input to one of the two-input adders, and the pseudo-noise generator An image processing device that generates a dithered image by adding the pseudo noise generated by the generator as the other input of the two-input adder in the adder, and then binarizing it with a certain threshold.