JPH0362611A - Clock generating circuit - Google Patents

Abstract

PURPOSE:To vary the frequency of a clock in response to the temperature to extract maximum performance of a microprocessor and to attain stable operation by providing a thermister, a comparator and a clock changeover circuit or the like. CONSTITUTION:A comparator 2 compares a thermister output voltage 101 inputted from a thermister 1 with a reference voltage signal generated in the inside with a hysteresis characteristic. As a result, when the signal 101 is higher than the reference voltage, a clock signal 102 of logical 1 is outputted to a clock changeover circuit 5, and when lower than the reference voltage, the clock signal 102 of logical '0' is outputted to the clock changeover circuit 5. The circuit 5 selects a clock B signal 104 with a higher frequency when the signal 102 is logical '0', that is, the ambient temperature is lower than a reference and the circuit 5 selects a clock A signal 103 with a higher frequency when the signal 102 is logical '0' that is, the ambient temperature is higher than the reference. Then a selected clock signal 105 is outputted from the circuit 5 to the microprocessor 6, the maximum performance of the microprocessor 6 is extracted and stable operation is attained.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a clock generation circuit used in a microprocessor application circuit, and particularly to a clock generation circuit that outputs clock signals of different frequencies depending on temperature. .

[Prior Art] Generally, MO5 type logic integrated circuits have a drawback that the operating temperature becomes slower as the temperature increases.

On the other hand, a clock generation circuit in a conventional microprocessor application circuit has a configuration that outputs only a single frequency clock. Therefore, the frequency is naturally
The speed limit was set within a range that did not exceed the guaranteed operating speed of the microprocessor at the maximum temperature at which the device was guaranteed to operate.

[Problems to be solved] The conventional clock generation circuit described above only outputs a clock with a single frequency, so it must be operated with a clock at a frequency that allows the microprocessor to operate even at the highest temperature. The problem was that it was not possible to bring out the maximum performance of the microprocessor in the microprocessor.

The present invention has been made in view of the above problems, and it is possible to bring out the maximum performance of a microprocessor by changing the clock frequency according to the temperature, and also to eliminate glitch noise when changing the frequency, thereby making the microprocessor stable. An object of the present invention is to provide a lock generation circuit that can perform operations.

[Means for Solving the Problems] In order to achieve the above object, the clock generation circuit of the present invention includes a reference temperature detection means for detecting whether a preset temperature has been reached, and a clock signal for outputting a clock signal of a plurality of cycles. an output means, and a clock signal switching means that receives clock signals of a plurality of cycles outputted by the clock signal output means and outputs a clock signal of a cycle corresponding to a set temperature based on the detection result by the reference temperature detection means. The reference temperature detection means judges the set temperature by giving it a hysteresis characteristic, and the clock signal switching means switches the clock signal without outputting glitch noise when switching the clock signal. Do this.

[Example] Hereinafter, the present invention will be explained in detail based on the drawings.

FIG. 1 is a block diagram of a clock generation circuit according to an embodiment of the present invention.

In the figure, a thermistor 1 outputs a voltage proportional to the ambient temperature to a comparator 2 as a thermistor output voltage signal 101. This comparator 2 compares the thermistor output voltage signal 101 and the reference voltage signal generated inside the comparator with hysteresis characteristics, and if the thermistor output voltage signal 101 is higher than the reference voltage, the logic becomes "1'°. Conversely, if the thermistor output voltage signal 101 is lower than the reference voltage, logic II □
A clock selection signal 102 that becomes I+ is output.

Here, FIG. 2 shows a more detailed circuit example of the comparator 2 shown in FIG. 1.

In the figure, the thermistor output voltage 101 is
The reference voltage to be compared with the thermistor output voltage is input to the operational amplifier 301 through Vcc and GND.
It is created by dividing the voltage using resistors 303, 304 and 305.

However, since the output voltage of the operational amplifier 301 is applied between the resistors 303 and 304, the thermistor output voltage 101
Hysteresis can be applied to

Now, returning to FIG. 1, numerals 3 and 4 are a clock 8 generation circuit and a clock B generation circuit, each of which has a clock A signal 1.
03 and a clock B signal 104. Note that the clock A signal 103 is a clock signal with a lower frequency than the clock B signal 104. Further, 5 is a clock switching circuit which selects a high frequency clock B signal 104 when the clock selection signal 102 is a logic '0', that is, when the ambient temperature is lower than a certain standard, and selects a clock B signal 104 with a logic '1'.
”, that is, when the ambient temperature is higher than a certain standard, the clock A signal 103 with a lower frequency is selected and outputted to the microprocessor 6 as the selected clock signal 105.The clock switching circuit 5 is shown in FIG. As shown, the circuit has a circuit configuration that does not output glitch noise when switching clocks.

FIG. 3 shows a more detailed circuit example of the clock switching circuit 5 shown in FIG.

Clock B signal 103 is input to inverter 50 and AND gate 57, and clock B signal lO4 is input to inverter 51 and AND gate 58. The output signal 501 of this inverter 50 is input to the clock input (C) of the D flip-flop 55, and the inverter 51
The output signal 502 is input to the clock input (C) of the D flip-flop 56.

The clock selection signal 102 is input to an AND gate 53 and, on the other hand, is input to an AND gate 54 via an inverter 52. Then, the output signal 5 of the AND gate 53
04 is input to the data input (D) of the D flip-flop 55, and the output signal 505 of the AND gate 54 is input to the data input (D) of the D flip-flop 56.

The positive output (Q) 506 of the D flip-flop 55 is AND
The negative output (Q) 507 is connected to the AND gate 54.
and the positive output (Q)5 of the D flip-flop 56
08 to AND gate 58, negative output (Q) 509 to AN
It is input to the D gate 53.

Next, the operation of the clock generation circuit having the above configuration will be explained in the fourth section.
The explanation will be based on the timing chart shown in the figure.

Thermistor 1 outputs thermistor output signal 1 according to the ambient temperature.
01, and this thermistor output signal 101 is (a)
Suppose that the reference voltage α is exceeded at the point.

Then, the clock selection signal 1 which is the output of the comparator
02 changes from "O" to "1", and as a result, the output signal 505 of the AND gate 54 changes to "O", so the output of the D flip-flop 56 is inverted at the fall of the clock B signal 104. . As a result, AND gate 5
8 input signal 508 becomes 0'', clock B signal 10
4 will no longer be transmitted.

However, at the same time, both inputs of the AND gate 53 become "1", and the output of the D flip-flop 55 is inverted at the fall of the clock A signal 103, so the input signal 506 of the AND gate 57 becomes 11111, and the clock A signal 1
03 is transmitted as the selected clock signal lO5.

In other words, from the falling edge of the selected clock,
Since neither clock is transmitted until the falling edge of the next selected clock, glitch-free clock switching is possible.

Moreover, once the thermistor output signal 101 exceeds the reference voltage β in this way, the comparator 2 thereafter compares the thermistor output signal 101 and the reference voltage β. and,
At point (b), the thermistor output signal 101 becomes lower than the reference voltage β, so the clock selection signal 102, which is the output of the comparator 2, changes from "l" to "0" and goes through the reverse process described above. Clock B signal 104 will be transmitted as selected clock signal 105.

It should be noted that the present invention is not limited to the above embodiments, but includes various modifications within the scope of the gist. For example, in the above-described embodiment, the clocks with two types of cycles are selected, but the number of types can be further increased to allow the microprocessor to process more efficiently.

[Effects of the Invention] As explained above, the present invention guarantees operation by outputting a low frequency clock to a microprocessor made of an MO9 integrated circuit when the temperature is high, and outputs a high frequency clock when the temperature is low. It is possible to bring out the maximum performance of the microprocessor, and by removing glitch noise at the time of clock switching, the microprocessor can operate stably, which has the effect of providing a lock generation circuit.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a clock generation circuit according to an embodiment of the present invention, FIG. 2 is a more detailed block diagram of the comparator shown in FIG. 1, and FIG. 3 is a more detailed block diagram of the clock switching circuit shown in FIG. The detailed block diagram, FIG. 4, is a timing chart showing the operation of the clock generation circuit shown in FIG. Thermistor comparator clock 8 generation circuit clock B generation circuit clock switching circuit

Claims (1)

[Claims] A reference temperature detection means for detecting whether the temperature has reached a preset temperature, a clock signal output means for outputting a clock signal of a plurality of cycles, and a clock signal of a plurality of cycles outputted by the clock signal output means are inputted. , a clock generation circuit comprising clock signal switching means for outputting a clock signal with a period corresponding to a set temperature based on a detection result by the reference temperature detecting means, wherein the reference temperature detecting means has hysteresis at the set temperature. 1. A clock generation circuit, wherein the clock signal switching means performs switching without outputting glitch noise when switching clock signals.