JPH0361862A - Driving method for indicating instrument - Google Patents

Abstract

PURPOSE:To drive an indicating instrument effectively by preventing the deflection of the pointer of the indicating instrument due to the fluctuation in output numerical values when a pulse signal has a low frequency, shortening a dividing and adding period when a pulse signal is inputted during dividing and adding operations, and making it possible to cope with high pulse frequencies. CONSTITUTION:When the pulse signal from an object to be measured has a low frequency, the occurrence of deflection of a pointer can be prevented by performing dividing and adding operations. When the pulse signal from the object to be measured is inputted into a constant setting device 11 in a converter part 1, a dividing constant value is outputted to an adder 15 from a holding part A of the setting device 11. The constant value is added to a value to be operated from an operator 14. Addition is performed at a long additing period by a specified times. When the next pulse signal is inputted until the adding operation is not finished, the output from the setting device 11 is changed from the output of the holding part A to the output of a holding part B. The output of the holding part B is operated in a short adding period shorter than the long adding period, and the output of the holding part A is stopped. The holding part A is reset to the constant value. After the addition with the output of the holding part B is finished, the operation is returned to the long adding period with the output of the holding part A.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a method for driving an indicating instrument.

(Prior art) Indicating instruments that convert the display output from the object to be measured into an appropriate electrical signal (frequency, voltage value, etc.) and operate the pointer of the indicating instrument based on this signal are often used. . Among these, especially for instruments that require predetermined arithmetic processing when converting the output of the measured object into a metering drive output, there is a converter that digitizes the output signal from the measured object, and a converter that converts the output signal from the measured object into a digital signal. The device includes a drive processing unit that generates a predetermined drive output in response to a digital signal input from the device, and a display unit that operates the pointer in response to the drive output.

Regarding the above-mentioned conversion section, especially in the case of a 4-frequency output that emits a pulse signal every time the measurement target changes by a predetermined amount, such as a speedometer, it is composed of an F-V conversion section and an A-D conversion section; The V converter often uses a so-called integrating circuit that combines a capacitor and a resistor to smooth the pulse signal and convert it into a voltage value13, and the A-D converter converts the voltage value into a digital value corresponding to the voltage value. It outputs digital numerical values to the next drive processing section.

(To be solved by the invention [1) F-V in the indicating instrument using the above-mentioned digital processing
The converter is composed of a capacitor and a resistor, and since the accuracy of the capacitor varies greatly, it is often seen that the actual output value of the F-V converter differs from the designed output value.

Therefore, we proposed a method for direct digital conversion without performing F-V conversion and A-D conversion (Japanese Patent Application No. 1-1376).
No. 79). This involves adding a constant value to the operand value every time a pulse signal is emitted from the object to be measured, and subtracting a value corresponding to a certain percentage of the operand value every time the pulse signal is emitted, regardless of the pulse signal. It performs addition processing and outputs the processing result (operand value) as described above from the conversion section.The conversion section output is approximately stable at a value that balances the addition value and the subtraction value, so the conversion section output (digital The numerical value) corresponds to the generation frequency of the pulse signal of the object to be measured.

In this frequency digital conversion means, when the period of the pulse signal from the object to be measured becomes long, ripples occur in the converter output, which is the result of arithmetic processing, and the pointer shakes due to this ripple. Regarding this guideline fluctuation, next 16
Pituto (hereinafter referred to as ooo).

This will be specifically explained using an example of arithmetic processing (indicated by FFFF).

The setting conditions are: ■ Subtraction processing formula v (n+1)=V (n) −V(r
2) A.

V(n): Operand value at any time ■ Subtraction processing cycle T = 1 msec ■ Value added per 1 input pulse CI = 0800
(2) The output is the upper 8 bits of the calculation result V(n).

, and the input pulse period is Ion see and 100m.
If the case of sec is plotted as a graph, it will be as shown in FIG.

However, the initial value is r00OOJ.

As shown in Figure 5 (a), the input pulse period is 10 m1e.
In the case of e, the converter output increases every 10m5ec, but
Since the pointer does not follow this periodic fluctuation, no actual pointer wobbling occurs. On the other hand, when the input pulse period is 100 m sec as shown in Fig. 5 (b), the input pulse period is 100 m s.
Since the output of the converter for each ee protrudes and the pointer of the indicator is driven in accordance with the output of the converter, the pointer will naturally deviate.

(Means for Solving the Problems) The present invention has been made in view of the above-mentioned problems in the means for directly converting the period number input into digital data and using it as a driving reference for a meter, and has proposed an improvement thereof. In the driving method of the indicating instrument according to the present invention, a pulse signal is emitted every time the object to be measured changes by a predetermined amount, and a constant value is added to the operand value every time the pulse signal is input, and the predetermined value is subtracted at regular intervals. , the WA of the indicating instrument that determines the index of the indicating instrument based on the calculation result.
In the method, the addition of the constant value is divided into predetermined periods and the division addition is performed, and if the next pulse signal is input before the end of the division addition, the remaining addition process is performed in a period shorter than the addition period. It is characterized by the fact that

(Function) Every time a pulse signal is emitted from the object to be measured, a constant value is divided and added to the calculated value, and a predetermined value is subtracted at regular intervals, so the numerical value of the calculation result is input. This corresponds to the frequency of the pulse signal, and even if the period of the input pulse signal is long, the constant value itself is divided and added, so no outstanding values will occur in the calculation result, and as a result, the pointer will not move. do not have. In addition, if a pulse signal is input before the addition processing of constant values is completed, the addition processing of the remaining division constants that have not yet been added will be added in short cycles, so the calculation result will be pulsed. This corresponds to the input frequency of the signal.

(Example) Next, embodiments of the present invention will be described based on the drawings.

FIG. 1 is a block diagram of the entire instrument, FIG. 2 is a detailed diagram of the converting section, FIG. 3 is a graph showing the output of the division constant value, and FIG. 4 is an output graph of the converting section.

The overall configuration of the indicating instrument consists of a converting section 1. The conversion section 1 is composed of a drive processing section 2 and a display section 3, and when a pulse signal generated according to the operation of the object to be measured is input, the conversion section 1 outputs a digital numerical value according to the pulse frequency, the details of which will be described later. The drive processing section 2 includes a ROM section 21. DA converter 22.
It consists of a drive output section 23, and the ROM section 21 stores a digital output corresponding to the output signal (digital numerical value) of the converting section 1 described above, and upon receiving the output of the converting section, outputs the memorized digital numerical value, Next DA converter 2
2, the digital numerical value No. 43 is DA converted and sent to the drive output section 23. The drive output section 23 outputs a drive current for driving the pointer. The display section 3 includes a pointer 2 display plate, a drive coil, etc., and is operated by a drive current from the drive output section 23 described above.

The details of the converter 1 are as shown in FIG.
．． Timing pulse generator 12. Arithmetic unit 1 consisting of latch circuit 13, subtraction value setter 141 and adder 142
4. It consists of an adder 15. When the constant setter 11 receives a pulse signal from the object to be measured, it divides a preset constant value into a predetermined period and sequentially outputs it, and sends it to the adder 15. It consists of part C. Holding unit A outputs a division constant value in a long-term addition cycle, and each time it outputs a division constant value, it sequentially counts up and when it reaches a predetermined value (constant value) and when there is an output from holding unit B. Its output is stopped and reset when a pulse signal is input. Each time holding unit A outputs a division constant value, holding unit B performs a countdown by subtracting the division constant value from the constant value, and if a pulse signal is input while holding the numerical value, the holding unit B performs a countdown to subtract the division constant value from the constant value. The control section C controls the holding sections A and B. The timing pulse generation fm12 is output to all the circuits in the converting section 1, and each section operates based on this timing pulse. The latch circuit 13 latches the converter output numerical value and outputs it to the arithmetic unit 14. The arithmetic unit 14 adds a subtraction value determined by a subtraction value setter 141 to the output numerical value from the latch circuit 13 in addition@142, and outputs the result to the adder 15. Adder 15 has constant setting N11 and adder 141
The output values of the converter 1 are obtained by adding the respective output values.

Next, the above operation will be explained.

First, a case where there is no output from the constant setter 11 will be explained.

The timing pulse generator 12 outputs a timing pulse signal having a constant period to each circuit (block), and each circuit performs Fr-determined processing for each circuit in synchronization with this pulse signal. When this timing pulse signal is output, the operand value held in the latch circuit 13 is output to the subtraction value setter 141 and the adder 142 in the arithmetic unit 14. This is a circuit that converts a value corresponding to a certain percentage of the operand value into a negative value and sets it as a subtraction value.The adder 142 adds this subtraction value and the operand value and outputs the result to the adder 15. The adder 15 is a circuit that adds the operand value output from the adder 142 of the operation Wj 14 and the constant output from the constant setter 11. However, since there is no output from the constant setter 11 at this time, the adder 15 The operand value of the adder 142 is output as is. This output is output to the latch circuit 13 as a new operand value, and this operand value is also output to the ROM section 6 shown in FIG.

Therefore, if the above process is repeated every time the timing pulse signal is output, the operand value will gradually decrease.

Next, a case where there is a numerical output from the constant setter 11, that is, a case where a pulse signal is input to the converter 1 from the object to be measured will be described.

When a pulse signal from the object to be measured is input to the constant setter 11 in the converter 1, a divided constant value is output from the holding section A of the constant setter 11 to the adder 15 (see Fig. 3 (a)).
This division constant value and the operand value output from the arithmetic unit 14 are added. In this addition process, addition is performed a predetermined number of times with a period corresponding to several timing pulse signals (long-term addition period). Therefore, when a pulse signal is input to the constant setting 1i111, the adder 15 calculates @H1 with a long-term addition cycle.
The output value of 4 and the output value of constant setter 11 (holding section A) are added, and the above-mentioned subtraction process is performed in a short period during this period.

Therefore, the output of the converter 1 becomes a numerical value in which the added value and the subtracted value are balanced.

Furthermore, if the next pulse signal is input before the addition process described above is completed, the output of the constant setter 11 changes from the output of the holding section A to the output of the holding section B. The output of the holding unit day is the division constant Tateyama force as in the holding unit A, but the period is short-term addition cycle which is shorter than the long-term addition cycle mentioned above, and the addition process is held in the holding unit B. This is done for the remaining numerical values that could not be added within the long-term addition cycle. When there is an output from holding section B, the output from holding section A is stopped, and holding section A is reset to a constant value. After the addition process based on the output of the holding unit B is completed, the addition process is performed by returning to the long-term addition cycle based on the output of the holding unit A (FIG. 3(b) I).

To show an example #1 using specific numerical values, the setting conditions are the same as those shown in Fig. 5, that is, ■ Subtraction processing formula: (
Setting value of subtraction value setter 141: V (n) / 2”) V (n + 1) = V (n) - V (n)
/ 2" ■ Subtraction processing cycle T = 1 msec ■ Addition value per input pulse: Add rolooJ 8 times Addition cycle (long M) = 8 m sec Addition cycle (short term): 1 m5 ec, input pulse cycle 10111 sec 100
Graphs showing the case of m sec are shown in FIGS. 4(a) and 4(b).

Comparing the graph in Figure 4 (b) and the graph in Figure 5 (t), it is clear that the input period of the pulse signal is 100
If the added value is added in several times, rather than adding all the added values every m see, ripples will not occur in the converter output, and even if the input pulse signal period is short, the addition period can be changed accordingly. If it is shortened, no problem will occur. Also, of the 16-bit signal output from the converter, the upper 8 pit signals are used by the inner drive processor for addition as described above.

Since the subtraction is performed at a cycle of 1 m5ec, the pointer of the indicator does not pulsate due to the addition/subtraction process.

Regarding the output relationship between holding parts A and B, in the above embodiment, the output of holding part A is stopped while the holding part B is outputting, and the output of holding part A is restarted after the output of holding part B is finished. but,
The present invention is not particularly limited to such processing; for example, holding unit A is reset every time a pulse signal is input and immediately outputs it in a long-term addition cycle, and holding unit B outputs a pulse when a counted down held value exists. The outputs of the holding units A and B may be made in parallel, such that when a signal is input, the output is immediately performed in a short-term addition period. During this parallel processing, the outputs of holding section A and holding section B may not be performed at the same time, and when they are performed at the same time, the output of the constant setter is the sum of the re-output values ( Figure 3 (b) II).

Furthermore, the present invention performs division and addition to prevent the needle from shaking even when the pulse signal from the object to be measured has a low frequency, and the number of divisions is not limited to the above-mentioned embodiments and can be arbitrarily determined. reactor. Furthermore, the addition period may be switched in multiple steps instead of in two steps.

(Effects of the Invention) As described above, when the present invention receives a display pulse signal output from an object to be measured, which is a frequency input, a constant value is added to the input air relief calculation value, and a predetermined value is added at a constant period. In the method of obtaining the output value corresponding to the frequency input by subtraction and driving the instrument, the addition is divided and added,
Prevents the pointer of the indicator from fluctuating due to output numerical fluctuations when the pulse signal is low frequency, and can also handle high frequency pulse signals by shortening the division addition period when a pulse signal input is received during division addition. This is what I did.

[Brief explanation of drawings]

Fig. 1 is an overall block diagram of the instrument implementing the present invention, Fig. 2 is a detailed block diagram of the converter, and Fig. 3 is a graph showing the output of the constant setter, and (a) shows the low frequency input. ,(B)
Indicates high frequency input. Figure 4 is a graph showing the converter output, (a) shows the high frequency input, (tF) shows the low frequency input, and Figure 5 is a graph showing the converter output when the present invention is not implemented. ) indicates a high frequency input, and (1ff) indicates a low frequency input. 1 is the converter 11 as a constant setter! 2 is the timing pulse generator 13, the latch circuit 14, the arithmetic unit 141, the subtraction value setter 142, the adder 15, the adder 2, the drive processing section 21, the ROM section 22, the D-A conversion section 23+fliiKllll[+output section 3 is the display part

Claims (1)

[Claims] (1) A pulse signal is emitted every time the object to be measured changes by a predetermined amount, and a constant value is added to the computed value every time this pulse signal is input, and a predetermined value is subtracted at regular intervals, and instructions are given based on the computed result. In the driving method of the indicating instrument that determines the index of the instrument, the addition of the constant value is divided into predetermined periods, and the remaining pulse signal is added when the next pulse signal is input before the end of the divided addition. A method for driving an indicating instrument, characterized in that addition processing is performed at a cycle shorter than the addition cycle.