JPH0361393B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] In a power supply circuit that can be implemented as an LSI and has three mirror circuits each on the ground side and the battery side, the B line,
The difference between the voltages of each power supply circuit that supplies power to the A line is detected, and if the difference is greater than a predetermined value, the resistor connected to the non-inverting input terminal of the operational amplifier of the first mirror circuit is set to 1/n. In this way, the power supply resistance is increased by n times to limit the power supply current, thereby achieving a reliable protection function with a simple configuration.

[Industrial application field]

The present invention relates to a power supply current limiting circuit that protects the power supply circuit by limiting overcurrent caused by faults such as ground faults and cross-contact in subscriber lines in the power supply circuit that supplies communication current to subscribers. .

When a subscriber line has a ground fault or cross contact, a large current is supplied from the power supply circuit, damaging the integrated power supply circuit. Therefore, in the power supply circuit in the subscriber circuit of the exchange, it is necessary to detect a ground fault or a fault in the subscriber line and limit the power supply current.

[Conventional technology]

The conventional electronic power supply current limiting circuit is
For example, it has the configuration shown in FIG. 8 or FIG. 9. In Fig. 8, Q ₁ and Q ₀ are transistors, OP ₁ and OP ₀ are operational amplifiers, Ra ₁ , Ra ₀ ,
Rb ₁ , Rb ₀ , Re ₁ , Re ₀ , Rt, Rt ₁ , Rt ₀ are resistances,
D ₁ and D ₀ are diodes. In this circuit, a current is supplied from the ground side to the B line via the transistor _Q1 , and a current flows from the A line to the battery side via the transistor _Q0 . The power supply current in this case is determined by the relationship between the resistances Ra ₁ , Ra ₀ , Rb ₁ , Rb ₀ , Re ₁ , and Re ₀ , and the power supply resistance for the B line and A line
Z _B and Z _A are as follows: Z _B = (Rb ₁ + Ra ₁ )/Ra ₁ · Re ₁ ... (1) Z _A = (Rb ₀ + Ra ₀ ) / Ra ₀ · Re ₀ (2). However, Rb ₁ , Rb ₁ ≫1.

In addition, the power supply voltage V _BB is applied to the series circuit of resistors Rt ₁ , Rt ₀ , and Rt.
is added to form two threshold voltages Vth ₁ and Vth ₀ , which are connected to the operational amplifier via diodes D ₁ and D _0.
It is applied to the non-inverting input terminals of OP ₁ and OP ₀ and clamped so that the non-inverting input terminal voltages do not rise above the threshold voltages Vth ₁ and Vth ₀ .

If the earth side and battery side have a symmetrical configuration, the maximum potential of the A line will be (1/2)·V _BB . For example, A
When a line-to-ground fault occurs, the potential between the A line and the battery power source becomes _VBB , which is twice the normal voltage, and the current also doubles. Therefore, in the power supply circuit section on the battery side, 4
It will consume twice as much power. In that case, the voltage at the non-inverting input terminal of operational amplifier OP ₀ is the threshold voltage
When Vth becomes ₀ or higher, diode D ₀ becomes conductive, clamping the non-inverting input terminal voltage to the threshold voltage Vth ₀ ,
Limit the power supplied to the A line.

In Fig. 9, the same symbols as in Fig. 8 indicate the same parts, CC ₁ and CC ₀ are constant current circuits, SB and SA.
is a conversion circuit, COMP is a comparison circuit with hysteresis characteristics, ABS is an absolute value conversion circuit, DV is a drive circuit, and Rd is a resistor. B line in normal case, A
The power supply resistance for the line is similar to the configuration shown in FIG. 8 described above.

This circuit consists of resistors Rb ₁ , Rb ₀ and operational amplifier OP ₁ ,
Constant current circuit between non-inverting input terminal of OP ₀
CC ₁ and CC ₀ are connected, conversion circuits SB and SA are connected to the inverting input terminals of operational amplifiers OP ₁ and OP ₀ , and the outputs of conversion circuits SB and SA are converted to absolute values by the absolute value conversion circuit ABS. is compared with a constant threshold value Vth by a comparator circuit COMP, and the drive circuit DV operates the constant current circuits CC ₁ and CC ₀ based on the comparison output.

The current flowing in the B line and A line is detected as a voltage by the resistors Re ₁ and Re ₀ , and converted to current by the conversion circuits SB and SA, and the conversion output is triggered by the wired-OR connection. calculation is done,
This becomes the input to the absolute value conversion circuit ABS. Therefore, B
When the currents flowing in the A line and the A line are equal, the input to the absolute value conversion circuit ABS becomes zero. This absolute value conversion circuit ABS allows the absolute value of the input difference current to flow through a resistor Rd, which converts it into a voltage, which becomes one input of the comparator circuit COMP, and the other input. It is compared with the threshold voltage Vth.

In the event of a fault such as a ground fault or cross contact, the difference current increases, so the output of the absolute value conversion circuit ABS also increases, and the voltage converted by the resistor Rd becomes the threshold voltage.
Since it is larger than Vth, the output of the comparison circuit COMP is used to connect the constant current circuit CC ₁ through the drive circuit DV.
CC ₀ is activated. Thereby, the resistance Rb ₁ ,
This makes the current flowing through Rb ₀ a constant current and limits the power supply current to a constant value.

[Problem that the invention seeks to solve]

In the conventional power _supply current limiting circuit shown in FIG _.
If we limit the power supply current by clamping it to the threshold voltage Vth ₀ through , and clamping it at a current 1.5 times the normal current, the voltage between the A line and the battery power supply will be twice the normal voltage. Therefore, the power will be tripled.
As described above, there is a drawback that excessive power supply cannot be sufficiently restricted in the event of a ground fault or cross-contact.

In addition, in the conventional power supply current limiting circuit shown in FIG. 9, when a ground fault or cross contact occurs, the constant current circuits CC ₁ and CC ₀ are operated, thereby controlling the B line, It is possible to limit the current supplied to the A line below the normal power supply current, but at that time the output of the absolute value conversion circuit ABS will decrease.
As one input of the comparator circuit COMP becomes smaller,
When the voltage becomes lower than the threshold voltage Vth, the constant current circuits CC ₁ and CC ₀ operated via the drive circuit DV stop their operation, and a large current is supplied again. circuit CC ₁ , CC ₀
An oscillation phenomenon occurs that causes the In order to avoid this, the comparator circuit COMP must be configured to have hysteresis characteristics, which has the disadvantage of making the configuration complicated and expensive.

An object of the present invention is to improve the above-mentioned conventional drawbacks and to provide a sufficient protection function with a simple configuration.

[Means for solving problems]

The power supply current limiting circuit of the present invention will be explained with reference to FIG.
to third mirror circuits B0, B1, B2, A0,
The first mirror circuit B0, A2 is configured to feed power to the B line and the A line.
A0 has transistors Q 1 and Q 0 whose collectors are connected to the B line or A line, whose emitters are connected to resistors Re ₁ and Re ₀ , and whose bases are connected to _{the output terminals of operational amplifiers OP 1 and OP 0 ,} It includes resistors Ra ₁ and Ra ₀ connected to the non-inverting input terminals of the operational amplifiers OP ₁ and OP ₀ .

By connecting the resistance switching parts RS ₁ and RS ₀ in parallel to these resistances Ra ₁ and Ra ₀ , when a ground fault or cross contact occurs in the B line and A line, the combined resistance value with the resistances Ra ₁ and Ra ₀ can be calculated. 11/n
By doing so, the power supply resistance is multiplied by n and the power supply current is limited. For that reason, the B line,
Detection unit 1 that detects the voltage difference between the power supply circuits of each A line
The detected difference current is compared to see if it is greater than or equal to a predetermined value, and when it is greater than or equal to the predetermined value, the resistance switching unit RS ₁ ,
A comparison control section 2 for controlling RS ₀ is provided.

Also, resistors Rb ₁ and Rb ₀ that convert the voltage between the B line and the earth and between the A line and the battery into current are connected to the input terminals of the second mirror circuits B1 and A1, and the third mirror circuit is connected to the input terminals of the second mirror circuits B1 and A1. A resistor is connected between the input terminals of circuits B2 and A2.
Rc ₁ , Rc ₀ and capacitor C _AB are connected in series. The output terminal of the third mirror circuit B2 on the earth air side is connected to the input terminal of the first mirror circuit A0 on the battery side, and the output terminal of the third mirror circuit A2 on the battery side and the first mirror circuit A0 on the earth air side are connected. It is connected to the input terminal of the mirror circuit B0, and also connected to the input terminal of the third mirror circuit B2 on the earth side and the output terminal of the second mirror circuit A1 on the battery side via a resistor _Rc1 . The input terminal of the third mirror circuit A2 and the output terminal of the second mirror circuit B1 on the earth side are connected via a resistor _Rc0 . Further, the output terminals of the second mirror circuits B1 and A1 on the earth side and the battery side are connected to each other and to the detection section 1.

When the currents flowing in the B line and the A line are different, the voltages of the respective power supply circuits are different, and the second mirror circuit B
Since the currents input to A1 and A1 are different, the currents flowing to the output terminals of the mirror circuits are different, and the difference current flows to the detection section 1. The detection signal of this difference current is applied to the comparison control unit 2 and compared with a predetermined value, and if it is greater than the predetermined value, it is determined that a ground fault or cross contact has occurred, and the resistance switching units RS ₁ and RS ₀ are controlled, and the resistance Ra Connect a resistor in parallel with ₁ and Ra ₀ to make the combined resistance 1/n. As a result, the power supply resistance increases by n times.

Further, a voltage _VZ , which is a stabilized battery power supply voltage _VBB , is applied to the common terminal of the third mirror circuit A2 on the battery side to eliminate the influence of power supply noise.

[Effect]

When a ground fault or cross contact occurs, the difference in the current flowing between the B line and the A line increases, and this difference is detected by the detection unit 1.
Detect with. That is, the second mirror circuits B1, A1
The input _terminal of is connected to the B _line ,
A current corresponding to the potential of the A line flows, and under normal conditions,
Since almost the same current flows, the second mirror circuit B
Almost the same current flows through the output terminals 1 and A1 that are connected to each other, and the current flowing into the detection section 1, in other words, the difference current becomes almost zero. However, when a ground fault or cross contact occurs, the difference between the currents flowing in the B line and the A line increases, and the current flowing into the detection section 1 also increases. This difference current is detected by the detection section 1 and applied to the comparison control section 2.

The comparison control unit 2 compares the predetermined value and the detected current difference, and if the difference is greater than or equal to the predetermined value, determines that there is a ground fault or cross contact, and controls the resistance switching units RS ₁ and RS ₀ ,
Connect resistors in parallel to resistors Ra ₁ and Ra ₀ to make the combined resistance 1/n. As a result, the power supply resistance becomes approximately n times larger, so that the power supply current can be limited to protect the power supply circuit. Also, the feeding resistance is n
Even after the voltage is doubled, the voltage difference between the power supply circuits for the B line and the A line does not become zero, so the comparison means in the comparison control section 2 can be realized by a simple comparison circuit.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 shows an embodiment of the present invention, and the same reference numerals as in FIG. 1 indicate the same parts. Resistance Rf ₁ , Rf ₀ and Rg ₁ ,
Resistance switching units RS ₁ and RS ₀ are configured by Rg 0 and transistors Qr ₁ and Qr ₀ , detection unit ₁ is configured by absolute value conversion circuit ABS and resistor Rd, and comparison circuit CMP and drive circuit are configured. A comparison control section 2 is constituted by DV.

FIG. 3 shows an LSI power supply circuit that does not include the current limiting configuration. In the same figure, the first mirror circuits B0 and A0 on the earth side and the battery side are
The collector is connected to the line or A line, the resistors Re ₁ and Re ₀ are connected to the emitter, and the operational amplifier is connected to the base.
Transistor to which output terminals of OP ₁ and OP ₀ are connected
Q ₁ , Q ₀ and resistors Ra ₁ , Ra ₀ connected to the non-inverting input terminals (+) of the operational amplifiers OP ₁ , OP ₀ , and the inverting input terminals of the operational amplifiers OP ₁ , OP ₀ . The input terminals are connected to the emitters of transistors Q ₁ and Q ₀ , and the collectors of transistors Q ₁ and _{Q 0} are used as output terminals, and the non-inverting input terminals of operational amplifiers OP ₁ and OP ₀ are used as input terminals to form an equivalent mirror circuit. be.

Also, to the input terminals of the second mirror circuits B1 and A1,
B line and A line are connected through resistors Rb ₁ and Rb ₀ ,
The output terminal of the second mirror circuit B1 on the earth side is connected to the input terminal of the third mirror circuit A2 on the battery side with a resistor Rc _0.
A second mirror circuit A on the battery side
The output terminal of No. 1 is connected to the input terminal of the third mirror circuit B2 on the earth side via a resistor Rc ₁ , and a capacitor C _AB is connected between the resistors Rc ₁ and Rc ₀ . Further, the output terminal of the third mirror circuit B2 on the earth side is connected to the input terminal of the first mirror circuit A0 on the battery side,
The output terminal of the third mirror circuit A2 on the battery side is connected to the input terminal of the first mirror circuit B0 on the earth side. Further, a stabilizing voltage _VZ is applied to the common terminal of the third mirror circuit A2 on the battery side, thereby eliminating the influence of power supply noise that fluctuates the battery power supply voltage _VBB .

The voltage V _B between the earth and the B line is converted into a current I _RB = V _B /Rb ₁ by the resistor Rb ₁ , and from the second mirror circuit B1 with a current ratio of 1, the resistor Rc ₀ → the battery side It passes through the third mirror circuit A2 and is applied to the resistor _Ra1 . Therefore, the feeding resistance Z _B on the B line side is Z _B = Rb ₁・
It is expressed as Re ₁ /Ra ₁ . Similarly, the feeding resistance Z _A on the A line side is also expressed as Z _A =Rb ₀ ·Re ₀ /Ra ₀ .

When a differential signal (call signal) is applied to the B line and A line, the differential signal is applied from the second mirror circuit B1, A1 to both ends of the capacitor C _AB .
The differential signal will be bypassed by the capacitor C _AB , and the third mirror circuit B2, A2
is not entered. Therefore, since current can be supplied from the first mirror circuits B0 and A0 regardless of the differential signal, it exhibits high impedance with respect to the differential signal.

In addition, for common-mode signals (inductive noise), since the same voltage is applied to both ends of capacitor C _AB , the circuit state is such that capacitor C _AB is not connected, and the third mirror circuit B2, A2 An alternating current component due to the in-phase signal flows through the first mirror circuits B0 and A0, thereby causing an alternating current component to flow through the first mirror circuits B0 and A0, which exhibit a low impedance with respect to the in-phase signal.

Although the mirror ratio of each mirror circuit described above can be arbitrarily selected, in this embodiment, the mirror ratio of the second and third mirror circuits B1, B2, A1, and A2 is assumed to be 1. There is. The mirror ratio of the first mirror circuits B0 and A0 is Ra ₁ /Re ₁ ,
It will be determined by Ra ₀ / Re ₀ .

In this first mirror circuit B0, A0,
The outputs of operational amplifiers OP ₁ and OP ₀ cause transistors to
Q ₁ and Q ₀ are driven, and the voltages of the non-inverting input terminal and the inverting input terminal are finally equal, that is, a state called imaginary position. In this state, the resistance The voltages of Ra ₁ and Re ₁ are equal,
Also, the voltages of the resistors Ra ₀ and Re ₀ become equal. Therefore,
The ratio of currents flowing through these resistors follows the resistance ratio. Here, assuming that the current amplification factor h _FE of transistors Q ₁ and Q ₀ is sufficiently large, the resistances Ra ₁ and
The mirror ratios of the mirror circuits B0 and A0, in which the Ra ₀ side is the input and the collector sides of the transistors Q ₁ and Q ₀ are the outputs, are Ra ₁ /Re ₁ and Ra ₀ /Re ₀ shown by the resistance ratios mentioned above.
becomes.

Furthermore, since the LSI power supply circuit shown in FIG. 3 has a symmetrical structure on the A line side and the B line side, the operation on the B line side will be mainly explained.

When a voltage V _B is applied to the B line, a current of V _B /Rb ₁ is input to the mirror circuit B1 through the resistor Rb ₁ .
Here, for the sake of simplicity, the input resistance of the mirror circuit B1 is assumed to be 0. Note that although the actual input resistance of the mirror circuit B1 is not 0, since it is connected in series with the resistor Rb ₁ in terms of the circuit, it can be considered to be included as a part of the resistor Rb ₁ . Also, the output resistance of the mirror circuit is very large and can be made infinite for simplicity.

Since the current input to the mirror circuit B1 has a mirror ratio of 1, the same output current as the input current is input to the mirror circuit A2 through the resistor _Rc0 . Similarly, in this mirror circuit A2, the same output current as the input current is input to the mirror circuit B0.

Therefore, the current flowing through the resistor Rb ₁ is I _Rb1 , the input current of mirror circuit B0 is I _B0i , the output current is I _B00 ,
The mirror ratio of mirror circuit B1 is β1, mirror circuit A
_{If α2 is the mirror ratio of _ _ 1} = I _Rb1 × Ra ₁ / Re ₁ = (V _B / Rb ₁ ) × Ra ₁ / Re ₁ = V _B × Ra ₁ / (Rb ₁ × Re ₁ ). Here, the resistance Z _B of the power supply circuit on the B line side is
Since it is obtained from the relationship between applied voltage and current, Z _B = V _B / (I _B00 + I _Rb1 ), and if I _B00 ≫ I _Rb1 , Z _B ≒ V _B / I _B00 = V _B / [V _B × Ra ₁ / (Rb ₁ × Re ₁ )] = Rb ₁ × Re ₁ / Ra ₁ . Similarly, the resistance Z _A of the power supply circuit on the A line side can be found, Z _A ≒ V _A / I _A00 = V _A / [V _A × Ra ₀ / (Rb ₀ × Re ₀ )] = Rb ₀ × Re ₀ /Ra ₀ .

Furthermore, an AC signal such as an audio signal in the power supply circuit is applied in a form superimposed on a DC signal, and the mirror circuit operates with the same mirror ratio as for the DC signal with respect to this AC signal. For example, when an AC voltage of vb is applied to the B line, the current vb/Rb ₁ is the mirror circuit B1
input and output with a mirror ratio of 1. Similarly, when an AC voltage of va is applied to the A line, a current va/Rb ₀ is input to the mirror circuit A1 and output with a mirror ratio of 1.

If the aforementioned AC voltages va and vb are in phase, the resistance
The currents flowing through Rc ₀ and Rc ₁ have the same value; one direction increases the direct current, and the other direction decreases it. Therefore, assuming that there is no capacitor C _AB , voltages of vb×Rc ₀ /Rb ₁ and va×Rc ₁ /Rb ₀ are generated at the connection point of capacitor C _AB , and these voltages have the same phase. Therefore, there is no alternating potential difference between both ends of capacitor C _AB . Since there is no alternating current potential difference,
Even if capacitor C _AB is connected, no current will flow through it, and the configuration will be the same as without capacitor C _AB , making it equivalent to a DC circuit. That is, the alternating current impedances zb and za between the B line side and the A line side are zb≒Rb ₁ ×Re ₁ /Ra ₁ za≒Rb ₀ ×Re ₀ /Ra ₀ .

Also, if the AC voltages va and vb are differential, the capacitor
Assuming that there is no C _AB , the connection points of the capacitor C _AB are vb×Rc ₀ /Rb ₁ and va×Rc ₁ /
Rb ₀ voltage is generated differentially (opposite phase). Here, if the capacitance of capacitor C _AB is sufficiently large, its AC impedance Z _c is Z _c = 1/2πfC _AB ≪Rc ₀ ,
If Rc is ₁ , almost all of the alternating current output from the mirror circuits B1 and A1 will pass through the capacitor C _AB .

Therefore, the mirror circuit A is passed through the resistors Rc ₀ and Rc ₁ .
2, it will no longer be input to B2. That is, capacitor C _AB operates as a kind of AC removal filter. Also, since no alternating current is input to the mirror circuits A2 and B2, no alternating current is input to the mirror circuits A0 and B0.
AC is not output from. This shows that even if a differential voltage is applied, no current flows due to it, and the impedance zb for the differential signal is
za is, zb=V _B / (I _B00 + I _Rb1 ) V _B / (0 + V _B / Rb ₁ ) = Rb ₁ ≫1 za = V _A / (I _A00 + I _Rb0 ) = V _A / (0 + V _A / Rb ₀ )=Rb ₀ ≫1. In other words, the impedance becomes extremely high.

Further, the voltage V _Z of the stabilized power supply does not include power supply noise, and the power supply noise is included in the voltage V _BB . There is a need for a function that prevents this power supply noise from being output as a differential signal to the B line and A line. Note that if the noise is in phase, there is no problem because the subscriber will not hear it as noise. Note that the mirror circuit A0,
Even if the power supply voltage V _BB is applied to A1,
Noise is not mixed in from here.

For example, there is noise between the A line and the power supply with voltage V _BB .
When V _NBB is present, the resistor Rb ₀ causes the mirror circuit A1 to
A noise current I _N of V _NBB /Rb ₀ is input. The mirror circuit A1 is not directly affected by the noise contained in the power supply voltage V _BB , but if the input current contains noise, it will output a current proportional to it, and the noise current I _N is passed through the resistor Rc ₁ . Mirror circuit B
Trying to enter 2.

However, since the AC impedance of the capacitor C _AB is smaller than that of the resistors Rc ₀ and Rc ₁ , the noise current _IN is shunted to the resistors Rc ₀ and Rc ₁ and sent to the mirror circuit A.
2. Input in B2. At that time, the voltages across the capacitor C _AB will be in phase, so the voltages caused by the noise V _NBB generated on the B and A lines due to the noise current I _N will be in the same phase, and as mentioned above, this will not be a problem for the subscriber. It turns out.

Further, FIG. 4 shows a mirror circuit, and the mirror circuit having an input terminal IN, an output terminal OUT, and a common terminal C shown in a has a circuit configuration shown in b or c. In the circuit b, the bases of the transistor Qa connected to the input terminal IN and the transistor Qb connected to the output terminal OUT are connected to the input terminal.
The emitters of transistors Qa and Qb are connected to common terminal C via resistors R ₁ and R ₂ . Also, the circuit c is different from the circuit shown in b,
A transistor Qc is connected to compensate for the base current of the transistors Qa and Qb, and a transistor Qd is connected to compensate for the shortage of the current amplification factor h _FE of the transistors Qa and Qb, and to suppress fluctuations due to the Early effect of the transistor Qb. is connected.

Figure 5 shows an example of the absolute value conversion circuit ABS, which includes transistors Qf, Qg and a mirror circuit.
CM1, the terminal is an input terminal, the terminal is a power supply terminal, and the terminal is an output terminal, and corresponds to terminals ~ in Fig. 2. In this circuit, for example, when a current flows into the input terminal, the current flows into the input terminal of the mirror circuit CM1 with a current ratio of 1 through the transistor Qg, and the same current flows into the output terminal of the mirror circuit CM1. Therefore, the same current flows into the output terminal as the input terminal. Conversely, when current flows out from the input terminal, the current flows from the output terminal to the input terminal via the transistor Qf. Therefore, regardless of the current direction of the input terminal, the same current flows from the output terminal. That is, the direction of the current is made constant (absolute value).

Further, FIG. 6 shows an example of the comparator circuit CMP and the drive circuit DV, and terminals .about. correspond to terminals .about. in FIG. 2. comparison circuit
CMP consists of transistors Qh, Qi, Qj and constant current source CI
It consists of a resistor Rd at the terminal (see Figure 2).
A voltage is applied to the terminal, and a threshold voltage Vth is applied to the terminal. Also, the drive circuit DV is a transistor
Consisting of Qk, Ql and a mirror circuit CM2 with a current ratio of 1, the terminal is connected to the transistor Qr ₁ (see Figure 2) on the earth side, and the terminal is connected to the transistor Qr ₀ (see Figure 2) on the battery side. It is connected.

If the output of the absolute value conversion circuit ABS is small,
Transistor Qh of comparison circuit CMP turns on, transistors Qi and Qj turn off,
Since the transistors Qk and Ql of the drive circuit DV are in the off state, the transistors forming the resistance switching section
Qr ₁ and Qr ₀ are in the off state and are supplied with power through a predetermined power supply resistance. On the other hand, if the output of the absolute value conversion circuit ABS increases due to a ground fault or cross contact, the transistor Qh of the comparator circuit CMP is turned off and the transistors Qi and Qj are turned on, so that the drive circuit
Transistors Qk and Ql of DV are turned on, transistors Qr ₁ and Qr ₀ forming the resistance switching section are turned on, and resistors Rf 1 and Rf ₁ are connected in parallel to resistors Ra ₁ and Ra ₀ .
Rf ₀ will be connected, and the combined resistance will be 1/n
Therefore, the power supply resistance is multiplied by n.

Figure 7 is an explanatory diagram of the potential distribution during a ground fault, where a is the normal state, power supply resistance Z _B = Rb ₁ · Re ₁ /Ra ₁ , Z _A =
Power is supplied to the subscriber line side resistor R _L by Rb ₀ ·Re ₀ /Ra ₀ . As shown in b, the A wire is the ground fault resistance.
When grounded by R _G , the difference between the voltage V _A between the A line and the battery power source and the voltage V _B between the B line and the ground becomes larger as the ground fault resistance R _G becomes smaller.

Corresponding to the difference between the voltages V _A and V _B , a difference occurs in the currents flowing through the second mirror circuits B1 and A1 in FIG. A current corresponding to the current flows. In this case, since V _A >V _B , the current flowing into the second mirror circuit A1 on the battery side increases, and the current flows out from the terminal of the absolute value conversion circuit ABS. Since this current flows through the resistor Rd, the voltage applied to the terminal of the comparator circuit CMP increases. When the voltage at this terminal becomes larger than the threshold voltage Vth of the terminal, the output of the comparator circuit CMP causes the drive circuit DV to switch between the transistors Qr ₁ ,
Turn on Qr ₀ . Thereby, the resistance Ra ₁ , Ra ₀
Resistors Rf ₁ and Rf ₀ are connected in parallel to
Ra ₁ /n, Ra ₀ /n. Accordingly, the feeding resistances Z _B ′ and Z _A ′ are Z _B ′=Rb ₁・Re ₁・n/Ra ₁ ,
Z _A ′=Rb ₀・Re ₀・n/Ra ₀ , which is n times the power supply resistance during normal operation.

Fig. 7c shows the voltage distribution when the feeding resistance is multiplied by n, and the voltage between the A line and the battery power source V _A ′
and the voltage V _B ' between the B line and ground becomes even larger. That is, |V _A ′−V _B ′|>|V _A −V _B |, and once the power supply resistance is set to n, this state will be maintained unless the ground fault or cross contact is resolved. Therefore, hysteresis characteristics can be provided without using a comparison circuit with hysteresis characteristics, and a comparison circuit CMP with a simple configuration is sufficient.

The present invention is not limited to the configuration of the above-described embodiments, but can be modified in various ways.

〔Effect of the invention〕

As explained above, the present invention has a configuration in which power is supplied by a mirror circuit, which facilitates LSI implementation, and furthermore, when a ground fault or cross contact occurs, the B line,
This system detects the voltage difference between each power supply circuit that supplies power to the A line, increases the power supply resistance by n times, and thereby limits the power supply current.With a simple configuration, the power supply circuit can be used in the event of a ground fault or cross contact. This has the advantage of ensuring reliable protection.

[Brief explanation of drawings]

Figure 1 is a diagram explaining the principle of the present invention, Figure 2 is a power supply current limiting circuit according to an embodiment of the present invention, Figure 3 is an LSI power supply circuit, Figures 4 a to c are mirror circuits, and Figure 5 is an absolute diagram. Value conversion circuit, Figure 6 shows comparison circuit and drive circuit,
FIGS. 7a to 7c are explanatory diagrams of potential distribution at the time of a ground fault, and FIGS. 8 and 9 show conventional power supply current limiting circuits. 1 is a detection section, 2 is a comparison control section, B0, B1, B
2 are the first, second and third mirror circuits on the earth side, A
0, A1, A2 are the first, second, third mirror circuits on the battery side, Q _{1 , Q 0 are transistors, OP 1 , OP 0} are operational amplifiers, Ra ₁ , Ra ₀ , Rb ₁ , Rb ₀ , Rc ₁ , Rc ₀ ,
Re ₁ and Re ₀ are resistances, RS ₁ and RS ₀ are resistance switching parts, C _AB
is a capacitor.

Claims (1)

[Scope of Claims] 1. A power supply circuit that supplies direct current for telephone calls in the subscriber circuit of an exchange, comprising first to first circuits on the ground side for supplying current from the ground to line B. 3 mirror circuits B0, B1, B2, first to third mirror circuits A0, A1, A2 on the battery side for drawing current from the A line to the battery, and a mirror circuit between the B line and the ground air. Between resistors Rb ₁ and Rb ₀ for converting the voltage and the voltage between the A line and the battery into current, and the input terminals of the third mirror circuits B2 and A2 on the earth side and the battery side. The first mirror circuit _B0 , _A0 has a collector connected to the B line or the _A line, and a resistor connected to the emitter.
Re ₁ and Re ₀ are connected, and the operational amplifier OP ₁ is connected to the base.
It consists of transistors Q ₁ and Q ₀ to which OP ₀ is connected, and resistors Ra ₁ and Ra ₀ connected to the non-inverting input terminals of the operational amplifiers OP ₁ and OP ₀ , and connected to the output terminal of the B line. The input terminal of the first mirror circuit B0 on the earth side is connected to the output terminal of the third mirror circuit A2 on the battery side, and the output terminal of the third mirror circuit A2 on the battery side is connected to the A line. The input terminal of the first mirror circuit A0 is connected to the output terminal of the third mirror circuit B2 on the earth side, and a resistor Rb ₁ is connected to convert the voltage into a current.
the second mirror circuits B1 and A1 on the earth side and the battery side, respectively, with Rb ₀ connected to the input terminal;
The output terminals of are cross-connected to the input terminals of the third mirror circuits B2 and A2 on the ground air side and the battery side, respectively, via the pair of resistors Rc ₁ and Rc ₀ , and A power supply circuit in which a stabilized power source is connected to a common terminal of the third mirror circuit A2 includes: a detection section 1 that detects a difference in current flowing between the second mirror circuits B1 and A1; a comparison control section 2 that compares whether the difference detected by the difference is greater than or equal to a predetermined value and outputs a control signal when the difference is greater than or equal to the predetermined value _; A power supply current limiting circuit comprising resistors Ra ₁ and Ra ₀ connected to the non-inverting input terminal of OP ₀ and resistor switching units RS ₁ and RS ₀ that connect resistors in parallel.